mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
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18aa0c8862
The various changes in fpga require a rewrite of the fpga node type. To allow relative paths for the fpga config file, Config and SuperNode had to be modified so they store the path of the main config file. The syntax of the fpga node type configuration has changed - the example config in etc has been modified accordingly. Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
91 lines
2.2 KiB
C++
91 lines
2.2 KiB
C++
/* Communicate with VILLASfpga Xilinx FPGA boards.
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*
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* Author: Steffen Vogel <post@steffenvogel.de>
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* Author: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
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* SPDX-FileCopyrightText: 2014-2023 Institute for Automation of Complex Power Systems, RWTH Aachen University
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* SPDX-FileCopyrightText: 2023 Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <villas/format.hpp>
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#include <villas/node.hpp>
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#include <villas/node/config.hpp>
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#include <villas/timing.hpp>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/ips/dma.hpp>
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#include <villas/fpga/node.hpp>
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#include <villas/fpga/pcie_card.hpp>
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namespace villas {
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namespace node {
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class FpgaNode : public Node {
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enum InterfaceType { PCIE, PLATFORM };
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protected:
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// Settings
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std::string cardName;
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std::list<std::string> connectStrings;
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// State
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std::shared_ptr<fpga::Card> card;
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std::shared_ptr<villas::fpga::ip::Dma> dma;
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std::shared_ptr<villas::MemoryBlock> blockRx[2];
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std::shared_ptr<villas::MemoryBlock> blockTx;
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// Non-public methods
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virtual int _read(Sample *smps[], unsigned cnt) override;
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virtual int _write(Sample *smps[], unsigned cnt) override;
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public:
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FpgaNode(const uuid_t &id = {}, const std::string &name = "");
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virtual ~FpgaNode();
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virtual int prepare() override;
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virtual int parse(json_t *json) override;
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virtual int check() override;
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virtual int start() override;
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virtual std::vector<int> getPollFDs() override;
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virtual const std::string &getDetails() override;
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};
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class FpgaNodeFactory : public NodeFactory {
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public:
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using NodeFactory::NodeFactory;
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virtual Node *make(const uuid_t &id = {},
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const std::string &nme = "") override {
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auto *n = new FpgaNode(id, nme);
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init(n);
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return n;
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}
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virtual int getFlags() const override {
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return (int)NodeFactory::Flags::SUPPORTS_READ |
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(int)NodeFactory::Flags::SUPPORTS_WRITE |
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(int)NodeFactory::Flags::SUPPORTS_POLL;
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}
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virtual std::string getName() const override { return "fpga"; }
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virtual std::string getDescription() const override { return "VILLASfpga"; }
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virtual int start(SuperNode *sn) override;
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};
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} // namespace node
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} // namespace villas
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