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VILLASnode/etc
Niklas Eiling 16b6a21512 fpga: make hwdef-parse.py correctly detect interrupt on zynq designs
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2025-01-24 10:32:57 +01:00
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examples fpga: consolidate and update FPGA config examples 2025-01-24 10:32:57 +01:00
fpga fpga: make hwdef-parse.py correctly detect interrupt on zynq designs 2025-01-24 10:32:57 +01:00
gtnet-skt Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00
js Use spaces for indention of Javacript files 2024-02-29 23:18:47 +01:00
labs lab18: Apply suggestions from code review 2024-10-25 12:30:04 +02:00
python Reformat Python code with black 2024-02-29 23:18:47 +01:00
tricks Use spaces for indention of .conf files 2024-02-29 23:18:47 +01:00
CMakeLists.txt Use spaces for indention of CMake files 2024-02-29 23:18:47 +01:00
demo.json port large parts of VILLASnode to C++ and fix tests alongside 2022-01-11 09:19:53 -05:00
eric-lab.conf Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00
loopback.conf Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00
loopback.json Use spaces for indention of .json files 2024-02-29 23:18:47 +01:00
shmem_mqtt.conf Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00
syslab-zmq.conf Use spaces for indention of .conf files 2024-02-29 23:18:47 +01:00
test.conf Use spaces for indention of .conf files 2024-02-29 23:18:47 +01:00
websocket-client.conf Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00
websocket-demo.conf Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00
WSCC_9bus_MV.conf Harmonize formatting and style of example configuration files 2024-04-10 09:38:57 +02:00