mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-16 00:00:02 +01:00
191 lines
5.7 KiB
C++
191 lines
5.7 KiB
C++
/* AXI-PCIe Interrupt controller
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*
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* Author: Steffen Vogel <post@steffenvogel.de>
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* SPDX-FileCopyrightText: 2017 Steffen Vogel <post@steffenvogel.de>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <sys/ioctl.h>
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#include <unistd.h>
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#include <villas/config.hpp>
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#include <villas/plugin.hpp>
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#include <villas/kernel/kernel.hpp>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/ips/intc.hpp>
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#include <villas/fpga/pcie_card.hpp>
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using namespace villas::fpga::ip;
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InterruptController::~InterruptController() {}
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bool InterruptController::stop() {
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return this->vfioDevice->pciMsiDeinit(irq_vectors[0].eventFds) > 0;
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}
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bool InterruptController::init() {
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PCIeCard *pciecard = dynamic_cast<PCIeCard *>(card);
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this->vfioDevice = pciecard->vfioDevice;
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const uintptr_t base = getBaseAddr(registerMemory);
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kernel::vfio::Device::IrqVectorInfo irq_vector = {0};
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irq_vector.numFds = this->vfioDevice->pciMsiInit(irq_vector.eventFds);
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irq_vector.automask = true;
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irq_vectors.push_back(irq_vector);
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if (not this->vfioDevice->pciMsiFind(nos)) {
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return false;
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}
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if (irq_vector.numFds < 0)
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return false;
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// For each IRQ
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for (size_t i = 0; i < irq_vector.numFds; i++) {
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// Try pinning to core
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int ret = kernel::setIRQAffinity(nos[i], pciecard->affinity, nullptr);
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switch (ret) {
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case 0:
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// Everything is fine
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break;
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case EACCES:
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logger->warn("No permission to change affinity of VFIO-MSI interrupt, "
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"performance may be degraded!");
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break;
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default:
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logger->error("Failed to change affinity of VFIO-MSI interrupt");
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return false;
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}
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// Setup vector
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XIntc_Out32(base + XIN_IVAR_OFFSET + i * 4, i);
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}
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XIntc_Out32(base + XIN_IMR_OFFSET,
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0x00000000); // Use manual acknowlegement for all IRQs
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XIntc_Out32(base + XIN_IAR_OFFSET,
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0xFFFFFFFF); // Acknowlege all pending IRQs manually
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XIntc_Out32(base + XIN_IMR_OFFSET,
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0xFFFFFFFF); // Use fast acknowlegement for all IRQs
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XIntc_Out32(base + XIN_IER_OFFSET, 0x00000000); // Disable all IRQs by default
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XIntc_Out32(base + XIN_MER_OFFSET,
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XIN_INT_HARDWARE_ENABLE_MASK | XIN_INT_MASTER_ENABLE_MASK);
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logger->debug("enabled interrupts");
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return true;
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}
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bool InterruptController::enableInterrupt(InterruptController::IrqMaskType mask,
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bool polling) {
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const uintptr_t base = getBaseAddr(registerMemory);
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// Current state of INTC
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const uint32_t ier = XIntc_In32(base + XIN_IER_OFFSET);
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const uint32_t imr = XIntc_In32(base + XIN_IMR_OFFSET);
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// Clear pending IRQs
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XIntc_Out32(base + XIN_IAR_OFFSET, mask);
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for (size_t i = 0; i < irq_vectors[0].numFds; i++) {
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if (mask & (1 << i))
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this->polling[i] = polling;
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}
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if (polling) {
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XIntc_Out32(base + XIN_IMR_OFFSET, imr & ~mask);
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XIntc_Out32(base + XIN_IER_OFFSET, ier & ~mask);
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} else {
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XIntc_Out32(base + XIN_IER_OFFSET, ier | mask);
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XIntc_Out32(base + XIN_IMR_OFFSET, imr | mask);
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}
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logger->debug("New ier = {:x}", XIntc_In32(base + XIN_IER_OFFSET));
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logger->debug("New imr = {:x}", XIntc_In32(base + XIN_IMR_OFFSET));
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logger->debug("New isr = {:x}", XIntc_In32(base + XIN_ISR_OFFSET));
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logger->debug("Interupts enabled: mask={:x} polling={:d}", mask, polling);
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return true;
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}
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bool InterruptController::disableInterrupt(
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InterruptController::IrqMaskType mask) {
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const uintptr_t base = getBaseAddr(registerMemory);
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uint32_t ier = XIntc_In32(base + XIN_IER_OFFSET);
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XIntc_Out32(base + XIN_IER_OFFSET, ier & ~mask);
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return true;
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}
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// Assuming only one interrupt vector
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ssize_t InterruptController::waitForInterrupt(int irq) {
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assert(irq < maxIrqs);
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if (this->polling[irq]) {
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const uintptr_t base = getBaseAddr(registerMemory);
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uint32_t isr, mask = 1 << irq;
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do {
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// Poll status register
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isr = XIntc_In32(base + XIN_ISR_OFFSET);
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pthread_testcancel();
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} while ((isr & mask) != mask);
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// Acknowledge interrupt
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XIntc_Out32(base + XIN_IAR_OFFSET, mask);
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// We can only tell that there has been (at least) one interrupt
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return 1;
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} else {
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uint64_t count;
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int sret;
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fd_set rfds;
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struct timeval tv = {.tv_sec = 1, .tv_usec = 0};
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FD_ZERO(&rfds);
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FD_SET(irq_vectors[0].eventFds[irq], &rfds);
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logger->debug("Waiting for interrupt fd {}", irq_vectors[0].eventFds[irq]);
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sret = select(irq_vectors[0].eventFds[irq] + 1, &rfds, NULL, NULL, &tv);
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if (sret == -1) {
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logger->error("select() failed: {}", strerror(errno));
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return -1;
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} else if (sret == 0) {
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logger->warn("timeout waiting for interrupt {}", irq);
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return -1;
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}
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// Block until there has been an interrupt, read number of interrupts
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ssize_t ret = read(irq_vectors[0].eventFds[irq], &count, sizeof(count));
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if (ret != sizeof(count)) {
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logger->error("Read failure on interrupt {}, {}", irq, ret);
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return -1;
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} else {
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logger->debug("Automask: {}", irq_vectors[0].automask);
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if (irq_vectors[0].automask) {
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struct vfio_irq_set irqSet = {0};
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irqSet.argsz = sizeof(struct vfio_irq_set);
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irqSet.flags = (VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK);
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irqSet.index = 0;
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irqSet.start = irq;
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irqSet.count = 1;
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int ret = ioctl(this->vfioDevice->getFileDescriptor(),
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VFIO_DEVICE_SET_IRQS, &irqSet);
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if (ret < 0) {
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logger->error("Failed to unmask IRQ {}", 0);
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}
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}
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}
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return count;
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}
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}
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static char n[] = "intc";
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static char d[] = "Xilinx's programmable interrupt controller";
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static char v[] = "xilinx.com:module_ref:axi_pcie_intc:";
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static CorePlugin<InterruptController, n, d, v> f;
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