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https://git.rwth-aachen.de/acs/public/villas/node/
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126 lines
4 KiB
C
126 lines
4 KiB
C
/** Interlectual Property component.
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*
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* This class represents a module within the FPGA.
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*
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* @file
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @copyright 2017, Institute for Automation of Complex Power Systems, EONERC
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* @license GNU General Public License (version 3)
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*
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* VILLASfpga
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*********************************************************************************/
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/** @addtogroup fpga VILLASfpga
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* @{
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*/
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#pragma once
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#include <stdint.h>
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#include "common.h"
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#include "fpga/vlnv.h"
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#include "fpga/ips/dma.h"
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#include "fpga/ips/switch.h"
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#include "fpga/ips/fifo.h"
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#include "fpga/ips/rtds_axis.h"
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#include "fpga/ips/timer.h"
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#include "fpga/ips/model.h"
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#include "fpga/ips/dft.h"
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#include "fpga/ips/intc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum fpga_ip_types {
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FPGA_IP_TYPE_DM_DMA, /**< A datamover IP exchanges streaming data between the FPGA and the CPU. */
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FPGA_IP_TYPE_DM_FIFO, /**< A datamover IP exchanges streaming data between the FPGA and the CPU. */
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FPGA_IP_TYPE_MODEL, /**< A model IP simulates a system on the FPGA. */
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FPGA_IP_TYPE_MATH, /**< A math IP performs some kind of mathematical operation on the streaming data */
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FPGA_IP_TYPE_MISC, /**< Other IP components like timer, counters, interrupt conctrollers or routing. */
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FPGA_IP_TYPE_INTERFACE /**< A interface IP connects the FPGA to another system or controller. */
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};
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struct fpga_ip_type {
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struct fpga_vlnv vlnv;
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enum fpga_ip_types type;
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int (*init)(struct fpga_ip *c);
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int (*parse)(struct fpga_ip *c, json_t *cfg);
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int (*check)(struct fpga_ip *c);
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int (*start)(struct fpga_ip *c);
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int (*stop)(struct fpga_ip *c);
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int (*destroy)(struct fpga_ip *c);
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int (*reset)(struct fpga_ip *c);
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void (*dump)(struct fpga_ip *c);
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size_t size; /**< Amount of memory which should be reserved for struct fpga_ip::_vd */
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};
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struct fpga_ip {
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char *name; /**< Name of the FPGA IP component. */
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struct fpga_vlnv vlnv; /**< The Vendor, Library, Name, Version tag of the FPGA IP component. */
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enum state state; /**< The current state of the FPGA IP component. */
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struct fpga_ip_type *_vt; /**< Vtable containing FPGA IP type function pointers. */
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void *_vd; /**< Virtual data (used by struct fpga_ip::_vt functions) */
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uintptr_t baseaddr; /**< The baseadress of this FPGA IP component */
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uintptr_t baseaddr_axi4; /**< Used by AXI4 FIFO DM */
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int port; /**< The port of the AXI4-Stream switch to which this FPGA IP component is connected. */
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int irq; /**< The interrupt number of the FPGA IP component. */
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struct fpga_card *card; /**< The FPGA to which this IP instance belongs to. */
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};
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/** Initialize IP core. */
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int fpga_ip_init(struct fpga_ip *c, struct fpga_ip_type *vt);
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/** Parse IP core configuration from configuration file */
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int fpga_ip_parse(struct fpga_ip *c, json_t *cfg, const char *name);
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/** Check configuration of IP core. */
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int fpga_ip_check(struct fpga_ip *c);
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/** Start IP core. */
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int fpga_ip_start(struct fpga_ip *c);
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/** Stop IP core. */
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int fpga_ip_stop(struct fpga_ip *c);
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/** Release dynamic memory allocated by this IP core. */
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int fpga_ip_destroy(struct fpga_ip *c);
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/** Dump details about this IP core to stdout. */
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void fpga_ip_dump(struct fpga_ip *c);
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/** Reset IP component to its initial state. */
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int fpga_ip_reset(struct fpga_ip *c);
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/** Find a registered FPGA IP core type with the given VLNV identifier. */
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struct fpga_ip_type * fpga_ip_type_lookup(const char *vstr);
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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