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157d5b21d7
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework. * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> --------- Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
20 lines
641 B
C
20 lines
641 B
C
/* Compile time configuration
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*
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* This file contains some compiled-in settings.
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* This settings are not part of the configuration file.
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*
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* Author: Steffen Vogel <post@steffenvogel.de>
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* SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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// PCIe BAR number of VILLASfpga registers
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#define FPGA_PCI_BAR 0
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#define FPGA_PCI_VID_XILINX 0x10ee
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#define FPGA_PCI_PID_VFPGA 0x7022
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/* AXI Bus frequency for all components
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* except RTDS AXI Stream bridge which runs at RTDS_HZ (100 Mhz) */
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#define FPGA_AXI_HZ 125000000 // 125 MHz
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