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https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-30 00:00:11 +01:00
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
#include <villas/utils.h>
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#include <villas/fpga/card.h>
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#include <villas/fpga/ip.h>
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#include <villas/fpga/ips/timer.h>
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#include "bench.h"
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int fpga_benchmark_jitter(struct fpga_card *c)
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{
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int ret;
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struct fpga_ip *ip = list_lookup(&c->ips, "timer_0");
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if (!ip || !c->intc)
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return -1;
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struct timer *tmr = (struct timer *) ip->_vd;
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XTmrCtr *xtmr = &tmr->inst;
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ret = intc_enable(c->intc, (1 << ip->irq), intc_flags);
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if (ret)
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error("Failed to enable interrupt");
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float period = 50e-6;
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int runs = 300.0 / period;
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int *hist = alloc(8 << 20);
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XTmrCtr_SetOptions(xtmr, 0, XTC_INT_MODE_OPTION | XTC_EXT_COMPARE_OPTION | XTC_DOWN_COUNT_OPTION | XTC_AUTO_RELOAD_OPTION);
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XTmrCtr_SetResetValue(xtmr, 0, period * FPGA_AXI_HZ);
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XTmrCtr_Start(xtmr, 0);
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uint64_t end, start = rdtsc();
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for (int i = 0; i < runs; i++) {
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uint64_t cnt = intc_wait(c->intc, ip->irq);
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if (cnt != 1)
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warn("fail");
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/* Ackowledge IRQ */
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XTmrCtr_WriteReg((uintptr_t) c->map + ip->baseaddr, 0, XTC_TCSR_OFFSET, XTmrCtr_ReadReg((uintptr_t) c->map + ip->baseaddr, 0, XTC_TCSR_OFFSET));
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end = rdtsc();
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hist[i] = end - start;
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start = end;
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}
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XTmrCtr_Stop(xtmr, 0);
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char fn[256];
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snprintf(fn, sizeof(fn), "results/jitter_%s_%s.dat", intc_flags & INTC_POLLING ? "polling" : "irq", uts.release);
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FILE *g = fopen(fn, "w");
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for (int i = 0; i < runs; i++)
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fprintf(g, "%u\n", hist[i]);
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fclose(g);
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free(hist);
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ret = intc_disable(c->intc, (1 << ip->irq));
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if (ret)
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error("Failed to disable interrupt");
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return 0;
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}
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