Niklas Eiling 25c021ee75 fpga: optimize sg descriptor rings ... we are now using only one memory block for both sg rings. This is required so that the SG interface can benefit from a read cache Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>		2024-04-18 10:34:17 +02:00
..
villas/fpga	fpga: optimize sg descriptor rings	2024-04-18 10:34:17 +02:00