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https://git.rwth-aachen.de/acs/public/villas/node/
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157d5b21d7
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework. * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> --------- Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
102 lines
4.3 KiB
C++
102 lines
4.3 KiB
C++
/* Driver for wrapper around Aurora (acs.eonerc.rwth-aachen.de:user:aurora)
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*
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* Author: Hatim Kanchwala <hatim@hatimak.me>
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* SPDX-FileCopyrightText: 2020 Institute for Automation of Complex Power Systems, RWTH Aachen University
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <cstdint>
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#include <villas/utils.hpp>
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#include <villas/fpga/ips/aurora.hpp>
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// Register offsets
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#define AURORA_AXIS_SR_OFFSET 0x00 // Status Register (read-only)
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#define AURORA_AXIS_CR_OFFSET 0x04 // Control Register (read/write)
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#define AURORA_AXIS_CNTR_IN_HIGH_OFFSET 0x0C // Higher 32-bits of incoming frame counter
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#define AURORA_AXIS_CNTR_IN_LOW_OFFSET 0x08 // Lower 32-bits of incoming frame counter
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#define AURORA_AXIS_CNTR_OUT_HIGH_OFFSET 0x18 // Higher 32-bits of outgoing frame counter
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#define AURORA_AXIS_CNTR_OUT_LOW_OFFSET 0x1C // Lower 32-bits of outgoing frame counter
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// Status register bits
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#define AURORA_AXIS_SR_CHAN_UP (1 << 0) // 1-bit, asserted when channel initialisation is complete and is ready for data transfer
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#define AURORA_AXIS_SR_LANE_UP (1 << 1) // 1-bit, asserted for each lane upon successful lane initialisation
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#define AURORA_AXIS_SR_HARD_ERR (1 << 2) // 1-bit hard rror status
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#define AURORA_AXIS_SR_SOFT_ERR (1 << 3) // 1-bit soft error status
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#define AURORA_AXIS_SR_FRAME_ERR (1 << 4) // 1-bit frame error status
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// Control register bits
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// 1-bit, assert to put Aurora IP in loopback mode.
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#define AURORA_AXIS_CR_LOOPBACK (1 << 0)
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// 1-bit, assert to reset counters, incoming and outgoing frame counters.
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#define AURORA_AXIS_CR_RST_CTRS (1 << 1)
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// 1-bit, assert to turn off any sequence number handling by Aurora IP
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// Sequence number must be handled in software then.
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#define AURORA_AXIS_CR_SEQ_MODE (1 << 2)
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/* 1-bit, assert to strip the received frame of the trailing sequence
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* number. Sequence number mode must be set to handled by Aurora IP,
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* otherwise this bit is ignored. */
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#define AURORA_AXIS_CR_SEQ_STRIP (1 << 3)
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/* 1-bit, assert to use the same sequence number in the outgoing
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* NovaCor-bound frames as the sequence number received from the
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* incoming frames from NovaCor. Sequence number mode must be set to
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* handled by Aurora IP, otherwise this bit is ignored.*/
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#define AURORA_AXIS_CR_SEQ_ECHO (1 << 4)
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using namespace villas::fpga::ip;
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void Aurora::dump()
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{
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// Check Aurora AXI4 registers
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const uint32_t sr = readMemory<uint32_t>(registerMemory, AURORA_AXIS_SR_OFFSET);
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logger->info("Aurora-NovaCor AXI-Stream interface details:");
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logger->info("Aurora status: {:#x}", sr);
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logger->info(" Channel up: {}", sr & AURORA_AXIS_SR_CHAN_UP ? CLR_GRN("yes") : CLR_RED("no"));
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logger->info(" Lane up: {}", sr & AURORA_AXIS_SR_LANE_UP ? CLR_GRN("yes") : CLR_RED("no"));
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logger->info(" Hard error: {}", sr & AURORA_AXIS_SR_HARD_ERR ? CLR_RED("yes") : CLR_GRN("no"));
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logger->info(" Soft error: {}", sr & AURORA_AXIS_SR_SOFT_ERR ? CLR_RED("yes") : CLR_GRN("no"));
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logger->info(" Frame error: {}", sr & AURORA_AXIS_SR_FRAME_ERR ? CLR_RED("yes") : CLR_GRN("no"));
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const uint64_t inCntLow = readMemory<uint32_t>(registerMemory, AURORA_AXIS_CNTR_IN_LOW_OFFSET);
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const uint64_t inCntHigh = readMemory<uint32_t>(registerMemory, AURORA_AXIS_CNTR_IN_HIGH_OFFSET);
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const uint64_t inCnt = (inCntHigh << 32) | inCntLow;
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const uint64_t outCntLow = readMemory<uint32_t>(registerMemory, AURORA_AXIS_CNTR_OUT_LOW_OFFSET);
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const uint64_t outCntHigh = readMemory<uint32_t>(registerMemory, AURORA_AXIS_CNTR_OUT_HIGH_OFFSET);
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const uint64_t outCnt = (outCntHigh << 32) | outCntLow;
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logger->info("Aurora frames received: {}", inCnt);
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logger->info("Aurora frames sent: {}", outCnt);
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}
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void Aurora::setLoopback(bool state)
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{
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auto cr = readMemory<uint32_t>(registerMemory, AURORA_AXIS_CR_OFFSET);
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if (state)
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cr |= AURORA_AXIS_CR_LOOPBACK;
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else
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cr &= ~AURORA_AXIS_CR_LOOPBACK;
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writeMemory<uint32_t>(registerMemory, AURORA_AXIS_CR_OFFSET, cr);
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}
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void Aurora::resetFrameCounters()
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{
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auto cr = readMemory<uint32_t>(registerMemory, AURORA_AXIS_CR_OFFSET);
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cr |= AURORA_AXIS_CR_RST_CTRS;
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writeMemory<uint32_t>(registerMemory, AURORA_AXIS_CR_OFFSET, cr);
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}
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static char n[] = "aurora";
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static char d[] = "Aurora 8B/10B and additional support modules, like an AXI4-Lite register interface.";
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static char v[] = "acs.eonerc.rwth-aachen.de:user:aurora_axis:";
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static NodePlugin<Aurora, n, d, v> f;
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