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https://git.rwth-aachen.de/acs/public/villas/node/
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157d5b21d7
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework. * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> --------- Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
101 lines
2.3 KiB
C++
101 lines
2.3 KiB
C++
/* FIFO related helper functions
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*
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* These functions present a simpler interface to Xilinx' FIFO driver (XLlFifo_*)
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*
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* Author: Steffen Vogel <post@steffenvogel.de>
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* Author: Daniel Krebs <github@daniel-krebs.net>
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* SPDX-FileCopyrightText: 2017 Steffen Vogel <post@steffenvogel.de>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <unistd.h>
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#include <xilinx/xstatus.h>
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#include <xilinx/xllfifo.h>
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#include <villas/fpga/ips/fifo.hpp>
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#include <villas/fpga/ips/intc.hpp>
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using namespace villas::fpga::ip;
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bool Fifo::init()
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{
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XLlFifo_Config fifo_cfg;
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try {
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// If this throws an exception, then there's no AXI4 data interface
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fifo_cfg.Axi4BaseAddress = getBaseAddr(axi4Memory);
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fifo_cfg.Datainterface = 1;
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} catch (const std::out_of_range&) {
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fifo_cfg.Datainterface = 0;
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}
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if (XLlFifo_CfgInitialize(&xFifo, &fifo_cfg, getBaseAddr(registerMemory)) != XST_SUCCESS)
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return false;
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if (irqs.find(irqName) == irqs.end()) {
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logger->error("IRQ '{}' not found but required", irqName);
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return false;
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}
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// Receive complete IRQ
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XLlFifo_IntEnable(&xFifo, XLLF_INT_RC_MASK);
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irqs[irqName].irqController->enableInterrupt(irqs[irqName], false);
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return true;
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}
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bool Fifo::stop()
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{
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// Receive complete IRQ
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XLlFifo_IntDisable(&xFifo, XLLF_INT_RC_MASK);
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irqs[irqName].irqController->disableInterrupt(irqs[irqName]);
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return true;
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}
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size_t Fifo::write(const void *buf, size_t len)
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{
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uint32_t tdfv;
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tdfv = XLlFifo_TxVacancy(&xFifo);
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if (tdfv < len)
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return -1;
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// Buf has to be re-casted because Xilinx driver doesn't use const
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XLlFifo_Write(&xFifo, (void*) buf, len);
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XLlFifo_TxSetLen(&xFifo, len);
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return len;
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}
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size_t Fifo::read(void *buf, size_t len)
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{
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size_t nextlen = 0;
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size_t rxlen;
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while (!XLlFifo_IsRxDone(&xFifo))
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irqs[irqName].irqController->waitForInterrupt(irqs[irqName]);
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XLlFifo_IntClear(&xFifo, XLLF_INT_RC_MASK);
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// Get length of next frame
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rxlen = XLlFifo_RxGetLen(&xFifo);
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nextlen = std::min(rxlen, len);
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// Read from FIFO
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XLlFifo_Read(&xFifo, buf, nextlen);
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return nextlen;
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}
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static char n1[] = "fifo";
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static char d1[] = "Xilinx's AXI4 FIFO data mover";
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static char v1[] = "xilinx.com:ip:axi_fifo_mm_s:";
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static NodePlugin<Fifo, n1, d1, v1> p1;
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static char n2[] = "fifo_data";
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static char d2[] = "Xilinx's AXI4 data stream FIFO";
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static char v2[] = "xilinx.com:ip:axis_data_fifo:";
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static NodePlugin<FifoData, n2, d2, v2> p2;
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