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56 lines
1.8 KiB
C
56 lines
1.8 KiB
C
/** Intc unit test.
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*
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @copyright 2017-2018, Steffen Vogel
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* @license GNU General Public License (version 3)
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*
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* VILLASfpga
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*********************************************************************************/
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#include <criterion/criterion.h>
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#include <villas/fpga/card.h>
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#include <villas/fpga/ip.h>
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#include <villas/fpga/ips/intc.h>
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extern struct fpga_card *card;
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Test(fpga, intc, .description = "Interrupt Controller")
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{
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int ret;
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uint32_t isr;
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cr_assert(card->intc);
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ret = intc_enable(card->intc, 0xFF00, 0);
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cr_assert_eq(ret, 0, "Failed to enable interrupt");
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/* Fake IRQs in software by writing to ISR */
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XIntc_Out32((uintptr_t) card->map + card->intc->baseaddr + XIN_ISR_OFFSET, 0xFF00);
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/* Wait for 8 SW triggered IRQs */
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for (int i = 0; i < 8; i++)
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intc_wait(card->intc, i+8);
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/* Check ISR if all SW IRQs have been deliverd */
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isr = XIntc_In32((uintptr_t) card->map + card->intc->baseaddr + XIN_ISR_OFFSET);
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ret = intc_disable(card->intc, 0xFF00);
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cr_assert_eq(ret, 0, "Failed to disable interrupt");
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cr_assert_eq(isr & 0xFF00, 0); /* ISR should get cleared by MSI_Grant_signal */
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}
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