Niklas Eiling 57d7396c09 fpga: optimize sg descriptor rings ... we are now using only one memory block for both sg rings. This is required so that the SG interface can benefit from a read cache Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>		2024-04-19 10:09:47 +02:00
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ips	fpga: optimize sg descriptor rings	2024-04-19 10:09:47 +02:00
card.hpp	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
config.h	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
core.hpp	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
dma.h	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
node.hpp	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
pcie_card.hpp	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
utils.hpp	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00
vlnv.hpp	Reformat all code with clang-format	2024-02-29 19:34:27 +01:00