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VILLASnode/fpga/include
Niklas Eiling 97090e9de5 fpga: Add new Dino configuration register that allows triggering the DAC before the time step to dino.cpp
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-11-13 11:00:22 +01:00
..
villas/fpga fpga: Add new Dino configuration register that allows triggering the DAC before the time step to dino.cpp 2024-11-13 11:00:22 +01:00