mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-30 00:00:11 +01:00
Steffen Vogel
af14793901
VILLASnode and its dependencies are now fully compatible with a BSD/MIT license.
104 lines
2.3 KiB
C
104 lines
2.3 KiB
C
/** Node type: VILLASfpga
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*
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* This file implements the fpga node-type.
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*
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* @file
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @copyright 2015-2016, Steffen Vogel
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* This file is part of VILLASnode. All Rights Reserved. Proprietary and confidential.
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* Unauthorized copying of this file, via any medium is strictly prohibited.
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*/
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/**
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* @addtogroup fpga VILLASnode
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* @ingroup node
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* @{
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*********************************************************************************/
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#ifndef _FPGA_H_
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#define _FPGA_H_
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#include "kernel/vfio.h"
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#include "kernel/pci.h"
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#include "fpga/dma.h"
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#include "fpga/ip.h"
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#include "fpga/intc.h"
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#include "node.h"
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#include "list.h"
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struct fpga {
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struct pci_dev filter; /**< Filter for PCI device. */
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struct vfio_dev vd; /**< VFIO device handle. */
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int do_reset; /**< Reset VILLASfpga during startup? */
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int affinity; /**< Affinity for MSI interrupts */
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struct list ips; /**< List of IP components on FPGA. */
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char *map; /**< PCI BAR0 mapping for register access */
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size_t maplen;
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size_t dmalen;
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/* Some IP cores are special and referenced here */
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struct ip *intc;
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struct ip *reset;
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struct ip *sw;
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config_setting_t *cfg;
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};
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struct fpga_dm {
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struct ip *ip;
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const char *ip_name;
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int use_irqs;
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struct dma_mem dma;
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enum {
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FPGA_DM_DMA,
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FPGA_DM_FIFO
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} type;
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struct fpga *card;
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};
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/** @see node_vtable::init */
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int fpga_init(int argc, char * argv[], config_setting_t *cfg);
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/** @see node_vtable::deinit */
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int fpga_deinit();
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/** @see node_vtable::parse */
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int fpga_parse(struct node *n, config_setting_t *cfg);
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/** Parse the 'fpga' section in the configuration file */
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int fpga_parse_card(struct fpga *v, int argc, char * argv[], config_setting_t *cfg);
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/** @see node_vtable::print */
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char * fpga_print(struct node *n);
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/** @see node_vtable::open */
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int fpga_open(struct node *n);
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/** @see node_vtable::close */
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int fpga_close(struct node *n);
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/** @see node_vtable::read */
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int fpga_read(struct node *n, struct sample *smps[], unsigned cnt);
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/** @see node_vtable::write */
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int fpga_write(struct node *n, struct sample *smps[], unsigned cnt);
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/** Get pointer to internal VILLASfpga datastructure */
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struct fpga * fpga_get();
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/** Reset VILLASfpga */
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int fpga_reset(struct fpga *f);
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/** Dump some details about the fpga card */
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void fpga_dump(struct fpga *f);
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#endif /** _FPGA_H_ @} */
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