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Initializing IPs may want to probe the actual hardware for feature detection (e.g. DMA), so the card has to be started in order to access any memory on the card. |
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VILLASfpga
TODO: Write project description
Documentation
User documentation is available here: https://villas.fein-aachen.org/doc/fpga.html
Copyright
2017, Institute for Automation of Complex Power Systems, EONERC
License
This project is released under the terms of the GPL version 3.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
For other licensing options please consult Prof. Antonello Monti.
Contact
- Steffen Vogel stvogel@eonerc.rwth-aachen.de
Institute for Automation of Complex Power Systems (ACS)
EON Energy Research Center (EONERC)
RWTH University Aachen, Germany