mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
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157d5b21d7
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework. * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> * Harmonize comment and code-style Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com> --------- Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
83 lines
2.2 KiB
C++
83 lines
2.2 KiB
C++
/* RTDS AXI-Stream RTT unit test.
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*
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* Author: Steffen Vogel <post@steffenvogel.de>
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* SPDX-FileCopyrightText: 2017 Steffen Vogel <post@steffenvogel.de>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <criterion/criterion.h>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/vlnv.hpp>
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#include <villas/fpga/ips/dma.hpp>
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#include <villas/fpga/ips/switch.hpp>
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#include <villas/fpga/ips/rtds.hpp>
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extern struct fpga_card *card;
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// cppcheck-suppress unknownMacro
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Test(fpga, rtds_rtt, .description = "RTDS: tight rtt")
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{
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int ret;
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struct fpga_ip *ip, *rtds;
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struct dma_mem buf;
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size_t recvlen;
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std::list<villas::fpga::ip::Rtds*> rtdsIps;
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std::list<villas::fpga::ip::Dma*> dmaIps;
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// Get IP cores
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for (auto &ip : state.cards.front()->ips) {
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if (*ip == villas::fpga::Vlnv("acs.eonerc.rwth-aachen.de:user:rtds_axis:")) {
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auto rtds = reinterpret_cast<villas::fpga::ip::Rtds*>(ip.get());
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rtdsIps.push_back(rtds);
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}
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if (*ip == villas::fpga::Vlnv("xilinx.com:ip:axi_dma:")) {
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auto dma = reinterpret_cast<villas::fpga::ip::Dma*>(ip.get());
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dmaIps.push_back(dma);
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}
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}
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for (auto rtds : rtdsIps) {
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for (auto dma : dmaIps) {
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rtds->connect
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}
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}
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ret = switch_connect(card->sw, rtds, ip);
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cr_assert_eq(ret, 0, "Failed to configure switch");
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ret = switch_connect(card->sw, ip, rtds);
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cr_assert_eq(ret, 0, "Failed to configure switch");
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ret = dma_alloc(ip, &buf, 0x100, 0);
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cr_assert_eq(ret, 0, "Failed to allocate DMA memory");
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while (1) {
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ret = dma_read(ip, buf.base_phys, buf.len);
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cr_assert_eq(ret, 0, "Failed to start DMA read: %d", ret);
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ret = dma_read_complete(ip, NULL, &recvlen);
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cr_assert_eq(ret, 0, "Failed to complete DMA read: %d", ret);
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ret = dma_write(ip, buf.base_phys, recvlen);
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cr_assert_eq(ret, 0, "Failed to start DMA write: %d", ret);
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ret = dma_write_complete(ip, NULL, NULL);
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cr_assert_eq(ret, 0, "Failed to complete DMA write: %d", ret);
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}
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ret = switch_disconnect(card->sw, rtds, ip);
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cr_assert_eq(ret, 0, "Failed to configure switch");
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ret = switch_disconnect(card->sw, ip, rtds);
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cr_assert_eq(ret, 0, "Failed to configure switch");
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ret = dma_free(ip, &buf);
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cr_assert_eq(ret, 0, "Failed to release DMA memory");
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}
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