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https://github.com/hermitcore/libhermit.git
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reactivate IPI for a TLB shootdown
- required if an existing mapping (virtual addr -> physical addr) changed
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parent
75ece59584
commit
aeab719a2f
2 changed files with 10 additions and 23 deletions
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@ -577,19 +577,15 @@ inline static void invalidate_cache(void) {
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asm volatile ("invd" ::: "memory");
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}
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#if 0
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/// Send IPIs to the other core, which flush the TLB on the other cores.
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int ipi_tlb_flush(void);
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#endif
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/** @brief Flush Translation Lookaside Buffer
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*
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* Just reads cr3 and writes the same value back into it.
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*/
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static inline void flush_tlb(void)
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static inline void tlb_flush(void)
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{
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/* single-address space OS => no TLB flush required */
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#if 0
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size_t val = read_cr3();
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if (val)
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@ -598,7 +594,6 @@ static inline void flush_tlb(void)
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#if MAX_CORES > 1
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ipi_tlb_flush();
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#endif
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#endif
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}
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/** @brief Flush a specific page entry in TLB
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@ -606,14 +601,11 @@ static inline void flush_tlb(void)
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*/
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static inline void tlb_flush_one_page(size_t addr)
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{
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/* single-address space OS => no TLB flush required */
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#if 0
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asm volatile("invlpg (%0)" : : "r"(addr) : "memory");
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#if MAX_CORES > 1
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ipi_tlb_flush();
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#endif
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#endif
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}
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/** @brief Invalidate cache
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@ -851,27 +851,23 @@ int smp_start(void)
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return smp_main();
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}
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#if 0
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int ipi_tlb_flush(void)
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{
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uint32_t id = CORE_ID;
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uint32_t j;
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uint64_t i;
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uint8_t flags;
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if (atomic_int32_read(&cpu_online) == 1)
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return 0;
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if (has_x2apic()) {
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flags = irq_nested_disable();
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for(i=0; i<MAX_APIC_CORES; i++)
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uint8_t flags = irq_nested_disable();
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for(uint64_t i=0; i<MAX_APIC_CORES; i++)
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{
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if (i == id)
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if (i == id)
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continue;
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if (!online[i])
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continue;
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//kprintf("send IPI to %zd\n", i);
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kprintf("Send IPI to %zd\n", i);
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wrmsr(0x830, (i << 32)|APIC_INT_ASSERT|APIC_DM_FIXED|112);
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}
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irq_nested_enable(flags);
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@ -881,19 +877,19 @@ int ipi_tlb_flush(void)
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return -EIO;
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}
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flags = irq_nested_disable();
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for(i=0; i<MAX_APIC_CORES; i++)
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uint8_t flags = irq_nested_disable();
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for(uint64_t i=0; i<MAX_APIC_CORES; i++)
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{
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if (i == id)
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continue;
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if (!online[i])
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continue;
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//kprintf("send IPI to %zd\n", i);
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kprintf("Send IPI to %zd\n", i);
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set_ipi_dest(i);
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lapic_write(APIC_ICR1, APIC_INT_ASSERT|APIC_DM_FIXED|112);
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j = 0;
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uint32_t j = 0;
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while((lapic_read(APIC_ICR1) & APIC_ICR_BUSY) && (j < 1000))
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j++; // wait for it to finish, give up eventualy tho
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}
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@ -913,7 +909,6 @@ static void apic_tlb_handler(struct state *s)
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write_cr3(val);
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}
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#endif
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#endif
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int apic_send_ipi(uint64_t dest, uint8_t irq)
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{
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@ -1025,7 +1020,7 @@ int apic_init(void)
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// set APIC error handler
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irq_install_handler(126, apic_err_handler);
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#if MAX_CORES > 1
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//irq_install_handler(80+32, apic_tlb_handler);
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irq_install_handler(80+32, apic_tlb_handler);
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#endif
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irq_install_handler(81+32, apic_shutdown);
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irq_install_handler(124, apic_lint0);
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