preperation to support memory mapped io
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e97f08d2ea
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3d84f776be
1 changed files with 19 additions and 10 deletions
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@ -83,10 +83,19 @@ static uint32_t iobase = 0;
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static tid_t id;
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static tid_t id;
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static mailbox_uint8_t input_queue;
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static mailbox_uint8_t input_queue;
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#define MEMMAPIO
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#if 1
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#define READ_FROM_UART(x) inportb(iobase + x)
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#define WRITE_TO_UART(x, y) outportb(iobase + x, y)
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#else
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#define READ_FROM_UART(x) inportb(iobase + x)
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#define WRITE_TO_UART(x, y) outportb(iobase + x, y)
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#endif
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/* Get a single character on a serial device */
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/* Get a single character on a serial device */
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static unsigned char uart_getchar(void)
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static unsigned char uart_getchar(void)
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{
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{
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return inportb(iobase + UART_RX);
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return READ_FROM_UART(UART_RX);
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}
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}
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/* Puts a single character on a serial device */
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/* Puts a single character on a serial device */
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@ -95,7 +104,7 @@ int uart_putchar(unsigned char c)
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if (!iobase)
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if (!iobase)
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return 0;
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return 0;
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outportb(iobase + UART_TX, c);
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WRITE_TO_UART(UART_TX, c);
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return (int) c;
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return (int) c;
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}
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}
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@ -117,7 +126,7 @@ int uart_puts(const char *text)
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/* Handles all UART's interrupt */
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/* Handles all UART's interrupt */
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static void uart_handler(struct state *s)
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static void uart_handler(struct state *s)
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{
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{
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unsigned char c = inportb(iobase + UART_IIR);
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unsigned char c = READ_FROM_UART(UART_IIR);
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while (!(c & UART_IIR_NO_INT)) {
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while (!(c & UART_IIR_NO_INT)) {
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if (c & UART_IIR_RDI) {
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if (c & UART_IIR_RDI) {
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@ -126,7 +135,7 @@ static void uart_handler(struct state *s)
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mailbox_uint8_post(&input_queue, c);
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mailbox_uint8_post(&input_queue, c);
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}
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}
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c = inportb(iobase + UART_IIR);
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c = READ_FROM_UART(UART_IIR);
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}
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}
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}
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}
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@ -165,7 +174,7 @@ static void uart_config(void)
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* clear RX and TX FIFO
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* clear RX and TX FIFO
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* set irq trigger to 8 bytes
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* set irq trigger to 8 bytes
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*/
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*/
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outportb(iobase + UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1);
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WRITE_TO_UART(UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1);
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/*
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/*
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* 8bit word length
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* 8bit word length
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@ -174,19 +183,19 @@ static void uart_config(void)
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* set DLAB=1
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* set DLAB=1
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*/
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*/
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char lcr = UART_LCR_WLEN8 | UART_LCR_DLAB;
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char lcr = UART_LCR_WLEN8 | UART_LCR_DLAB;
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outportb(iobase + UART_LCR, lcr);
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WRITE_TO_UART(UART_LCR, lcr);
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/*
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/*
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* set baudrate to 115200 (on qemu)
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* set baudrate to 115200 (on qemu)
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*/
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*/
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outportb(iobase + UART_DLL, 0x01);
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WRITE_TO_UART(UART_DLL, 0x01);
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outportb(iobase + UART_DLM, 0x00);
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WRITE_TO_UART(UART_DLM, 0x00);
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/* set DLAB=0 */
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/* set DLAB=0 */
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outportb(iobase + UART_LCR, lcr & (~UART_LCR_DLAB));
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WRITE_TO_UART(UART_LCR, lcr & (~UART_LCR_DLAB));
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/* enable interrupt */
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/* enable interrupt */
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outportb(iobase + UART_IER, UART_IER_RDI | UART_IER_RLSI | UART_IER_THRI);
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WRITE_TO_UART(UART_IER, UART_IER_RDI | UART_IER_RLSI | UART_IER_THRI);
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}
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}
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int uart_init(void)
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int uart_init(void)
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