2014-10-16 12:44:02 +05:30
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/******************************************************************************
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2015-05-27 18:54:52 +05:30
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* Copyright (C) 2014-2015 Xilinx, Inc. All rights reserved.
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2014-10-16 12:44:02 +05:30
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file mcap_lib.h
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* MCAP Interface Library support header file
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*
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******************************************************************************/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ctype.h>
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#include <sys/types.h>
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#include "pci.h"
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#include "lspci.h"
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#include "byteswap.h"
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/* Register Definitions */
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#define MCAP_EXT_CAP_HEADER 0x00
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#define MCAP_VEND_SPEC_HEADER 0x04
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#define MCAP_FPGA_JTAG_ID 0x08
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#define MCAP_FPGA_BIT_VERSION 0x0C
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#define MCAP_STATUS 0x10
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#define MCAP_CONTROL 0x14
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#define MCAP_DATA 0x18
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#define MCAP_READ_DATA_0 0x1C
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#define MCAP_READ_DATA_1 0x20
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#define MCAP_READ_DATA_2 0x24
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#define MCAP_READ_DATA_3 0x28
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#define MCAP_CTRL_MODE_MASK (1 << 0)
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#define MCAP_CTRL_REG_READ_MASK (1 << 1)
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#define MCAP_CTRL_RESET_MASK (1 << 4)
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#define MCAP_CTRL_MOD_RESET_MASK (1 << 5)
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#define MCAP_CTRL_IN_USE_MASK (1 << 8)
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#define MCAP_CTRL_DESIGN_SWITCH_MASK (1 << 12)
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#define MCAP_CTRL_DATA_REG_PROT_MASK (1 << 16)
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#define MCAP_STS_ERR_MASK (1 << 0)
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#define MCAP_STS_EOS_MASK (1 << 1)
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#define MCAP_STS_REG_READ_CMP_MASK (1 << 4)
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#define MCAP_STS_REG_READ_COUNT_MASK (7 << 5)
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#define MCAP_STS_FIFO_OVERFLOW_MASK (1 << 8)
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#define MCAP_STS_FIFO_OCCUPANCY_MASK (15 << 12)
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#define MCAP_STS_CFG_MCAP_REQ_MASK (1 << 24)
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/* Maximum FIFO Depth */
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#define MCAP_FIFO_DEPTH 16
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/* PCIe Extended Capability Id */
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#define MCAP_EXT_CAP_ID 0xB
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/* Error Values */
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#define EMCAPREQ 120
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#define EMCAPRESET 121
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#define EMCAPMODRESET 122
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#define EMCAPFULLRESET 123
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#define EMCAPWRITE 124
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#define EMCAPREAD 125
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#define EMCAPCFG 126
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#define EMCAPBUSWALK 127
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#define EMCAPCFGACC 128
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#define EMCAP_EOS_RETRY_COUNT 10
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#define EMCAP_EOS_LOOP_COUNT 100
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#define EMCAP_NOOP_VAL 0x2000000
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2015-05-27 18:51:42 +05:30
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/* Bitfile Type */
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#define EMCAP_CONFIG_FILE 0
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#define EMCAP_PARTIALCONFIG_FILE 1
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#undef DEBUG
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#ifndef DEBUG
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#define pr_dbg(fmt, ...) do {} while (0)
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#else
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#define pr_dbg printf
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#endif
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#define pr_info printf
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#define pr_err printf
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/* MCAP Device Information */
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struct mcap_dev {
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struct pci_dev *pdev;
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struct pci_access *pacc;
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unsigned int reg_base;
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u32 is_multiplebit;
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};
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#define MCapRegWrite(mdev, offset, value) \
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pci_write_long(mdev->pdev, mdev->reg_base + offset, value)
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#define MCapRegRead(mdev, offset) \
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pci_read_long(mdev->pdev, mdev->reg_base + offset)
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#define IsResetSet(mdev) \
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(MCapRegRead(mdev, MCAP_CONTROL) & \
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MCAP_CTRL_RESET_MASK ? 1 : 0)
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#define IsModuleResetSet(mdev) \
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(MCapRegRead(mdev, MCAP_CONTROL) & \
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MCAP_CTRL_MOD_RESET_MASK ? 1 : 0)
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#define IsConfigureMCapReqSet(mdev) \
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(MCapRegRead(mdev, MCAP_STATUS) & \
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MCAP_STS_CFG_MCAP_REQ_MASK ? 1 : 0)
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#define IsErrSet(mdev) \
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(MCapRegRead(mdev, MCAP_STATUS) & \
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MCAP_STS_ERR_MASK ? 1 : 0)
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#define IsRegReadComplete(mdev) \
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(MCapRegRead(mdev, MCAP_STATUS) & \
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MCAP_STS_REG_READ_CMP_MASK ? 1 : 0)
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#define IsFifoOverflow(mdev) \
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(MCapRegRead(mdev, MCAP_STATUS) & \
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MCAP_STS_FIFO_OVERFLOW_MASK ? 1 : 0)
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#define GetRegReadCount(mdev) \
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((MCapRegRead(mdev, MCAP_STATUS) & \
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MCAP_STS_REG_READ_COUNT_MASK) >> 5)
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/* Function Prototypes */
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struct mcap_dev *MCapLibInit(int device_id);
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void MCapLibFree(struct mcap_dev *mdev);
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void MCapDumpRegs(struct mcap_dev *mdev);
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void MCapDumpReadRegs(struct mcap_dev *mdev);
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int MCapReset(struct mcap_dev *mdev);
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int MCapModuleReset(struct mcap_dev *mdev);
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int MCapFullReset(struct mcap_dev *mdev);
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int MCapShowDevice(struct mcap_dev *mdev, int verbose);
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2015-05-27 18:51:42 +05:30
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int MCapConfigureFPGA(struct mcap_dev *mdev, char *file_path, u32 bitfile_type);
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2014-10-16 12:44:02 +05:30
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int MCapReadRegisters(struct mcap_dev *mdev, u32 *data);
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int MCapAccessConfigSpace(struct mcap_dev *mdev, int argc, char **argv);
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