2014-06-24 16:45:01 +05:30
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/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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* @file xiicps_eeprom_intr_example.c
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*
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* This file consists of a interrutp mode design example which uses the Xilinx
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* PS IIC device and XIicPs driver to exercise the EEPROM.
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*
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* The XIicPs_MasterSend() API is used to transmit the data and the
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* XIicPs_MasterRecv() API is used to receive the data.
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*
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* The example is tested with a 2Kb/8Kb serial IIC EEPROM (ST M24C02/M24C08).
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* The WP pin of this EEPROM is hardwired to ground on the HW in which this
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* was tested.
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*
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* The AddressType should be u8 as the address pointer in the on-board
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* EEPROM is 1 bytes.
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*
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* This code assumes that no Operating System is being used.
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*
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* @note
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*
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* None.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- ---------------------------------------------------------
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* 1.00a sdm 03/15/10 First release
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* 1.01a sg 04/13/12 Added MuxInit function for initializing the IIC Mux
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* on the ZC702 board and to configure it for accessing
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* the IIC EEPROM.
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* Updated to use usleep instead of delay loop
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* 1.04a hk 09/03/13 Removed GPIO code to pull MUX out of reset - CR#722425.
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2014-10-08 15:16:12 +05:30
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* 2.3 sk 10/07/14 Removed multiple initializations for read buffer.
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2014-06-24 16:45:01 +05:30
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*
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xparameters.h"
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#include "sleep.h"
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#include "xiicps.h"
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#include "xscugic.h"
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#include "xil_exception.h"
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#include "xil_printf.h"
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/************************** Constant Definitions *****************************/
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/*
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* The following constants map to the XPAR parameters created in the
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* xparameters.h file. They are defined here such that a user can easily
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* change all the needed parameters in one place.
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*/
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#define IIC_DEVICE_ID XPAR_XIICPS_0_DEVICE_ID
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#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
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#define IIC_INTR_ID XPAR_XIICPS_0_INTR
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/*
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* The following constant defines the address of the IIC Slave device on the
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* IIC bus. Note that since the address is only 7 bits, this constant is the
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* address divided by 2.
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*/
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#define IIC_SLAVE_ADDR 0x54
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#define IIC_SCLK_RATE 100000
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#define IIC_MUX_ADDRESS 0x74
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/*
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* The page size determines how much data should be written at a time.
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* The write function should be called with this as a maximum byte count.
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*/
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#define PAGE_SIZE 16
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/*
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* The Starting address in the IIC EEPROM on which this test is performed.
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*/
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#define EEPROM_START_ADDRESS 0
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/**************************** Type Definitions *******************************/
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/*
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* The AddressType should be u8 as the address pointer in the on-board
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* EEPROM is 1 byte.
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*/
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typedef u8 AddressType;
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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int IicPsEepromIntrExample(void);
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int EepromWriteData(u16 ByteCount);
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int MuxInit(void);
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int EepromReadData(u8 *BufferPtr, u16 ByteCount);
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static int SetupInterruptSystem(XIicPs * IicInstPtr);
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static void Handler(void *CallBackRef, u32 Event);
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/************************** Variable Definitions *****************************/
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XIicPs IicInstance; /* The instance of the IIC device. */
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XScuGic InterruptController; /* The instance of the Interrupt Controller. */
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/*
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* Write buffer for writing a page.
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*/
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u8 WriteBuffer[sizeof(AddressType) + PAGE_SIZE];
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u8 ReadBuffer[PAGE_SIZE]; /* Read buffer for reading a page. */
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volatile u8 TransmitComplete; /* Flag to check completion of Transmission */
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volatile u8 ReceiveComplete; /* Flag to check completion of Reception */
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volatile u32 TotalErrorCount;
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/************************** Function Definitions *****************************/
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/*****************************************************************************/
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/**
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* Main function to call the Iic EEPROM interrupt example.
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*
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* @param None.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note None.
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*
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******************************************************************************/
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int main(void)
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{
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int Status;
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xil_printf("IIC EEPROM Interrupt Example Test \r\n");
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/*
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* Run the Iic EEPROM interrupt mode example.
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*/
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Status = IicPsEepromIntrExample();
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if (Status != XST_SUCCESS) {
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xil_printf("IIC EEPROM Interrupt Example Test Failed\r\n");
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return XST_FAILURE;
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}
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xil_printf("Successfully ran IIC EEPROM Interrupt Example Test\r\n");
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* This function writes, reads, and verifies the data to the IIC EEPROM. It
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* does the write as a single page write, performs a buffered read.
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*
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* @param None.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note None.
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*
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******************************************************************************/
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int IicPsEepromIntrExample(void)
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{
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u32 Index;
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int Status;
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XIicPs_Config *ConfigPtr; /* Pointer to configuration data */
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AddressType Address = EEPROM_START_ADDRESS;
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/*
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* Initialize the IIC driver so that it is ready to use.
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*/
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ConfigPtr = XIicPs_LookupConfig(IIC_DEVICE_ID);
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if (ConfigPtr == NULL) {
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return XST_FAILURE;
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}
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Status = XIicPs_CfgInitialize(&IicInstance, ConfigPtr,
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ConfigPtr->BaseAddress);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Setup the Interrupt System.
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*/
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Status = SetupInterruptSystem(&IicInstance);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Setup the handlers for the IIC that will be called from the
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* interrupt context when data has been sent and received, specify a
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* pointer to the IIC driver instance as the callback reference so
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* the handlers are able to access the instance data.
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*/
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XIicPs_SetStatusHandler(&IicInstance, (void *) &IicInstance, Handler);
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/*
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* Set the IIC serial clock rate.
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*/
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XIicPs_SetSClk(&IicInstance, IIC_SCLK_RATE);
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/*
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* Set the channel value in IIC Mux.
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*/
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Status = MuxInit();
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Initialize the data to write and the read buffer.
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*/
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if (sizeof(Address) == 1) {
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WriteBuffer[0] = (u8) (Address);
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} else {
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WriteBuffer[0] = (u8) (Address >> 8);
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WriteBuffer[1] = (u8) (Address);
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}
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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WriteBuffer[sizeof(Address) + Index] = 0xFF;
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ReadBuffer[Index] = 0;
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}
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/*
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* Write to the EEPROM.
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*/
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Status = EepromWriteData(sizeof(Address) + PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Read from the EEPROM.
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*/
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Status = EepromReadData(ReadBuffer, PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Verify the data read against the data written.
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*/
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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if (ReadBuffer[Index] != WriteBuffer[Index + sizeof(Address)]) {
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return XST_FAILURE;
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}
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}
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/*
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* Initialize the data to write and the read buffer.
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*/
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if (sizeof(Address) == 1) {
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WriteBuffer[0] = (u8) (Address);
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} else {
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WriteBuffer[0] = (u8) (Address >> 8);
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WriteBuffer[1] = (u8) (Address);
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}
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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WriteBuffer[sizeof(Address) + Index] = Index + 10;
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ReadBuffer[Index] = 0;
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}
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/*
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* Write to the EEPROM.
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*/
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Status = EepromWriteData(sizeof(Address) + PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Read from the EEPROM.
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*/
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Status = EepromReadData(ReadBuffer, PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Verify the data read against the data written.
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*/
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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if (ReadBuffer[Index] != WriteBuffer[Index + sizeof(Address)]) {
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return XST_FAILURE;
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}
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* This function writes a buffer of data to the IIC serial EEPROM.
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*
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* @param ByteCount contains the number of bytes in the buffer to be
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* written.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note The Byte count should not exceed the page size of the EEPROM as
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* noted by the constant PAGE_SIZE.
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*
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******************************************************************************/
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int EepromWriteData(u16 ByteCount)
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{
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TransmitComplete = FALSE;
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/*
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* Send the Data.
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*/
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XIicPs_MasterSend(&IicInstance, WriteBuffer,
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ByteCount, IIC_SLAVE_ADDR);
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/*
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* Wait for the entire buffer to be sent, letting the interrupt
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* processing work in the background, this function may get
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* locked up in this loop if the interrupts are not working
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* correctly.
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*/
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while (TransmitComplete == FALSE) {
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if (0 != TotalErrorCount) {
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return XST_FAILURE;
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}
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}
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/*
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* Wait until bus is idle to start another transfer.
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*/
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while (XIicPs_BusIsBusy(&IicInstance));
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/*
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* Wait for a bit of time to allow the programming to complete
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*/
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usleep(250000);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* This function reads data from the IIC serial EEPROM into a specified buffer.
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*
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* @param BufferPtr contains the address of the data buffer to be filled.
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* @param ByteCount contains the number of bytes in the buffer to be read.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note None.
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*
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******************************************************************************/
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int EepromReadData(u8 *BufferPtr, u16 ByteCount)
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{
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int Status;
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AddressType Address = EEPROM_START_ADDRESS;
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/*
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* Position the Pointer in EEPROM.
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*/
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if (sizeof(Address) == 1) {
|
|
|
|
WriteBuffer[0] = (u8) (Address);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
WriteBuffer[0] = (u8) (Address >> 8);
|
|
|
|
WriteBuffer[1] = (u8) (Address);
|
|
|
|
}
|
|
|
|
|
|
|
|
Status = EepromWriteData(sizeof(Address));
|
|
|
|
if (Status != XST_SUCCESS) {
|
|
|
|
return XST_FAILURE;
|
|
|
|
}
|
|
|
|
|
|
|
|
ReceiveComplete = FALSE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Receive the Data.
|
|
|
|
*/
|
|
|
|
XIicPs_MasterRecv(&IicInstance, BufferPtr,
|
|
|
|
ByteCount, IIC_SLAVE_ADDR);
|
|
|
|
|
|
|
|
while (ReceiveComplete == FALSE) {
|
|
|
|
if (0 != TotalErrorCount) {
|
|
|
|
return XST_FAILURE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait until bus is idle to start another transfer.
|
|
|
|
*/
|
|
|
|
while (XIicPs_BusIsBusy(&IicInstance));
|
|
|
|
|
|
|
|
return XST_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/******************************************************************************/
|
|
|
|
/**
|
|
|
|
*
|
|
|
|
* This function setups the interrupt system such that interrupts can occur
|
|
|
|
* for the IIC.
|
|
|
|
*
|
|
|
|
* @param IicPsPtr contains a pointer to the instance of the Iic
|
|
|
|
* which is going to be connected to the interrupt controller.
|
|
|
|
*
|
|
|
|
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
|
|
|
|
*
|
|
|
|
* @note None.
|
|
|
|
*
|
|
|
|
*******************************************************************************/
|
|
|
|
static int SetupInterruptSystem(XIicPs *IicPsPtr)
|
|
|
|
{
|
|
|
|
int Status;
|
|
|
|
XScuGic_Config *IntcConfig; /* Instance of the interrupt controller */
|
|
|
|
|
|
|
|
Xil_ExceptionInit();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize the interrupt controller driver so that it is ready to
|
|
|
|
* use.
|
|
|
|
*/
|
|
|
|
IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
|
|
|
|
if (NULL == IntcConfig) {
|
|
|
|
return XST_FAILURE;
|
|
|
|
}
|
|
|
|
|
|
|
|
Status = XScuGic_CfgInitialize(&InterruptController, IntcConfig,
|
|
|
|
IntcConfig->CpuBaseAddress);
|
|
|
|
if (Status != XST_SUCCESS) {
|
|
|
|
return XST_FAILURE;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Connect the interrupt controller interrupt handler to the hardware
|
|
|
|
* interrupt handling logic in the processor.
|
|
|
|
*/
|
|
|
|
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
|
|
|
|
(Xil_ExceptionHandler)XScuGic_InterruptHandler,
|
|
|
|
&InterruptController);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Connect the device driver handler that will be called when an
|
|
|
|
* interrupt for the device occurs, the handler defined above performs
|
|
|
|
* the specific interrupt processing for the device.
|
|
|
|
*/
|
|
|
|
Status = XScuGic_Connect(&InterruptController, IIC_INTR_ID,
|
|
|
|
(Xil_InterruptHandler)XIicPs_MasterInterruptHandler,
|
|
|
|
(void *)IicPsPtr);
|
|
|
|
if (Status != XST_SUCCESS) {
|
|
|
|
return Status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable the interrupt for the Iic device.
|
|
|
|
*/
|
|
|
|
XScuGic_Enable(&InterruptController, IIC_INTR_ID);
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable interrupts in the Processor.
|
|
|
|
*/
|
|
|
|
Xil_ExceptionEnable();
|
|
|
|
|
|
|
|
return XST_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************/
|
|
|
|
/**
|
|
|
|
*
|
|
|
|
* This function is the handler which performs processing to handle data events
|
|
|
|
* from the IIC. It is called from an interrupt context such that the amount
|
|
|
|
* of processing performed should be minimized.
|
|
|
|
*
|
|
|
|
* This handler provides an example of how to handle data for the IIC and
|
|
|
|
* is application specific.
|
|
|
|
*
|
|
|
|
* @param CallBackRef contains a callback reference from the driver, in
|
|
|
|
* this case it is the instance pointer for the IIC driver.
|
|
|
|
* @param Event contains the specific kind of event that has occurred.
|
|
|
|
* @param EventData contains the number of bytes sent or received for sent
|
|
|
|
* and receive events.
|
|
|
|
*
|
|
|
|
* @return None.
|
|
|
|
*
|
|
|
|
* @note None.
|
|
|
|
*
|
|
|
|
*******************************************************************************/
|
|
|
|
void Handler(void *CallBackRef, u32 Event)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* All of the data transfer has been finished.
|
|
|
|
*/
|
|
|
|
if (0 != (Event & XIICPS_EVENT_COMPLETE_RECV)){
|
|
|
|
ReceiveComplete = TRUE;
|
|
|
|
} else if (0 != (Event & XIICPS_EVENT_COMPLETE_SEND)) {
|
|
|
|
TransmitComplete = TRUE;
|
|
|
|
} else if (0 == (Event & XIICPS_EVENT_SLAVE_RDY)){
|
|
|
|
/*
|
|
|
|
* If it is other interrupt but not slave ready interrupt, it is
|
|
|
|
* an error.
|
|
|
|
* Data was received with an error.
|
|
|
|
*/
|
|
|
|
TotalErrorCount++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************/
|
|
|
|
/**
|
|
|
|
* This function initializes the IIC MUX to select EEPROM.
|
|
|
|
*
|
|
|
|
* @param None.
|
|
|
|
*
|
|
|
|
* @return XST_SUCCESS if pass, otherwise XST_FAILURE.
|
|
|
|
*
|
|
|
|
* @note None.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
int MuxInit(void)
|
|
|
|
{
|
|
|
|
u8 WriteBuffer;
|
|
|
|
u8 MuxIicAddr = IIC_MUX_ADDRESS;
|
|
|
|
u8 Buffer = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Channel select value for EEPROM.
|
|
|
|
*/
|
|
|
|
WriteBuffer = 0x04;
|
|
|
|
|
|
|
|
TransmitComplete = FALSE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Send the Data.
|
|
|
|
*/
|
|
|
|
XIicPs_MasterSend(&IicInstance, &WriteBuffer,1, MuxIicAddr);
|
|
|
|
while (TransmitComplete == FALSE) {
|
|
|
|
if (0 != TotalErrorCount) {
|
|
|
|
return XST_FAILURE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait until bus is idle to start another transfer.
|
|
|
|
*/
|
|
|
|
while (XIicPs_BusIsBusy(&IicInstance));
|
|
|
|
|
|
|
|
ReceiveComplete = FALSE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Receive the Data.
|
|
|
|
*/
|
|
|
|
XIicPs_MasterRecv(&IicInstance, &Buffer,1, MuxIicAddr);
|
|
|
|
while (ReceiveComplete == FALSE) {
|
|
|
|
if (0 != TotalErrorCount) {
|
|
|
|
return XST_FAILURE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait until bus is idle to start another transfer.
|
|
|
|
*/
|
|
|
|
while (XIicPs_BusIsBusy(&IicInstance));
|
|
|
|
|
|
|
|
return XST_SUCCESS;
|
|
|
|
}
|