<tr><tdclass="memItemLeft"align="right"valign="top">int </td><tdclass="memItemRight"valign="bottom"><aclass="el"href="xsysmon_8c.html#a44e6fba16cf4b8cc69301523ed8344ce">XSysMon_SetSingleChParams</a> (<aclass="el"href="struct_x_sys_mon.html">XSysMon</a> *InstancePtr, u8 Channel, int IncreaseAcqCycles, int IsEventMode, int IsDifferentialMode)</td></tr>
<tr><tdclass="memItemLeft"align="right"valign="top">void </td><tdclass="memItemRight"valign="bottom"><aclass="el"href="xsysmon_8c.html#a415023d979e637bac035cf6f902ab256">XSysMon_SetSequencerEvent</a> (<aclass="el"href="struct_x_sys_mon.html">XSysMon</a> *InstancePtr, int IsEventMode)</td></tr>
<p>This function initializes a specific <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> device/instance. This function must be called prior to using the System Monitor/ADC device.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>ConfigPtr</em> </td><td>points to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> device configuration structure. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>EffectiveAddr</em> </td><td>is the device base address in the virtual memory address space. If the address translation is not used then the physical address is passed. Unexpected errors may occur if the address mapping is changed after this function is invoked.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The user needs to first call the <aclass="el"href="xsysmon_8h.html#a02fbbb117ca8d4002ff222dcf2e4892d">XSysMon_LookupConfig()</a> API which returns the Configuration structure pointer which is passed as a parameter to the <aclass="el"href="xsysmon_8c.html#a543ff01a3a1c5b625c2b874cbb809465">XSysMon_CfgInitialize()</a> API. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>This API should be used only with V6 SysMon/7 Series and Zynq XADC since the upper threshold of OverTemp is programmable in only V6 SysMon/7 Series and Zynq XADC. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>This API should be used only with V6/7 Series since the upper threshold of OverTemp is programmable in only V6 SysMon/7 Series and Zynq XADC. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The divisor read from the Configuration Register 2.</dd></dl>
<dlclass="note"><dt><b>Note:</b></dt><dd>The ADCCLK is an internal clock used by the ADC and is synchronized to the DCLK clock. The ADCCLK is equal to DCLK divided by the user selection in the Configuration Register 2. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Channel</em> </td><td>is the channel number. Use the XSM_CH_* defined in the file <aclass="el"href="xsysmon_8h.html">xsysmon.h</a>. The valid channels are 0 to 5 and 16 to 31 for all the device families. Channel 6 is valid for 7 Series and Zynq. Channel 13, 14, 15 are valid for Zynq. 32 to 35 are valid for Ultrascale.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 16-bit value representing the ADC converted data for the specified channel. The System Monitor/ADC device guarantees a 10 bit resolution for the ADC converted data and data is the 10 MSB bits of the 16 data read from the device.</dd></dl>
<dlclass="note"><dt><b>Note:</b></dt><dd>The channels 7,8,9 are used for calibration of the device and hence there is no associated data with this channel. Please make sure that the proper channel number is passed. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>This is the bit-mask of the enabled alarm outputs in the Configuration Register 1. Use the masks XSM_CFR_ALM_*, XSM_CFR_ALM*_* and XSM_CFR_OT_MASK defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the returned value.</dd></dl>
<p>Bit positions of 1 indicate that the alarm output is enabled. Bit positions of 0 indicate that the alarm output is disabled.</p>
<dlclass="note"><dt><b>Note:</b></dt><dd>The implementation of the alarm enables in the Configuration register 1 is such that alarms for the bit positions of 1 will be disabled and alarms for bit positions of 0 will be enabled. The enabled alarm outputs returned by this function is the negated value of the the data read from the Configuration Register 1. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 32-bit value read from the Alarm Output Register. Use the XSM_AOR_*_MASK constants defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the value.</dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>AlarmThrReg</em> </td><td>is the index of an Alarm Threshold Register to be read. Use XSM_ATR_* constants defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a> to specify the index.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 16-bit value representing the contents of the selected Alarm Threshold Register.</dd></dl>
<dlclass="note"><dt><b>Note:</b></dt><dd>Over Temperature upper threshold is programmable only in V6 and 7 Series XADC BRAM high and low voltage threshold registers are available only in 7 Series and Zynq XADC. All the remaining Alarm Threshold registers specified by the constants XSM_ATR_*, are available in all the families of the Sysmon. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The averaging read from the Configuration Register 0 is returned. Use the XSM_AVG_* bit definitions defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a> file to interpret the returned value :<ul>
<li>XSM_AVG_0_SAMPLES means no averaging</li>
<li>XSM_AVG_16_SAMPLES means 16 samples of averaging</li>
<li>XSM_AVG_64_SAMPLES means 64 samples of averaging</li>
<li>XSM_AVG_256_SAMPLES means 256 samples of averaging</li>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>CoeffType</em> </td><td>specifies the calibration coefficient to be read. Use XSM_CALIB_* constants defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a> to specify the calibration coefficient to be read.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 16-bit value representing the calibration coefficient. The System Monitor/ADC device guarantees a 10 bit resolution for the ADC converted data and data is the 10 MSB bits of the 16 data read from the device.</dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>MeasurementType</em> </td><td>specifies the parameter for which the Minimum/Maximum measurement has to be read. Use XSM_MAX_* and XSM_MIN_* constants defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a> to specify the data to be read.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 16-bit value representing the maximum/minimum measurement for specified parameter. The System Monitor/ADC device guarantees a 10 bit resolution for the ADC converted data and data is the 10 MSB bits of 16 bit data read from the device. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 12-bit OT Upper Alarm Register powerdown value.</dd></dl>
<dlclass="note"><dt><b>Note:</b></dt><dd>This API has been deprecated. Use <aclass="el"href="xsysmon_8c.html#adacbf7c393aa18cacfc08e267db5e87b">XSysMon_GetAlarmThreshold()</a>, instead. This API should be used only with V6/7 Series since the upper threshold of OverTemp is programmable in only V6 SysMon/7 Series and Zynq XADC. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The acquisition time for all the channels. Use XSM_SEQ_CH__* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the Channel numbers. Bit masks of 1 are the channels for which acquisition cycles are extended and bit mask of 0 are the channels for which acquisition cycles are not extended.</dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The status of averaging (enabled/disabled) for all the channels. Use XSM_SEQ_CH__* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the Channel numbers. Bit masks of 1 are the channels for which averaging is enabled and bit mask of 0 are the channels for averaging is disabled.</dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>Gets the channel enable bits. Use XSM_SEQ_CH_* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the Channel numbers. Bit masks of 1 are the channels that are enabled and bit mask of 0 are the channels that are disabled.</dd>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>The input mode for all the channels. Use XSM_SEQ_CH_* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the Channel numbers. Bit masks of 1 are the channels for which input mode is differential and bit mask of 0 are the channels for which input mode is unipolar.</dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="return"><dt><b>Returns:</b></dt><dd>A 32-bit value representing the contents of the Status Register. Use the XSM_SR_*_MASK constants defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to interpret the returned value.</dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The Control registers in the SystemMonitor/ADC Hard Macro are not affected by this reset, only the Status registers are reset. Refer to the device data sheet for the device status and register values after the reset. Use the <aclass="el"href="xsysmon_8c.html#a9efcdd44a813be1e9b0e33b64c616cb3">XSysMon_ResetAdc()</a> to reset only the SystemMonitor/ADC Hard Macro. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The Control registers in the SystemMonitor/ADC Hard Macro are not affected by this reset, only the Status registers are reset. This reset causes the ADC to begin with a new conversion. Refer to the device data sheet for the device status and register values after the reset. Use the <aclass="el"href="xsysmon_8c.html#a7f77755a291cf2bac28ff12a5cdd5d8a">XSysMon_Reset()</a> API to reset both the SystemMonitor/ADC Hard Macro and the SYSMON ADC Core Logic. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Divisor</em> </td><td>is clock divisor used to derive ADCCLK from DCLK. Valid values of the divisor are</p>
<ul>
<li>8 to 255 for V5 SysMon.</li>
<li>0 to 255 for V6/7 Series and Zynq XADC. Values 0, 1, 2 are all mapped to 2. Refer to the device specification for more details.</li>
<dlclass="note"><dt><b>Note:</b></dt><dd>- The ADCCLK is an internal clock used by the ADC and is synchronized to the DCLK clock. The ADCCLK is equal to DCLK divided by the user selection in the Configuration Register 2.<ul>
<li>There is no Assert on the minimum value of the Divisor. Users must take care such that the minimum value of Divisor used is 8, in case of V5 SysMon. </li>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>AlmEnableMask</em> </td><td>is the bit-mask of the alarm outputs to be enabled in the Configuration Register 1. Bit positions of 1 will be enabled. Bit positions of 0 will be disabled. This mask is formed by OR'ing XSM_CFR_ALM_*_MASK, XSM_CFR_ALM_*_MASK and XSM_CFR_OT_MASK masks defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a>.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The implementation of the alarm enables in the Configuration register 1 is such that the alarms for bit positions of 1 will be disabled and alarms for bit positions of 0 will be enabled. The alarm outputs specified by the AlmEnableMask are negated before writing to the Configuration Register 1. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>AlarmThrReg</em> </td><td>is the index of an Alarm Threshold Register to be set. Use XSM_ATR_* constants defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a> to specify the index. </td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>Over Temperature upper threshold is programmable only in V6, 7 Series/Zynq XADC and UltraScale. BRAM high and low voltage threshold registers are available only in 7 Series XADC and UltraScale. VUSER0 to VUSER3 threshold registers are available only in UltraScale. All the remaining Alarm Threshold registers specified by the constants XSM_ATR_*, are available in all the families of the Sysmon. </dd></dl>
<p>This function sets the number of samples of averaging that is to be done for all the channels in both the single channel mode and sequence mode of operations.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Average</em> </td><td>is the number of samples of averaging programmed to the Configuration Register 0. Use the XSM_AVG_* definitions defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a> file :</p>
<ul>
<li>XSM_AVG_0_SAMPLES for no averaging</li>
<li>XSM_AVG_16_SAMPLES for 16 samples of averaging</li>
<li>XSM_AVG_64_SAMPLES for 64 samples of averaging</li>
<li>XSM_AVG_256_SAMPLES for 256 samples of averaging</li>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Calibration</em> </td><td>is the Calibration to be applied. Use XSM_CFR1_CAL*_* bits defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a>. Multiple calibrations can be enabled at a time by oring the XSM_CFR1_CAL_ADC_* and XSM_CFR1_CAL_PS_* bits. Calibration can be disabled by specifying XSM_CFR1_CAL_DISABLE_MASK;</td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Channel</em> </td><td>is the channel number used to connect to the external Mux. The valid channels are 0 to 6, 8, and 16 to 31.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The External Mux is only available in 7 Series and Zynq XADC. This API should be used only with 7 Series and Zynq XADC. </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Value</em> </td><td>is the 16-bit OT Upper Alarm Register powerdown value. Valid values are 0 to 0x0FFF.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>This API has been deprecated. Use <aclass="el"href="xsysmon_8c.html#af9d2de8d4141ae1e7e073ea296df739d">XSysMon_SetAlarmThreshold()</a>, instead. This API should be used only with V6/7 Series since the upper threshold of OverTemp is programmable in in only V6 SysMon/7 Series and Zynq XADC. </dd></dl>
<p>This function sets the number of Acquisition cycles in the ADC Channel Acquisition Time Sequencer Registers. The sequencer must be in the Safe Mode before writing to these registers.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>AcqCyclesChMask</em> </td><td>is the bit mask of all the channels for which the number of acquisition cycles is to be extended. Use XSM_SEQ_CH__* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to specify the Channel numbers. Acquisition cycles will be extended to 10 ADCCLK cycles for bit masks of 1 and will be the default 4 ADCCLK cycles for bit masks of 0. The AcqCyclesChMask is a 32 bit mask that is written to the two 16 bit ADC Channel Acquisition Time Sequencer Registers.</td></tr>
<p>This function enables the averaging for the specified channels in the ADC Channel Averaging Enable Sequencer Registers. The sequencer must be in the Safe Mode before writing to these registers.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>AvgEnableChMask</em> </td><td>is the bit mask of all the channels for which averaging is to be enabled. Use XSM_SEQ_CH__* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to specify the Channel numbers. Averaging will be enabled for bit masks of 1 and disabled for bit mask of 0. The AvgEnableChMask is a 64 bit mask that is written to the three 16 bit ADC Channel Averaging Enable Sequencer Registers.</td></tr>
<p>This function enables the specified channels in the ADC Channel Selection Sequencer Registers. The sequencer must be in the Safe Mode before writing to these registers.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>ChEnableMask</em> </td><td>is the bit mask of all the channels to be enabled. Use XSM_SEQ_CH_* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to specify the Channel numbers. Bit masks of 1 will be enabled and bit mask of 0 will be disabled. The ChEnableMask is a 64 bit mask that is written to the three 16 bit ADC Channel Selection Sequencer Registers.</td></tr>
<p>This function sets the Analog input mode for the specified channels in the ADC Channel Analog-Input Mode Sequencer Registers. The sequencer must be in the Safe Mode before writing to these registers.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InputModeChMask</em> </td><td>is the bit mask of all the channels for which the input mode is differential mode. Use XSM_SEQ_CH__* defined in <aclass="el"href="xsysmon__hw_8h.html">xsysmon_hw.h</a> to specify the channel numbers. Differential input mode will be set for bit masks of 1 and unipolar input mode for bit masks of 0. The InputModeChMask is a 32 bit mask that is written to the two 16 bit ADC Channel Analog-Input Mode Sequencer Registers.</td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>IsEventMode</em> </td><td>is a boolean parameter that specifies continuous sampling (specify FALSE) or event driven sampling mode (specify TRUE) for the given channel.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The Event mode is only available in 7 Series XADC and Zynq. This API should be used only with 7 Series XADC and Zynq . </dd></dl>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>SequencerMode</em> </td><td>is the sequencer mode to be set. Use XSM_SEQ_MODE_* bits defined in <aclass="el"href="xsysmon_8h.html">xsysmon.h</a>.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>Only one of the modes can be enabled at a time. </dd></dl>
</div>
</div>
<aclass="anchor"id="a44e6fba16cf4b8cc69301523ed8344ce"></a><!-- doxytag: member="xsysmon.c::XSysMon_SetSingleChParams" ref="a44e6fba16cf4b8cc69301523ed8344ce" args="(XSysMon *InstancePtr, u8 Channel, int IncreaseAcqCycles, int IsEventMode, int IsDifferentialMode)" -->
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>Channel</em> </td><td>is the channel number for conversion. The valid channels are 0 to 5, 8, and 16 to 31. Channel 6 is valid for 7 series and Zynq XADC. Channel 32 to 35 are valid for Ultrascale. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>IncreaseAcqCycles</em> </td><td>is a boolean parameter which specifies whether the Acquisition time for the external channels has to be increased to 10 ADCCLK cycles (specify TRUE) or remain at the default 4 ADCCLK cycles (specify FALSE). This parameter is only valid for the external channels. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>IsEventMode</em> </td><td>is a boolean parameter that specifies continuous sampling (specify FALSE) or event driven sampling mode (specify TRUE) for the given channel. </td></tr>
<tr><tdvalign="top"></td><tdvalign="top"><em>IsDifferentialMode</em> </td><td>is a boolean parameter which specifies unipolar(specify FALSE) or differential mode (specify TRUE) for the analog inputs. The input mode is only valid for the external channels. </td></tr>
<li>The number of samples for the averaging for all the channels is set by using the function XSysMon_SetAvg.</li>
<li>The calibration of the device is done by doing a ADC conversion on the calibration channel(channel 8). The input parameters IncreaseAcqCycles, IsDifferentialMode and IsEventMode are not valid for this channel. </li>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<p>This function starts the ADC conversion in the Single Channel event driven sampling mode. The EOC bit in Status Register will be set once the conversion is finished. Refer to the device specification for more details.</p>
<tr><tdvalign="top"></td><tdvalign="top"><em>InstancePtr</em> </td><td>is a pointer to the <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> instance.</td></tr>
<dlclass="note"><dt><b>Note:</b></dt><dd>The default state of the CONVST bit is a logic 0. The conversion is started when the CONVST bit is set to 1 from 0. This bit is cleared in this function so that the next conversion can be started by setting this bit. </dd></dl>
