2014-08-08 01:31:46 -07:00
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/*******************************************************************************
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*
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* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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*******************************************************************************/
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/******************************************************************************/
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/**
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*
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* @file xdptx_mst_example.c
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*
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* Contains a design example using the XDptx driver in multi-stream transport
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* (MST) mode.
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*
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* @note When topology discovery is enabled, the required stack size will
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* be larger than the default that SDK sets of 0x400. Increase the
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* stack size if the ALLOCATE_FROM_SINKLIST option is used. Testing
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* was done with a stack size of 0x1000.
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* @note For this example to display output, the user will need to
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* implement initialization of the system (Dptx_PlatformInit) and,
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* after training is complete, implement configuration of the video
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* stream source in order to provide the DisplayPort core with
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* input. See XAPP1178 for reference.
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* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
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* extern in xdptx_example_common.h and are left up to the user to
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* implement.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a als 08/07/14 Initial creation.
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* </pre>
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*
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*******************************************************************************/
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/******************************* Include Files ********************************/
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#include "xdptx_example_common.h"
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/**************************** Constant Definitions ****************************/
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/* The number of streams to enable. */
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#define NUM_STREAMS 4
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/* This enables topology discovery which will create a list of sinks in the
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* topology. If ALLOCATE_FROM_SINKLIST is defined, the streams will sent to
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* to the sinks with the corresponding index. See the function calls for
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* the XDptx_SetStreamSelectFromSinkList driver function below. */
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#define ALLOCATE_FROM_SINKLIST
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#ifdef ALLOCATE_FROM_SINKLIST
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/* Define the mapping between sinks and streams. The sink numbers are in the
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* order that they are discovered by the XDptx_FindAccessibleDpDevices driver
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* function. */
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#define STREAM1_USE_SINKNUM 0
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#define STREAM2_USE_SINKNUM 1
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#define STREAM3_USE_SINKNUM 2
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#define STREAM4_USE_SINKNUM 3
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#endif
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/* The video resolution from the display mode timings (DMT) table to use for
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* each stream. */
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#define USE_VIDEO_MODE XDPTX_VM_1920x1080_60_P
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/* The color depth (bits per color component) to use for each stream. */
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#define USE_BPC 8
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/**************************** Function Prototypes *****************************/
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u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId);
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/**************************** Function Definitions ****************************/
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/******************************************************************************/
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/**
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* This function is the main function of the XDptx multi-stream transport (MST)
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* example.
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*
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* @param None.
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*
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* @return
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* - XST_FAILURE if the MST example was unsuccessful - system
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* setup failed.
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*
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* @note Unless setup failed, main will never return since
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* Dptx_MstExample is blocking.
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*
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*******************************************************************************/
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int main(void)
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{
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/* Run the XDptx MST example. */
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Dptx_MstExample(&DptxInstance, DPTX_DEVICE_ID);
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return XST_FAILURE;
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}
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/******************************************************************************/
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/**
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* The main entry point for the multi-stream transport (MST) example using the
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* XDptx driver. This function will either discover the topology and map streams
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* to the sinks in the sink list, or map streams to relative addresses.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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* @param DeviceId is the unique device ID of the DisplayPort TX core
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* instance.
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*
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* @return
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* - XST_FAILURE if the system setup failed.
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* - XST_SUCCESS should never return since this function, if setup
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* was successful, is blocking.
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*
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* @note If system setup was successful, this function is blocking.
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*
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*******************************************************************************/
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u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId)
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{
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u32 Status;
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XDptx_VideoMode VideoMode = USE_VIDEO_MODE;
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u8 Bpc = USE_BPC;
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u32 MaskVal;
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/* Enable multi-stream transport (MST) mode for this example. */
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XDptx_MstCfgModeEnable(InstancePtr);
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if (NUM_STREAMS >= 1) {
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XDptx_MstCfgStreamEnable(InstancePtr, XDPTX_STREAM_ID1);
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}
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if (NUM_STREAMS >= 2) {
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XDptx_MstCfgStreamEnable(InstancePtr, XDPTX_STREAM_ID2);
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}
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if (NUM_STREAMS >= 3) {
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XDptx_MstCfgStreamEnable(InstancePtr, XDPTX_STREAM_ID3);
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}
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if (NUM_STREAMS >= 4) {
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XDptx_MstCfgStreamEnable(InstancePtr, XDPTX_STREAM_ID4);
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}
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/* Do platform initialization here. This is hardware system specific -
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* it is up to the user to implement this function. */
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Dptx_PlatformInit();
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/******************/
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Status = Dptx_SetupExample(InstancePtr, DeviceId);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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2014-08-10 16:10:18 -07:00
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Status = XDptx_MstCapable(InstancePtr);
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if (Status != XST_SUCCESS) {
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xil_printf("The immediate downstream DisplayPort device does "
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"not have MST capabilities.\n");
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/* If the immediate downstream RX device is an MST monitor and
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* the DisplayPort Configuration Data (DPCD) does not indicate
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* MST capability, it is likely that the MST or DisplayPort v1.2
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* option must be selected from the monitor's option menu. */
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xil_printf("Check that the RX device is operating with a "
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"DisplayPort version greater or equal to 1.2.\n");
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return XST_FAILURE;
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}
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2014-08-08 01:31:46 -07:00
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/* A DisplayPort connection must exist at this point. See the interrupt
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* and polling examples for waiting for connection events. */
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Status = Dptx_StartLink(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
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XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
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XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID1, Bpc);
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XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID2, Bpc);
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XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID3, Bpc);
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XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID4, Bpc);
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Status = XDptx_GetRxCapabilities(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#ifndef ALLOCATE_FROM_SINKLIST
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u8 Lct;
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u8 Rad[15];
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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Lct = 2; Rad[0] = 8;
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XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID1, Lct, Rad);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
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Lct = 3; Rad[0] = 1; Rad[1] = 8;
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XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID2, Lct, Rad);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
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Lct = 4; Rad[0] = 1; Rad[1] = 1; Rad[2] = 8;
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XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID3, Lct, Rad);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID4)) {
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Lct = 4; Rad[0] = 1; Rad[1] = 1; Rad[2] = 9;
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XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID4, Lct, Rad);
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}
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#else
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xil_printf("Find topology >>>\n");
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InstancePtr->Topology.NodeTotal = 0;
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InstancePtr->Topology.SinkTotal = 0;
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XDptx_FindAccessibleDpDevices(InstancePtr, 1, NULL);
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xil_printf("<<< Find topology DONE.\n");
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID1,
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STREAM1_USE_SINKNUM);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID2,
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STREAM2_USE_SINKNUM);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID3,
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STREAM3_USE_SINKNUM);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID4,
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STREAM4_USE_SINKNUM);
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}
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#endif
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/* Disable MST for now. */
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XDptx_MstDisable(InstancePtr);
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID1,
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VideoMode);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
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XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID2,
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VideoMode);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
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XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID3,
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VideoMode);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID4)) {
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XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID4,
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VideoMode);
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}
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/* Disable main stream to force sending of IDLE patterns. */
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XDptx_DisableMainLink(InstancePtr);
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/* Reset the transmitter. */
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET,
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XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET, 0x0);
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/* Set the video modes for each stream. */
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
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XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID1);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
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XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID2);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
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XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID3);
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}
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if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID4)) {
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XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID4);
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}
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/* Configure video stream source or generator here. This function needs
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* to be implemented in order for video to be displayed and is hardware
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* system specific. It is up to the user to implement this function. */
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Dptx_StreamSrcSetup(InstancePtr);
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Dptx_StreamSrcConfigure(InstancePtr);
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Dptx_StreamSrcSync(InstancePtr);
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////////////////////////////////////
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/* Reset the transmitter. */
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET,
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XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET, 0x0);
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/* Mask interrupts while allocating payloads. */
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MaskVal = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
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XDPTX_INTERRUPT_MASK);
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
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0x3F);
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/* Allocate payloads. */
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XDptx_MstEnable(InstancePtr);
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XDptx_AllocatePayloadStreams(InstancePtr);
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/* Reset the transmitter. */
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET,
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XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET, 0x0);
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/* Sync the stream source to the DisplayPort TX if needed. */
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Dptx_StreamSrcSync(InstancePtr);
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////////////////////////////////////
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/* Enable the main link. */
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XDptx_EnableMainLink(InstancePtr);
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/* Unmask interrupts. */
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
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MaskVal);
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|
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|
|
|
|
/* Do not return. */
|
|
|
|
while (1);
|
|
|
|
|
|
|
|
return XST_SUCCESS;
|
|
|
|
}
|