423 lines
12 KiB
C
423 lines
12 KiB
C
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/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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* @file xbram_intr_example.c
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*
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* This file contains a design example using the BRAM driver
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* (XBram) in an interrupt driven mode of operation. This example assumes
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* that there is an interrupt controller in the hardware system and the
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* BRAM device is connected to the interrupt controller.
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*
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a sa 05/11/10 Initial release.
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* 3.01a sa 13/01/12 Changed XBram_SelfTest(InstancePtr) to
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* XBram_SelfTest(InstancePtr, XBRAM_IR_ALL_MASK)
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* as per new API (CR 639274)
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*</pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xparameters.h"
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#include "xbram.h"
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#include "xil_exception.h"
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#include "xintc.h"
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#include "xil_cache.h"
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#include <stdio.h>
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/************************** Constant Definitions *****************************/
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/*
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* The following constants map to the XPAR parameters created in the
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* xparameters.h file. They are defined here such that a user can easily
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* change all the needed parameters in one place.
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*/
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#define BRAM_DEVICE_ID XPAR_BRAM_1_DEVICE_ID
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#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID
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#define INTC_BRAM_INTERRUPT_ID XPAR_INTC_0_BRAM_1_VEC_ID
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/************************** Function Prototypes ******************************/
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static void BramIntrExceptionHandler(void *InstancePtr);
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static void BramDriverHandler(void *CallBackRef);
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int BramIntrExample(XIntc* IntcInstancePtr, XBram* InstancePtr,
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u16 DeviceId, u16 IntrId);
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static void InitializeECC(XBram_Config *ConfigPtr, u32 EffectiveAddr);
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static int BramSetupIntrSystem(XIntc* IntcInstancePtr, XBram* InstancePtr,
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u16 DeviceId, u16 IntrId);
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static void BramDisableIntr(XIntc* IntcInstancePtr, XBram* InstancePtr,
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u16 IntrId);
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/************************** Variable Definitions *****************************/
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/*
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* The following are declared globally so they are zeroed and so they are
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* easily accessible from a debugger
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*/
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XBram Bram; /* The Instance of the BRAM Driver */
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XIntc Intc; /* The Instance of the Interrupt Controller Driver */
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static volatile u32 IntrCount; /* Total number of interrupts */
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static volatile int ExceptionCount; /* Total number of exceptions */
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/****************************************************************************/
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/**
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* This function is the main function of the BRAM example. It is
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* for initializing the BRAM device and setting up interrupts.
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*
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* @param None.
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*
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* @return
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* - XST_SUCCESS to indicate success.
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* - XST_FAILURE to indicate failure.
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*
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* @note None.
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*
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*****************************************************************************/
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#ifndef TESTAPP_GEN
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int main(void)
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{
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int Status;
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Status = BramIntrExample(&Intc, &Bram, BRAM_DEVICE_ID,
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INTC_BRAM_INTERRUPT_ID);
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if (Status != XST_SUCCESS ) {
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xil_printf("Bram Interrupt Example FAILED.\r\n");
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return XST_FAILURE;
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}
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xil_printf("Bram Interrupt Example PASSED.\r\n");
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return XST_SUCCESS;
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}
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#endif
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/*****************************************************************************/
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/**
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*
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* This is the entry function from the TestAppGen tool generated application
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* which tests the interrupts when enabled in the BRAM
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*
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* @param IntcInstancePtr is a reference to the Interrupt Controller
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* driver Instance
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* @param InstancePtr is a reference to the BRAM driver Instance
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* @param DeviceId is the XPAR_<BRAM_instance>_DEVICE_ID
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* value from xparameters.h
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* @param IntrId is XPAR_<INTC_instance>_<BRAM_instance>_VEC_ID
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* value from xparameters.h
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*
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* @return
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* - XST_SUCCESS if the example is successful.
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* - XST_FAILURE if the example failed.
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*
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* @note None.
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*
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******************************************************************************/
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int BramIntrExample(XIntc* IntcInstancePtr, XBram* InstancePtr,
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u16 DeviceId, u16 IntrId)
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{
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int Status;
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XBram_Config *ConfigPtr;
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/*
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* Initialize the BRAM driver. If an error occurs then exit
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*/
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/*
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* Lookup configuration data in the device configuration table.
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* Use this configuration info down below when initializing this
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* driver.
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*/
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ConfigPtr = XBram_LookupConfig(DeviceId);
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if (ConfigPtr == (XBram_Config *) NULL) {
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return XST_FAILURE;
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}
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Status = XBram_CfgInitialize(InstancePtr, ConfigPtr,
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ConfigPtr->CtrlBaseAddress);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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InitializeECC(ConfigPtr, ConfigPtr->CtrlBaseAddress);
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Status = BramSetupIntrSystem(IntcInstancePtr,
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InstancePtr, DeviceId,
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IntrId);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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IntrCount = 0;
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ExceptionCount = 0;
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/*
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* Execute the BRAM driver selftest, and then disable exceptions again.
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* Running the driver test will inject errors if Fault Injection is
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* enabled.
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*/
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Status = XBram_SelfTest(InstancePtr, XBRAM_IR_ALL_MASK);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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BramDisableIntr(IntcInstancePtr, InstancePtr, IntrId);
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if (InstancePtr->Config.FaultInjectionPresent) {
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if (ExceptionCount == 0 &&
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InstancePtr->Config.UncorrectableFailingDataRegs) {
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return XST_FAILURE;
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}
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if (IntrCount == 0 &&
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InstancePtr->Config.EccStatusInterruptPresent) {
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return XST_FAILURE;
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}
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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*
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* This function performs the BRAM set up for Interrupts
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*
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* @param IntcInstancePtr is a reference to the Interrupt Controller
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* driver Instance
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* @param InstancePtr is a reference to the BRAM driver Instance
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* @param DeviceId is the XPAR_<BRAM_instance>_DEVICE_ID
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* value from xparameters.h
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* @param IntrId is XPAR_<INTC_instance>_<BRAM_instance>_INTERRUPT_INTR
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* value from xparameters.h
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*
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* @return
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* - XST_SUCCESS if the interrupt setup is successful.
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* - XST_FAILURE if interrupt setup is not successful.
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*
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* @note None.
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*
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******************************************************************************/
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static int BramSetupIntrSystem(XIntc* IntcInstancePtr, XBram* InstancePtr,
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u16 DeviceId, u16 IntrId)
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{
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int Status;
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#ifndef TESTAPP_GEN
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/*
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* Initialize the interrupt controller driver so that it's ready to
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* use.specify the device ID that was generated in xparameters.h
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*/
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Status = XIntc_Initialize(IntcInstancePtr, INTC_DEVICE_ID);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#endif
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/*
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* Hook up interrupt Bram handler
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*/
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Status = XIntc_Connect(IntcInstancePtr, IntrId,
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(XInterruptHandler)BramDriverHandler,
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InstancePtr);
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/*
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* Enable the BRAM interrupts so that errors can be detected
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*/
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XBram_InterruptEnable(InstancePtr, XBRAM_IR_ALL_MASK);
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/*
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* Enable the interrupt vector at the interrupt controller
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*/
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XIntc_Enable(IntcInstancePtr, IntrId);
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#ifndef TESTAPP_GEN
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/*
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* Initialize the exception table and register the interrupt
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* controller handler with the exception table
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*/
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Xil_ExceptionInit();
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Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
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(Xil_ExceptionHandler)XIntc_InterruptHandler,
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IntcInstancePtr);
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#endif
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/*
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* Set up exception handlers for bus error exceptions.
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*/
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Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IPLB_EXCEPTION,
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(Xil_ExceptionHandler)BramIntrExceptionHandler,
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0);
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Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_DPLB_EXCEPTION,
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(Xil_ExceptionHandler)BramIntrExceptionHandler,
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0);
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#ifndef TESTAPP_GEN
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/*
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* Enable exceptions.
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*/
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Xil_ExceptionEnable();
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/*
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* Start the interrupt controller such that interrupts are recognized
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* and handled by the processor
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*/
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Status = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#endif
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return XST_SUCCESS;
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}
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/****************************************************************************/
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/**
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*
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* This function ensures that ECC in the BRAM is initialized if no hardware
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* initialization is available. The ECC bits are initialized by reading and
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* writing data in the memory. This code is not optimized to only read data
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* in initialized sections of the BRAM.
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*
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* @param ConfigPtr is a reference to a structure containing information
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* about a specific BRAM device.
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* @param EffectiveAddr is the device base address in the virtual memory
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* address space.
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*
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* @return
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* None
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*
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* @note None.
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*
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*****************************************************************************/
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static void InitializeECC(XBram_Config *ConfigPtr, u32 EffectiveAddr)
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{
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u32 Addr;
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volatile u32 Data;
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if (ConfigPtr->EccPresent &&
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ConfigPtr->EccOnOffRegister &&
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ConfigPtr->EccOnOffResetValue == 0 &&
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ConfigPtr->WriteAccess != 0) {
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for (Addr = ConfigPtr->MemBaseAddress;
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Addr < ConfigPtr->MemHighAddress; Addr+=4) {
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Data = XBram_In32(Addr);
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XBram_Out32(Addr, Data);
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}
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XBram_WriteReg(EffectiveAddr, XBRAM_ECC_ON_OFF_OFFSET, 1);
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}
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}
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/*****************************************************************************/
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/**
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*
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* This is the interrupt handler routine for the BRAM interrupt for this example.
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*
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* @param CallbackRef is the Callback reference for the handler.
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*
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* @return None.
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*
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* @note None.
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*
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******************************************************************************/
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static void BramDriverHandler(void *CallbackRef)
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{
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XBram *BramPtr = (XBram *)CallbackRef;
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IntrCount++;
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/*
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* Clear the Interrupt
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*/
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XBram_InterruptClear(BramPtr, XBRAM_IR_ALL_MASK);
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}
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/*****************************************************************************/
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/**
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*
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* This function disables the interrupts for the BRAM and disables Exceptions.
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*
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* @param IntcInstancePtr is a pointer to the Interrupt Controller
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* driver Instance
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* @param InstancePtr is a pointer to the BRAM driver Instance
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* @param IntrId is XPAR_<INTC_instance>_<BRAM_instance>_VEC_ID
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* value from xparameters.h
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*
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* @return None
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*
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* @note None
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|
|
*
|
||
|
|
******************************************************************************/
|
||
|
|
static void BramDisableIntr(XIntc* IntcInstancePtr, XBram* InstancePtr, u16 IntrId)
|
||
|
|
{
|
||
|
|
XBram_InterruptDisable(InstancePtr, XBRAM_IR_ALL_MASK);
|
||
|
|
XIntc_Disable(IntcInstancePtr, IntrId);
|
||
|
|
#ifndef TESTAPP_GEN
|
||
|
|
Xil_ExceptionDisable();
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*****************************************************************************/
|
||
|
|
/**
|
||
|
|
* Exception handler, invoked when an instruction bus exception or a data bus
|
||
|
|
* exception orrurs. The handler just counts exceptions, and returns.
|
||
|
|
*
|
||
|
|
* @param InstancePtr points to the exception instance
|
||
|
|
*
|
||
|
|
* @return None
|
||
|
|
*
|
||
|
|
* @note None
|
||
|
|
*
|
||
|
|
******************************************************************************/
|
||
|
|
static void BramIntrExceptionHandler(void *InstancePtr)
|
||
|
|
{
|
||
|
|
u32 Esr = mfesr();
|
||
|
|
if ((Esr & 0x81F) == 0x804)
|
||
|
|
ExceptionCount++;
|
||
|
|
}
|