<li>Automatic alarms based on user defined limits for the on-chip supply voltages and temperature</li>
<li>Automatic Channel Sequencer, programmable averaging, programmable acquisition time for the external inputs, unipolar or differential input selection for the external inputs</li>
<li>Inbuilt Calibration</li>
<li>Optional interrupt request generation</li>
<li>External Mux (7 Series and Zynq XADC)</li>
</ul>
<p>The user should refer to the hardware device specification for detailed information about the device.</p>
<p>This header file contains the prototypes of driver functions that can be used to access the System Monitor/ADC device.</p>
<p><b> System Monitor Channel Sequencer Modes </b></p>
<p>The System Monitor Channel Sequencer supports the following operating modes:</p>
<ul>
<li><b> Default </b>: This is the default mode after power up. In this mode of operation the System Monitor operates in a sequence mode, monitoring the on chip sensors: Temperature, VCCINT, and VCCAUX.</li>
<li><b> One pass through sequence </b>: In this mode the System Monitor converts the channels enabled in the Sequencer Channel Enable registers for a single pass and then stops.</li>
<li><b> Continuous cycling of sequence </b>: In this mode the System Monitor converts the channels enabled in the Sequencer Channel Enable registers continuously.</li>
<li><b> Single channel mode</b>: In this mode the System Monitor Channel Sequencer is disabled and the System Monitor operates in a Single Channel Mode. The System Monitor can operate either in a Continuous or Event driven sampling mode in the single channel mode.</li>
<li><b> Simultaneous sampling mode</b>: This mode is available only in 7 Series and Zynq XADC devices. In this mode both ADCs sample and digitizes two different analog input signals at the same time.</li>
<li><b> Independent ADC mode</b>: This mode is available only in 7 Series and Zynq XADC devices. In this mode ADC A is used to implement a fixed monitoring mode which is similar to default mode, but the fixed alarm functions are enabled. ADC B is available to be used with the external analog input channels only.</li>
</ul>
<p><b> Initialization and Configuration </b></p>
<p>The device driver enables higher layer software (e.g., an application) to communicate to the System Monitor/ADC device.</p>
<p><aclass="el"href="xsysmon_8c.html#a543ff01a3a1c5b625c2b874cbb809465">XSysMon_CfgInitialize()</a> API is used to initialize the System Monitor/ADC device. The user needs to first call the <aclass="el"href="xsysmon_8h.html#a02fbbb117ca8d4002ff222dcf2e4892d">XSysMon_LookupConfig()</a> API which returns the Configuration structure pointer which is passed as a parameter to the <aclass="el"href="xsysmon_8c.html#a543ff01a3a1c5b625c2b874cbb809465">XSysMon_CfgInitialize()</a> API.</p>
<p><b>Interrupts</b></p>
<p>The System Monitor/ADC device supports interrupt driven mode and the default operation mode is polling mode.</p>
<p>The interrupt mode is available only if hardware is configured to support interrupts.</p>
<p>This driver does not provide a Interrupt Service Routine (ISR) for the device. It is the responsibility of the application to provide one if needed. Refer to the interrupt example provided with this driver for details on using the device in interrupt mode.</p>
<p><b> Virtual Memory </b></p>
<p>This driver supports Virtual Memory. The RTOS is responsible for calculating the correct device base address in Virtual Memory space.</p>
<p><b> Threads </b></p>
<p>This driver is not thread safe. Any needs for threads or thread mutual exclusion must be satisfied by the layer above this driver.</p>
<p><b> Asserts </b></p>
<p>Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that users leave asserts on during development.</p>
<p><b> Building the driver </b></p>
<p>The <aclass="el"href="struct_x_sys_mon.html">XSysMon</a> driver is composed of several source files. This allows the user to build and link only those parts of the driver that are necessary.</p>
<p><b> Limitations of the driver </b></p>
<p>System Monitor/ADC device can be accessed through the JTAG port and the AXI interface. The driver implementation does not support the simultaneous access of the device by both these interfaces. The user has to care of this situation in the user application code.</p>
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<pre></pre><pre> MODIFICATION HISTORY:</pre><pre> Ver Who Date Changes
