106 lines
7.9 KiB
HTML
106 lines
7.9 KiB
HTML
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<html>
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<head>
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<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
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<title>
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Class Members
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</title>
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<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
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</head>
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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<hl>Software Drivers</hl>
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<hr class="whs1">
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<!-- Generated by Doxygen 1.4.5 -->
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<div class="tabs">
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<ul>
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<li><a href="index.html"><span>Main Page</span></a></li>
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<li><a href="annotated.html"><span>Classes</span></a></li>
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<li id="current"><a href="files.html"><span>Files</span></a></li>
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</ul></div>
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<div class="tabs">
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<ul>
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<li><a href="files.html"><span>File List</span></a></li>
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<li id="current"><a href="globals.html"><span>File Members</span></a></li>
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</ul></div>
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<div class="tabs">
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<ul>
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<li><a href="globals.html"><span>All</span></a></li>
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<li><a href="globals_func.html"><span>Functions</span></a></li>
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<li><a href="globals_vars.html"><span>Variables</span></a></li>
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<li id="current"><a href="globals_defs.html"><span>Defines</span></a></li>
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</ul>
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</div>
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<div class="tabs">
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<ul>
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<li><a href="#index_x"><span>x</span></a></li>
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</ul>
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</div>
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<p>
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<p>
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<h3><a class="anchor" name="index_x">- x -</a></h3><ul>
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<li>XSP_CR_CLK_PHASE_MASK
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: <a class="el" href="xspi__l_8h.html#ed0b1a313e5b20abf8345fa595f23032">xspi_l.h</a><li>XSP_CR_CLK_POLARITY_MASK
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: <a class="el" href="xspi__l_8h.html#2f4afd6b1bf2b3c3ebe5068286da57eb">xspi_l.h</a><li>XSP_CR_ENABLE_MASK
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: <a class="el" href="xspi__l_8h.html#e0d94e9e64ced9d35f33e4713ace27c4">xspi_l.h</a><li>XSP_CR_LOOPBACK_MASK
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: <a class="el" href="xspi__l_8h.html#d3b28f60b5f7e9c86e36261a15f62787">xspi_l.h</a><li>XSP_CR_LSB_MSB_FIRST_MASK
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: <a class="el" href="xspi__l_8h.html#9b3d94501e51aa6f75dc72686d351c4e">xspi_l.h</a><li>XSP_CR_MANUAL_SS_MASK
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: <a class="el" href="xspi__l_8h.html#f3da8a06ede9ff72724234544e063631">xspi_l.h</a><li>XSP_CR_MASTER_MODE_MASK
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: <a class="el" href="xspi__l_8h.html#aae7406fc28c4045c7bb1e8a3ebf13ee">xspi_l.h</a><li>XSP_CR_OFFSET
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: <a class="el" href="xspi__l_8h.html#fddf81db217fd78c8e912a9415d97d08">xspi_l.h</a><li>XSP_CR_RXFIFO_RESET_MASK
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: <a class="el" href="xspi__l_8h.html#916d56e56f1337e83df65f7ea337053a">xspi_l.h</a><li>XSP_CR_TRANS_INHIBIT_MASK
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: <a class="el" href="xspi__l_8h.html#3e489b91e6079deda99951e209bd577a">xspi_l.h</a><li>XSP_CR_TXFIFO_RESET_MASK
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: <a class="el" href="xspi__l_8h.html#c9a74171103e8a4414e447dc01bc5ae2">xspi_l.h</a><li>XSP_CR_XIP_CLK_PHASE_MASK
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: <a class="el" href="xspi__l_8h.html#aecec41aa44c4daa9a6f36db51a975c3">xspi_l.h</a><li>XSP_CR_XIP_CLK_POLARITY_MASK
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: <a class="el" href="xspi__l_8h.html#c64431a3f8d6713c0344520bc779521a">xspi_l.h</a><li>XSP_DATAWIDTH_BYTE
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: <a class="el" href="xspi__l_8h.html#fa1f5f59fba536b308610d5fdcd89476">xspi_l.h</a><li>XSP_DATAWIDTH_HALF_WORD
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: <a class="el" href="xspi__l_8h.html#7270485aad638ac0ab61edea6e197925">xspi_l.h</a><li>XSP_DATAWIDTH_WORD
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: <a class="el" href="xspi__l_8h.html#49d631944b85cdc842a280fe55507651">xspi_l.h</a><li>XSP_DGIER_OFFSET
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: <a class="el" href="xspi__l_8h.html#cd677967628d7e06b9208d1aa725fbd1">xspi_l.h</a><li>XSP_DRR_OFFSET
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: <a class="el" href="xspi__l_8h.html#88d98ee4c80fd403d577250f4de3359b">xspi_l.h</a><li>XSP_DTR_OFFSET
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: <a class="el" href="xspi__l_8h.html#63fdcc62e12df83298e48b4466d3939f">xspi_l.h</a><li>XSP_GINTR_ENABLE_MASK
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: <a class="el" href="xspi__l_8h.html#7b74e3d7d915362a715b79b4f473c15c">xspi_l.h</a><li>XSP_IIER_OFFSET
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: <a class="el" href="xspi__l_8h.html#fa946602a34b1a9b142ffafb32f8ffeb">xspi_l.h</a><li>XSP_IISR_OFFSET
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: <a class="el" href="xspi__l_8h.html#aa623013f3337c3e317f1995461a57cf">xspi_l.h</a><li>XSP_INTR_ALL
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: <a class="el" href="xspi__l_8h.html#e534a80692aebaf183b6a44447acb52f">xspi_l.h</a><li>XSP_INTR_CMD_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#67deb2d8bf95daedf146d66fbcf73197">xspi_l.h</a><li>XSP_INTR_CPOL_CPHA_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#bfd1110ba0404e5f73da50fa8196aa62">xspi_l.h</a><li>XSP_INTR_DFT_MASK
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: <a class="el" href="xspi__l_8h.html#0daa81e722ab317766f160131b6bf832">xspi_l.h</a><li>XSP_INTR_LOOP_BACK_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#ca652fce92b2850d86c85cb638a406af">xspi_l.h</a><li>XSP_INTR_MODE_FAULT_MASK
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: <a class="el" href="xspi__l_8h.html#fa1b1205fb233318f0ef9063bfae4a31">xspi_l.h</a><li>XSP_INTR_MSB_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#85e0b09778fdab0d74c9bed48ca98f82">xspi_l.h</a><li>XSP_INTR_RX_FULL_MASK
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: <a class="el" href="xspi__l_8h.html#75079847dc93170221e10a348cf5f826">xspi_l.h</a><li>XSP_INTR_RX_NOT_EMPTY_MASK
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: <a class="el" href="xspi__l_8h.html#1237ca92838771a7ad0a3cf3c5f936a3">xspi_l.h</a><li>XSP_INTR_RX_OVERRUN_MASK
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: <a class="el" href="xspi__l_8h.html#d9ecf0541330fda0f6ed5d2f92febdd9">xspi_l.h</a><li>XSP_INTR_SLAVE_MODE_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#f86d7d5c4c6be611ed56df780024c3c8">xspi_l.h</a><li>XSP_INTR_SLAVE_MODE_FAULT_MASK
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: <a class="el" href="xspi__l_8h.html#2031564d8e7180179f56265cc504de8e">xspi_l.h</a><li>XSP_INTR_SLAVE_MODE_MASK
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: <a class="el" href="xspi__l_8h.html#84a9c01a22f47dd08b87aa1f0f2b2428">xspi_l.h</a><li>XSP_INTR_TX_EMPTY_MASK
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: <a class="el" href="xspi__l_8h.html#ab59584835388a3934a0cba481346fa7">xspi_l.h</a><li>XSP_INTR_TX_HALF_EMPTY_MASK
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: <a class="el" href="xspi__l_8h.html#000933de5fbc5b70e92ec64d4c4fa6cf">xspi_l.h</a><li>XSP_INTR_TX_UNDERRUN_MASK
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: <a class="el" href="xspi__l_8h.html#9b0fdf2fb2f0cff5b0760a5a193371d9">xspi_l.h</a><li>XSP_RFO_OFFSET
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: <a class="el" href="xspi__l_8h.html#56ee1a30053c83ad18af6fc8cde681ff">xspi_l.h</a><li>XSP_SR_CMD_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#1f01a39a6a46c3d6147859aaeea98d33">xspi_l.h</a><li>XSP_SR_CPOL_CPHA_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#52ce8064fc0e08e8adbdd3039f4c674b">xspi_l.h</a><li>XSP_SR_LOOP_BACK_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#1267d50455e2d1c775cf9d5a5bdd8dc5">xspi_l.h</a><li>XSP_SR_MODE_FAULT_MASK
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: <a class="el" href="xspi__l_8h.html#2489870ed146d5b829a710a2335766c4">xspi_l.h</a><li>XSP_SR_MSB_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#35cf378f8979b0e7632ffa899bbb0386">xspi_l.h</a><li>XSP_SR_OFFSET
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: <a class="el" href="xspi__l_8h.html#5195823805d35b454d3f52413c941c86">xspi_l.h</a><li>XSP_SR_RX_EMPTY_MASK
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: <a class="el" href="xspi__l_8h.html#654559d98d2d076e56b6da793875b14f">xspi_l.h</a><li>XSP_SR_RX_FULL_MASK
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: <a class="el" href="xspi__l_8h.html#451cabb27ca7be9029d1cbed2affca44">xspi_l.h</a><li>XSP_SR_SLAVE_MODE_ERR_MASK
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: <a class="el" href="xspi__l_8h.html#dc33fe67f210ce10f52dbea019088949">xspi_l.h</a><li>XSP_SR_SLAVE_MODE_MASK
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: <a class="el" href="xspi__l_8h.html#922f1927609f02c06a0959d6787d6273">xspi_l.h</a><li>XSP_SR_TX_EMPTY_MASK
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: <a class="el" href="xspi__l_8h.html#908ce5656052924fbd822c31b896d2b4">xspi_l.h</a><li>XSP_SR_TX_FULL_MASK
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: <a class="el" href="xspi__l_8h.html#10e0b86498d73fe2848e0dbd12adf9d5">xspi_l.h</a><li>XSP_SR_XIP_AXI_ERROR_MASK
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: <a class="el" href="xspi__l_8h.html#722522559d36eb58d41ecd1936816bcc">xspi_l.h</a><li>XSP_SR_XIP_CPHPL_ERROR_MASK
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: <a class="el" href="xspi__l_8h.html#fe02a86595a7717d168075851a37a296">xspi_l.h</a><li>XSP_SR_XIP_MASTER_MODF_MASK
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: <a class="el" href="xspi__l_8h.html#ff2ac58a5029531ee6051c6a779e12ba">xspi_l.h</a><li>XSP_SR_XIP_RX_EMPTY_MASK
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: <a class="el" href="xspi__l_8h.html#3c6e594e787b134db623771fa7090220">xspi_l.h</a><li>XSP_SR_XIP_RX_FULL_MASK
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: <a class="el" href="xspi__l_8h.html#85f325ea63307e725547a111dd50d0dc">xspi_l.h</a><li>XSP_SRR_OFFSET
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: <a class="el" href="xspi__l_8h.html#395be1b0da8c01e4e5bcb65082db2e1e">xspi_l.h</a><li>XSP_SRR_RESET_MASK
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: <a class="el" href="xspi__l_8h.html#7b7be33f1ba1d415f1e992edb9dfa40f">xspi_l.h</a><li>XSP_SSR_OFFSET
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: <a class="el" href="xspi__l_8h.html#beabf106ebddc9207bac3f4a13052e83">xspi_l.h</a><li>XSP_TFO_OFFSET
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: <a class="el" href="xspi__l_8h.html#01a1468007013a7c76043e3f68f49bd3">xspi_l.h</a><li>XSpi_ReadReg
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: <a class="el" href="xspi__l_8h.html#c0c843151b56e2bce078d12ce1d99b33">xspi_l.h</a><li>XSpi_WriteReg
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: <a class="el" href="xspi__l_8h.html#829342f3d25f556c9bed03776c3e352f">xspi_l.h</a></ul>
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Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
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