84 lines
3.3 KiB
C
84 lines
3.3 KiB
C
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/*******************************************************************************
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*
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* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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*******************************************************************************/
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/******************************************************************************/
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/**
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*
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* @file xdptx_example_common.h
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*
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* Contains a design example using the XDptx driver. It performs a self test on
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* the DisplayPort TX core by training the main link at the maximum common
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* capabilities between the TX and RX and checking the lane status.
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*
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* @note The DisplayPort TX core does not work alone. Some platform
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* initialization will need to happen prior to calling XDptx driver
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* functions. See XAPP1178 as a reference.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a als 06/17/14 Initial creation.
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* </pre>
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*
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*******************************************************************************/
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#ifndef XDPTX_EXAMPLE_COMMON_H_
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#define XDPTX_EXAMPLE_COMMON_H_
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/******************************* Include Files ********************************/
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#include "xdptx.h"
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#include "xil_types.h"
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/**************************** Constant Definitions ****************************/
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#define TRAIN_ADAPTIVE 1
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#define TRAIN_HAS_REDRIVER 1
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#define USE_MAX_LINK 1
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#define USE_LINK_RATE XDPTX_LINK_BW_SET_540GBPS
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#define USE_LANE_COUNT 4
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/**************************** Function Prototypes *****************************/
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extern u32 Dptx_PlatformInit(void);
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extern u32 Dptx_ConfigureVidgen(XDptx *InstancePtr);
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u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId);
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u32 Dptx_Run(XDptx *InstancePtr, u8 LaneCount, u8 LinkRate);
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/*************************** Variable Declarations ****************************/
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XDptx DptxInstance;
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#endif /* XDPTX_EXAMPLE_COMMON_H_ */
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