562 lines
24 KiB
C
562 lines
24 KiB
C
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/*******************************************************************************
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*
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* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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*******************************************************************************/
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/******************************************************************************/
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/**
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*
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* @file xdptx_spm.c
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*
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* This file contains the stream policy maker functions for the XDptx driver.
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* These functions set up the DisplayPort TX core's main stream attributes that
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* determine how a video stream will be displayed.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a als 05/17/14 Initial release.
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* </pre>
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*
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*******************************************************************************/
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/******************************* Include Files ********************************/
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#include "xdptx.h"
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#include "xdptx_hw.h"
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#include "xstatus.h"
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/**************************** Function Prototypes *****************************/
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static void XDptx_ClearMsaValues(XDptx *InstancePtr);
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static void XDptx_SetMsaValues(XDptx *InstancePtr,
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XDptx_MainStreamAttributes *MsaConfig);
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/**************************** Function Definitions ****************************/
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/******************************************************************************/
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/**
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* This function calculates the following main stream attributes:
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* - Transfer unit size
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* - User pixel width
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* - NVid
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* - Horizontal start
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* - Vertical start
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* - Horizontal total clock
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* - Vertical total clock
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* - Misc0
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* - Misc1
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* - Data per lane
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* - Average number of bytes per transfer unit
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* - Number of initial wait cycles
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* These values are derived from:
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* - Bits per color
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* - MVid
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* - Horizontal sync polarity
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* - Vertical sync polarity
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* - Horizontal sync pulse width
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* - Vertical sync pulse width
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* - Horizontal resolution
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* - Vertical resolution
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* - Vertical back porch
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* - Vertical front porch
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* - Horizontal back porch
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* - Horizontal front porch
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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*
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* @note The MsaConfig structure is modified with the new, calculated
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* values. The main stream attributes that were used to derive the
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* calculated values are untouched in the MsaConfig structure.
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*
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*******************************************************************************/
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void XDptx_CfgMsaRecalculate(XDptx *InstancePtr)
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{
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u32 VideoBw;
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u32 BitsPerPixel;
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XDptx_MainStreamAttributes *MsaConfig = &InstancePtr->MsaConfig;
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XDptx_LinkConfig *LinkConfig = &InstancePtr->LinkConfig;
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/* Verify arguments. */
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Xil_AssertVoid(InstancePtr != NULL);
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/* For SST. */
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MsaConfig->TransferUnitSize = 64;
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/* Set the user pixel width to handle clocks that exceed the
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* capabilities of the DisplayPort TX core. */
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if ((MsaConfig->MVid > 150000) && (LinkConfig->LaneCount == 4)) {
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MsaConfig->UserPixelWidth = 4;
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}
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else if ((MsaConfig->MVid > 80000) && (LinkConfig->LaneCount == 2)) {
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MsaConfig->UserPixelWidth = 2;
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}
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else {
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MsaConfig->UserPixelWidth = 1;
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}
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/* Compute the rest of the MSA values. */
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MsaConfig->NVid = (LinkConfig->LinkRate == XDPTX_LINK_BW_SET_540GBPS) ?
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540000 :
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(LinkConfig->LinkRate == XDPTX_LINK_BW_SET_270GBPS) ?
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270000 :
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162000;
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MsaConfig->HStart = MsaConfig->HSyncPulseWidth + MsaConfig->HBackPorch;
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MsaConfig->VStart = MsaConfig->VSyncPulseWidth + MsaConfig->VBackPorch;
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MsaConfig->HClkTotal = (MsaConfig->HSyncPulseWidth +
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MsaConfig->HBackPorch + MsaConfig->HFrontPorch +
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MsaConfig->HResolution);
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MsaConfig->VClkTotal = (MsaConfig->VSyncPulseWidth +
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MsaConfig->VBackPorch + MsaConfig->VFrontPorch +
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MsaConfig->VResolution);
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MsaConfig->Misc0 = (MsaConfig->BitsPerColor == 6) ? 0x00 :
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(MsaConfig->BitsPerColor == 8) ? 0x01 :
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(MsaConfig->BitsPerColor == 10) ? 0x02 :
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(MsaConfig->BitsPerColor == 12) ? 0x03 :
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(MsaConfig->BitsPerColor == 16) ? 0x04 :
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0x00;
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MsaConfig->Misc0 = MsaConfig->Misc0 <<
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XDPTX_MAIN_STREAMX_MISC0_BDC_SHIFT;
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MsaConfig->Misc0 = MsaConfig->Misc0 | (LinkConfig->ComponentFormat <<
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XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT) |
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(LinkConfig->DynamicRange <<
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XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT) |
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(LinkConfig->YCbCrColorimetry <<
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XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT) |
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(LinkConfig->SynchronousClockMode &
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XDPTX_MAIN_STREAMX_MISC0_SYNC_CLK_MASK);
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MsaConfig->Misc1 = 0;
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MsaConfig->DataPerLane = (MsaConfig->HResolution *
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MsaConfig->BitsPerColor * 3 / 16) - LinkConfig->LaneCount;
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/* If RGB | YCbCr444, * 3 ; If YCbCr422, * 2 ; If YOnly, * 1. */
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BitsPerPixel = (LinkConfig->ComponentFormat == 1) ?
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MsaConfig->BitsPerColor * 2 :
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MsaConfig->BitsPerColor * 3;
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VideoBw = (MsaConfig->MVid * BitsPerPixel) / 8;
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MsaConfig->AvgBytesPerTU = (VideoBw * MsaConfig->TransferUnitSize) /
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(LinkConfig->LaneCount * (MsaConfig->NVid / 1000));
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/* The number of initial wait cycles at the start of a new line by the
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* framing logic. This allows enough data to be buffered in the input
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* FIFO before video is sent. */
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MsaConfig->InitWait = (MsaConfig->TransferUnitSize -
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(MsaConfig->AvgBytesPerTU / 1000));
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if ((MsaConfig->AvgBytesPerTU / 1000) > MsaConfig->TransferUnitSize) {
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MsaConfig->InitWait = 0;
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}
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else if (MsaConfig->InitWait > 10) {
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MsaConfig->InitWait -= 10;
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}
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else {
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MsaConfig->InitWait = 0;
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}
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}
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/******************************************************************************/
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/**
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* This function sets the main stream attribute values in the configuration
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* structure to match one of the standard display mode timings from the
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* XDptx_DmtModes[] table. THe XDptx_VideoMode enumeration in xdptx.h lists
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* the available video modes.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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* @param VideoMode is one of the enumerated standard video modes that is
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* used to determine the main stream attributes to be used.
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*
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* @return
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* - XST_INVALID_PARAM if the supplied video mode isn't in the DMT
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* table.
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* - XST_SUCCESS otherwise.
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*
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* @note The InstancePtr->MsaConfig structure is modified to reflect the
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* main stream attribute values associated to the specified video
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* mode.
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*
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*******************************************************************************/
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u32 XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr,
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XDptx_VideoMode VideoMode)
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{
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XDptx_MainStreamAttributes *MsaConfig = &InstancePtr->MsaConfig;
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/* Verify arguments. */
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Xil_AssertVoid(InstancePtr != NULL);
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if (VideoMode > XDPTX_VM_LAST) {
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return XST_INVALID_PARAM;
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}
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/* Configure the main stream attribute values from the display monitor
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* timing (DMT) table. */
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MsaConfig->MVid = XDptx_DmtModes[VideoMode].PixelClkKhz;
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MsaConfig->HSyncPolarity = XDptx_DmtModes[VideoMode].HSyncPolarity;
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MsaConfig->VSyncPolarity = XDptx_DmtModes[VideoMode].VSyncPolarity;
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MsaConfig->HSyncPulseWidth = XDptx_DmtModes[VideoMode].HSyncPulseWidth;
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MsaConfig->VSyncPulseWidth = XDptx_DmtModes[VideoMode].VSyncPulseWidth;
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MsaConfig->HResolution = XDptx_DmtModes[VideoMode].HResolution;
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MsaConfig->VResolution = XDptx_DmtModes[VideoMode].VResolution;
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MsaConfig->VBackPorch = XDptx_DmtModes[VideoMode].VBackPorch;
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MsaConfig->VFrontPorch = XDptx_DmtModes[VideoMode].VFrontPorch;
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MsaConfig->HBackPorch = XDptx_DmtModes[VideoMode].HBackPorch;
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MsaConfig->HFrontPorch = XDptx_DmtModes[VideoMode].HFrontPorch;
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/* Calculate the rest of the MSA values. */
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XDptx_CfgMsaRecalculate(InstancePtr);
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function sets the main stream attribute values in the configuration
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* structure to match the preferred timing of the sink monitor. This preferred
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* timing information is stored in the sink's extended display identification
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* data (EDID).
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*
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* @param InstancePtr is a pointer to the XDptx instance
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*
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* @note The InstancePtr->MsaConfig structure is modified to reflect the
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* main stream attribute values associated to the preferred timing
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* of the sink monitor.
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*
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*******************************************************************************/
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void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr)
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{
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XDptx_MainStreamAttributes *MsaConfig = &InstancePtr->MsaConfig;
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u8 *Ptm = &InstancePtr->RxConfig.Edid[XDPTX_EDID_PTM];
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/* Verify arguments. */
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Xil_AssertVoid(InstancePtr != NULL);
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/* Configure the MSA values with the preferred timing mode (PTM) as
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* specified by the preferred detailed timing descriptor of the
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* monitor's EDID.
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* Note, the PTM is only required for EDID versions 1.3 a newer. Earlier
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* versions may not contain this information. */
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u16 HBlank = ((Ptm[XDPTX_EDID_DTD_HRES_HBLANK_U4] &
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XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
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Ptm[XDPTX_EDID_DTD_HBLANK_LSB];
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u16 VBlank = ((Ptm[XDPTX_EDID_DTD_VRES_VBLANK_U4] &
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XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
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Ptm[XDPTX_EDID_DTD_VBLANK_LSB];
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MsaConfig->MVid = ((Ptm[XDPTX_EDID_DTD_PIXEL_CLK_KHZ_MSB] << 8) |
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Ptm[XDPTX_EDID_DTD_PIXEL_CLK_KHZ_LSB]) * 10;
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MsaConfig->HSyncPulseWidth =
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(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_MASK) >>
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_SHIFT) << 8) |
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Ptm[XDPTX_EDID_DTD_HSPW_LSB];
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MsaConfig->VSyncPulseWidth =
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((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VSPW_MASK) << 8) |
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(Ptm[XDPTX_EDID_DTD_VFPORCH_VSPW_L4] &
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XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VSPW_MASK);
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MsaConfig->HResolution =
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(((Ptm[XDPTX_EDID_DTD_HRES_HBLANK_U4] &
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XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
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XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
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Ptm[XDPTX_EDID_DTD_HRES_LSB];
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MsaConfig->VResolution = (((Ptm[XDPTX_EDID_DTD_VRES_VBLANK_U4] &
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XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
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XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
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Ptm[XDPTX_EDID_DTD_VRES_LSB];
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MsaConfig->VFrontPorch = (((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_MASK) >>
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_SHIFT) << 8) |
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((Ptm[XDPTX_EDID_DTD_VFPORCH_VSPW_L4] &
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XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_MASK) >>
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XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_SHIFT);
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MsaConfig->HFrontPorch = (((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_MASK) >>
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XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_SHIFT) << 8) |
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Ptm[XDPTX_EDID_DTD_HFPORCH_LSB];
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MsaConfig->HSyncPolarity = (Ptm[XDPTX_EDID_DTD_SIGNAL] &
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XDPTX_EDID_DTD_SIGNAL_HPOLARITY_MASK) >>
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XDPTX_EDID_DTD_SIGNAL_HPOLARITY_SHIFT;
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MsaConfig->VSyncPolarity = Ptm[XDPTX_EDID_DTD_SIGNAL] &
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XDPTX_EDID_DTD_SIGNAL_VPOLARITY_MASK >>
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XDPTX_EDID_DTD_SIGNAL_VPOLARITY_SHIFT;
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|
|
|
||
|
|
MsaConfig->VBackPorch = VBlank -
|
||
|
|
(MsaConfig->VFrontPorch + MsaConfig->VSyncPulseWidth);
|
||
|
|
|
||
|
|
MsaConfig->HBackPorch = HBlank -
|
||
|
|
(MsaConfig->HFrontPorch + MsaConfig->HSyncPulseWidth);
|
||
|
|
|
||
|
|
/* Calculate the rest of the MSA values. */
|
||
|
|
XDptx_CfgMsaRecalculate(InstancePtr);
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/**
|
||
|
|
* This function takes a the main stream attributes from MsaConfigCustom and
|
||
|
|
* copies them into InstancePtr->MsaConfig. If desired, given a base set of
|
||
|
|
* attributes, the rest of the attributes may be derived. The minimal required
|
||
|
|
* main stream attributes that must be contained in the MsaConfigCustom
|
||
|
|
* structure are:
|
||
|
|
* - MVid
|
||
|
|
* - Horizontal sync polarity
|
||
|
|
* - Vertical sync polarity
|
||
|
|
* - Horizontal sync pulse width
|
||
|
|
* - Vertical sync pulse width
|
||
|
|
* - Horizontal resolution
|
||
|
|
* - Vertical resolution
|
||
|
|
* - Vertical back porch
|
||
|
|
* - Vertical front porch
|
||
|
|
* - Horizontal back porch
|
||
|
|
* - Horizontal front porch
|
||
|
|
*
|
||
|
|
* @param InstancePtr is a pointer to the XDptx instance.
|
||
|
|
* @param MsaConfigCustom is the structure that will be used to copy the
|
||
|
|
* main stream attributes from (into InstancePtr->MsaConfig).
|
||
|
|
* @param Recalculate is a boolean enable that determines whether or not
|
||
|
|
* the main stream attributes should be recalculated.
|
||
|
|
*
|
||
|
|
* @note The InstancePtr-> MsaConfig structure is modified with the new
|
||
|
|
* values.
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
void XDptx_CfgMsaUseCustom(XDptx *InstancePtr,
|
||
|
|
XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate)
|
||
|
|
{
|
||
|
|
XDptx_MainStreamAttributes *MsaConfig = &InstancePtr->MsaConfig;
|
||
|
|
|
||
|
|
/* Verify arguments. */
|
||
|
|
Xil_AssertVoid(InstancePtr != NULL);
|
||
|
|
Xil_AssertVoid(MsaConfigCustom != NULL);
|
||
|
|
|
||
|
|
/* Copy the MSA values from the user configuration structure. */
|
||
|
|
MsaConfig->MVid = MsaConfigCustom->MVid;
|
||
|
|
MsaConfig->HSyncPolarity = MsaConfigCustom->HSyncPolarity;
|
||
|
|
MsaConfig->VSyncPolarity = MsaConfigCustom->VSyncPolarity;
|
||
|
|
MsaConfig->HSyncPulseWidth = MsaConfigCustom->HSyncPulseWidth;
|
||
|
|
MsaConfig->VSyncPulseWidth = MsaConfigCustom->VSyncPulseWidth;
|
||
|
|
MsaConfig->HResolution = MsaConfigCustom->HResolution;
|
||
|
|
MsaConfig->VResolution = MsaConfigCustom->VResolution;
|
||
|
|
|
||
|
|
MsaConfig->VBackPorch = MsaConfigCustom->VBackPorch;
|
||
|
|
MsaConfig->VFrontPorch = MsaConfigCustom->VFrontPorch;
|
||
|
|
MsaConfig->HBackPorch = MsaConfigCustom->HBackPorch;
|
||
|
|
MsaConfig->HFrontPorch = MsaConfigCustom->HFrontPorch;
|
||
|
|
|
||
|
|
if (Recalculate) {
|
||
|
|
/* Calculate the rest of the MSA values. */
|
||
|
|
XDptx_CfgMsaRecalculate(InstancePtr);
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
/* Use the custom values for the rest. */
|
||
|
|
MsaConfig->TransferUnitSize = MsaConfigCustom->TransferUnitSize;
|
||
|
|
MsaConfig->UserPixelWidth = MsaConfigCustom->UserPixelWidth;
|
||
|
|
MsaConfig->NVid = MsaConfigCustom->NVid;
|
||
|
|
MsaConfig->HStart = MsaConfigCustom->HStart;
|
||
|
|
MsaConfig->VStart = MsaConfigCustom->VStart;
|
||
|
|
MsaConfig->HClkTotal = MsaConfigCustom->HClkTotal;
|
||
|
|
MsaConfig->VClkTotal = MsaConfigCustom->VClkTotal;
|
||
|
|
MsaConfig->Misc0 = MsaConfigCustom->Misc0;
|
||
|
|
MsaConfig->Misc1 = MsaConfigCustom->Misc1;
|
||
|
|
MsaConfig->DataPerLane = MsaConfigCustom->DataPerLane;
|
||
|
|
MsaConfig->AvgBytesPerTU = MsaConfigCustom->AvgBytesPerTU;
|
||
|
|
MsaConfig->InitWait = MsaConfigCustom->InitWait;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/**
|
||
|
|
* This function sets the bits per color value of the video stream.
|
||
|
|
*
|
||
|
|
* @param InstancePtr is a pointer to the XDptx instance
|
||
|
|
* @param BitsPerColor is the new number of bits per color to use.
|
||
|
|
*
|
||
|
|
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||
|
|
* new main stream attributes associated with a new bits per color
|
||
|
|
* value.
|
||
|
|
*
|
||
|
|
* @return
|
||
|
|
* - XST_INVALID_PARAM if the supplied bits per color value is not
|
||
|
|
* either 6, 8, 10, 12, or 16.
|
||
|
|
* - XST_SUCCESS otherwise.
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
u32 XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 BitsPerColor)
|
||
|
|
{
|
||
|
|
/* Verify arguments. */
|
||
|
|
Xil_AssertVoid(InstancePtr != NULL);
|
||
|
|
|
||
|
|
switch (BitsPerColor) {
|
||
|
|
case 6:
|
||
|
|
case 8:
|
||
|
|
case 10:
|
||
|
|
case 12:
|
||
|
|
case 16:
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return XST_INVALID_PARAM;
|
||
|
|
}
|
||
|
|
|
||
|
|
InstancePtr->MsaConfig.BitsPerColor = BitsPerColor;
|
||
|
|
|
||
|
|
/* Calculate the rest of the MSA values. */
|
||
|
|
XDptx_CfgMsaRecalculate(InstancePtr);
|
||
|
|
|
||
|
|
return XST_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/**
|
||
|
|
* This function clears the main stream attributes registers of the DisplayPort
|
||
|
|
* TX core and sets them to the values specified in the main stream attributes
|
||
|
|
* configuration structure.
|
||
|
|
*
|
||
|
|
* @param InstancePtr is a pointer to the XDptx instance
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
void XDptx_SetVideoMode(XDptx *InstancePtr)
|
||
|
|
{
|
||
|
|
/* Verify arguments. */
|
||
|
|
Xil_AssertVoid(InstancePtr != NULL);
|
||
|
|
|
||
|
|
XDptx_ClearMsaValues(InstancePtr);
|
||
|
|
XDptx_SetMsaValues(InstancePtr, &InstancePtr->MsaConfig);
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/**
|
||
|
|
* This function clears the main stream attributes registers of the DisplayPort
|
||
|
|
* TX core.
|
||
|
|
*
|
||
|
|
* @param InstancePtr is a pointer to the XDptx instance.
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
static void XDptx_ClearMsaValues(XDptx *InstancePtr)
|
||
|
|
{
|
||
|
|
/* Verify arguments. */
|
||
|
|
Xil_AssertVoid(InstancePtr != NULL);
|
||
|
|
|
||
|
|
XDptx_Config *TxConfig = &InstancePtr->TxConfig;
|
||
|
|
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HTOTAL, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VTOTAL, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_POLARITY, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HSWIDTH, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VSWIDTH, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HRES, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VRES, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HSTART, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VSTART, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_MISC0, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_MISC1, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_TU_SIZE, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_USER_PIXEL_WIDTH, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_USER_DATA_COUNT_PER_LANE, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_M_VID, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_N_VID, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MIN_BYTES_PER_TU, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_FRAC_BYTES_PER_TU, 0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_INIT_WAIT, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************/
|
||
|
|
/**
|
||
|
|
* This function sets the main stream attributes registers of the DisplayPort TX
|
||
|
|
* core with the values specified in the main stream attributes configuration
|
||
|
|
* structure.
|
||
|
|
*
|
||
|
|
* @param InstancePtr is a pointer to the XDptx instance.
|
||
|
|
* @param MsaConfig is a pointer to the main stream attributes
|
||
|
|
* configuration structure.
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
static void XDptx_SetMsaValues(XDptx *InstancePtr,
|
||
|
|
XDptx_MainStreamAttributes *MsaConfig)
|
||
|
|
{
|
||
|
|
/* Verify arguments. */
|
||
|
|
Xil_AssertVoid(InstancePtr != NULL);
|
||
|
|
Xil_AssertVoid(MsaConfig != NULL);
|
||
|
|
|
||
|
|
XDptx_Config *TxConfig = &InstancePtr->TxConfig;
|
||
|
|
|
||
|
|
/* Set the main stream attributes to the associated DisplayPort TX core
|
||
|
|
* registers. */
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HTOTAL,
|
||
|
|
MsaConfig->HClkTotal);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VTOTAL,
|
||
|
|
MsaConfig->VClkTotal);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_POLARITY,
|
||
|
|
MsaConfig->HSyncPolarity | (MsaConfig->VSyncPolarity <<
|
||
|
|
XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT));
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HSWIDTH,
|
||
|
|
MsaConfig->HSyncPulseWidth);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VSWIDTH,
|
||
|
|
MsaConfig->VSyncPulseWidth);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HRES,
|
||
|
|
MsaConfig->HResolution);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VRES,
|
||
|
|
MsaConfig->VResolution);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_HSTART,
|
||
|
|
MsaConfig->HStart);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_VSTART,
|
||
|
|
MsaConfig->VStart);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_MISC0,
|
||
|
|
MsaConfig->Misc0);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MAIN_STREAM_MISC1,
|
||
|
|
MsaConfig->Misc1);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_M_VID,
|
||
|
|
MsaConfig->MVid);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_N_VID,
|
||
|
|
MsaConfig->NVid);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_USER_PIXEL_WIDTH,
|
||
|
|
MsaConfig->UserPixelWidth);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_USER_DATA_COUNT_PER_LANE,
|
||
|
|
MsaConfig->DataPerLane);
|
||
|
|
|
||
|
|
/* Set the transfer unit values to the associated DisplayPort TX core
|
||
|
|
* registers. */
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_TU_SIZE,
|
||
|
|
MsaConfig->TransferUnitSize);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_MIN_BYTES_PER_TU,
|
||
|
|
MsaConfig->AvgBytesPerTU / 1000);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_FRAC_BYTES_PER_TU,
|
||
|
|
MsaConfig->AvgBytesPerTU % 1000);
|
||
|
|
XDptx_WriteReg(TxConfig->BaseAddr, XDPTX_INIT_WAIT,
|
||
|
|
MsaConfig->InitWait);
|
||
|
|
}
|