318 lines
9.6 KiB
C
318 lines
9.6 KiB
C
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/******************************************************************************
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*
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* Copyright (C) 2003 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xhwicap_device_read_frame.c
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*
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* This file contains the function that reads a specified frame from the
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* device (ICAP) and stores it in the memory specified by the user.
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*
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* @note none.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a bjb 11/20/03 First release
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* 1.01a nps 04/10/06 V4 Support
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* 2.00a ecm 10/20/07 V5 Support
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* 4.00a hvm 11/30/09 Added support for V6 and updated with HAL phase 1
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* modifications
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* 5.00a hvm 2/25/10 Added support for S6
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* 6.00a hvm 08/01/11 Added support for K7
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* </pre>
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*
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*****************************************************************************/
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/***************************** Include Files ********************************/
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#include "xhwicap_i.h"
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#include "xhwicap.h"
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#include <xil_types.h>
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#include <xil_assert.h>
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/************************** Constant Definitions ****************************/
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#define READ_FRAME_SIZE 20
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/**************************** Type Definitions ******************************/
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/***************** Macros (Inline Functions) Definitions ********************/
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/************************** Variable Definitions ****************************/
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/************************** Function Prototypes *****************************/
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#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5 ) ||\
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(XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES ))
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/****************************************************************************/
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/**
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*
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* Reads one frame from the device and puts it in memory specified by the user.
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*
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* @param InstancePtr - a pointer to the XHwIcap instance to be worked on.
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* @param Top - top (0) or bottom (1) half of device
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* @param Block - Block Address (XHI_FAR_CLB_BLOCK,
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* XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK)
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* @param HClkRow - selects the HClk Row
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* @param MajorFrame - selects the column
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* @param MinorFrame - selects frame inside column
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* @param FrameBuffer is a pointer to the memory where the frame read
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* from the device is stored
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*
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* @return XST_SUCCESS else XST_FAILURE.
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*
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* @note This is a blocking call.
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*
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*****************************************************************************/
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int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Top, long Block,
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long HClkRow, long MajorFrame, long MinorFrame,
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u32 *FrameBuffer)
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{
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u32 Packet;
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u32 Data;
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u32 TotalWords;
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int Status;
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u32 WriteBuffer[READ_FRAME_SIZE];
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u32 Index = 0;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(FrameBuffer != NULL);
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/*
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* DUMMY and SYNC
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*/
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WriteBuffer[Index++] = XHI_DUMMY_PACKET;
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WriteBuffer[Index++] = XHI_SYNC_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Reset CRC
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*/
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Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = XHI_CMD_RCRC;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Setup CMD register to read configuration
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*/
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Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = XHI_CMD_RCFG;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Setup FAR register.
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*/
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Packet = XHwIcap_Type1Write(XHI_FAR) | 1;
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#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
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Data = XHwIcap_SetupFarV4(Top, Block, HClkRow, MajorFrame, MinorFrame);
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#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V5) || (XHI_FAMILY == XHI_DEV_FAMILY_V6) || \
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(XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
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Data = XHwIcap_SetupFarV5(Top, Block, HClkRow, MajorFrame, MinorFrame);
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#endif
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = Data;
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/*
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* Setup read data packet header.
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* The frame will be preceeded by a dummy frame, and we need to read one
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* extra word for V4 and V5 devices.
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*/
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#if ((XHI_FAMILY == XHI_DEV_FAMILY_V4) || (XHI_FAMILY == XHI_DEV_FAMILY_V5))
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TotalWords = (InstancePtr->WordsPerFrame << 1) + 1;
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#elif ((XHI_FAMILY == XHI_DEV_FAMILY_V6) || (XHI_FAMILY == XHI_DEV_FAMILY_7SERIES))
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TotalWords = (InstancePtr->WordsPerFrame << 1);
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#endif
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/*
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* Create Type one packet
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*/
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Packet = XHwIcap_Type1Read(XHI_FDRO) | TotalWords;
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Write the data to the FIFO and initiate the transfer of data
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* present in the FIFO to the ICAP device
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*/
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Status = XHwIcap_DeviceWrite(InstancePtr, (u32 *)&WriteBuffer[0],
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Index);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Wait till the write is done.
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*/
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while (XHwIcap_IsDeviceBusy(InstancePtr) != FALSE);
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/*
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* Read the frame of the data including the NULL frame.
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*/
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Status = XHwIcap_DeviceRead(InstancePtr, FrameBuffer, TotalWords);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Send DESYNC command
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*/
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Status = XHwIcap_CommandDesync(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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};
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#elif (XHI_FAMILY == XHI_DEV_FAMILY_S6)
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/****************************************************************************/
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/**
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*
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* Reads one frame from the device and puts it in memory specified by the user.
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*
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* @param InstancePtr - a pointer to the XHwIcap instance to be worked on.
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* @param Block - Block Address (XHI_FAR_CLB_BLOCK,
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* XHI_FAR_BRAM_BLOCK, XHI_FAR_BRAM_INT_BLOCK)
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* @param MajorFrame - selects the column
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* @param MinorFrame - selects frame inside column
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* @param FrameBuffer is a pointer to the memory where the frame read
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* from the device is stored
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*
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* @return XST_SUCCESS else XST_FAILURE.
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*
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* @note This is a blocking call.
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*
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*****************************************************************************/
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int XHwIcap_DeviceReadFrame(XHwIcap *InstancePtr, long Block, long Row,
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long MajorFrame, long MinorFrame,
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u16 *FrameBuffer)
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{
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int Status;
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u16 Packet;
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u16 TotalWords;
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u16 WriteBuffer[READ_FRAME_SIZE];
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u16 Index = 0;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(FrameBuffer != NULL);
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/*
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* DUMMY and SYNC
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*/
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WriteBuffer[Index++] = XHI_DUMMY_PACKET;
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WriteBuffer[Index++] = XHI_SYNC_PACKET1;
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WriteBuffer[Index++] = XHI_SYNC_PACKET2;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Setup FAR register.
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*/
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Packet = XHwIcap_Type1Write(XHI_FAR_MAJ) | 1;
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = (Block << XHI_BLOCK_SHIFT) |
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(Row << XHI_ROW_SHIFT) | MajorFrame;
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Packet = XHwIcap_Type1Write(XHI_FAR_MIN) | 1;
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = MinorFrame;
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/*
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* Setup CMD register to read configuration
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*/
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Packet = XHwIcap_Type1Write(XHI_CMD) | 1;
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WriteBuffer[Index++] = Packet;
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WriteBuffer[Index++] = XHI_CMD_RCFG;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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TotalWords = (InstancePtr->WordsPerFrame << 1) + 1;
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/*
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* Create Type two packet for FDRO
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*/
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WriteBuffer[Index++] = XHwIcap_Type2Read(XHI_FDRO);
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WriteBuffer[Index++] = 0x0000;
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WriteBuffer[Index++] = TotalWords;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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WriteBuffer[Index++] = XHI_NOOP_PACKET;
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/*
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* Write the data to the FIFO and initiate the transfer of data
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* present in the FIFO to the ICAP device
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*/
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Status = XHwIcap_DeviceWrite(InstancePtr, (u16 *)&WriteBuffer[0],
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Index);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Wait till the write is done.
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*/
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while ((XHwIcap_ReadReg(InstancePtr->HwIcapConfig.BaseAddress,
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XHI_CR_OFFSET)) &
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XHI_CR_WRITE_MASK);
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/*
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* Read the frame of the data including the NULL frame.
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*/
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Status = XHwIcap_DeviceRead(InstancePtr, &FrameBuffer[0],
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TotalWords);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Send DESYNC command
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*/
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Status = XHwIcap_CommandDesync(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return Status;
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}
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#endif
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