591 lines
16 KiB
C
591 lines
16 KiB
C
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/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xaxicdma_example_simple_intr.c
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*
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* This file demonstrates how to use the xaxicdma driver on the Xilinx AXI
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* CDMA core (AXICDMA) to transfer packets in simple transfer mode through
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* interrupt.
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*
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* Modify the NUMBER_OF_TRANSFER constant to have different number of simple
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* transfers done in this test.
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*
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* This example assumes that the system has an interrupt controller.
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*
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* To see the debug print, you need a Uart16550 or uartlite in your system,
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* and please set "-DDEBUG" in your compiler options for the example, also
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* comment out the "#undef DEBUG" in xdebug.h. You need to rebuild your
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* software executable.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* . Updated the debug print on type casting to avoid warnings on u32. Cast
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* u32 to (unsigned int) to use the %x format.
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a jz 07/30/10 First release
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* 2.01a rkv 01/28/11 Changed function prototype of XAxiCdma_SimpleIntrExample
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* to a function taking arguments interrupt instance,device
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* instance,device id,device interrupt id
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* Added interrupt support for Cortex A9
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* 2.01a srt 03/05/12 Modified interrupt support for Zynq.
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* Modified Flushing and Invalidation of Caches to fix CRs
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* 648103, 648701.
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* </pre>
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*
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****************************************************************************/
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#include "xaxicdma.h"
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#include "xdebug.h"
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#include "xil_exception.h"
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#include "xil_cache.h"
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#include "xparameters.h"
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#ifdef XPAR_INTC_0_DEVICE_ID
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#include "xintc.h"
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#else
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#include "xscugic.h"
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#endif
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#ifndef __MICROBLAZE__
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#include "xpseudo_asm_gcc.h"
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#include "xreg_cortexa9.h"
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#endif
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/******************** Constant Definitions **********************************/
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#ifndef TESTAPP_GEN
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/*
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* The following constants map to the XPAR parameters created in the
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* xparameters.h file. They are defined here such that a user can easily
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* change all the needed parameters in one place.
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*/
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#ifdef XPAR_INTC_0_DEVICE_ID
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#define DMA_CTRL_DEVICE_ID XPAR_AXICDMA_0_DEVICE_ID
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#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID
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#define DMA_CTRL_IRPT_INTR XPAR_INTC_0_AXICDMA_0_VEC_ID
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#else
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#define DMA_CTRL_DEVICE_ID XPAR_AXICDMA_0_DEVICE_ID
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#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
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#define DMA_CTRL_IRPT_INTR XPAR_FABRIC_AXICDMA_0_VEC_ID
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#endif
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#endif
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#define BUFFER_BYTESIZE 64 /* Length of the buffers for DMA
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* transfer
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*/
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#define NUMBER_OF_TRANSFERS 4 /* Number of simple transfers to do */
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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#if (!defined(DEBUG))
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extern void xil_printf(const char *format, ...);
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#endif
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static int DoSimpleTransfer(XAxiCdma *InstancePtr, int Length, int Retries);
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static void Example_CallBack(void *CallBackRef, u32 IrqMask, int *IgnorePtr);
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#ifdef XPAR_INTC_0_DEVICE_ID
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static int SetupIntrSystem(XIntc *IntcInstancePtr, XAxiCdma *InstancePtr,
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u32 IntrId);
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static void DisableIntrSystem(XIntc *IntcInstancePtr, u32 IntrId);
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int XAxiCdma_SimpleIntrExample(XIntc *IntcInstancePtr, XAxiCdma *InstancePtr,
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u16 DeviceId,u32 IntrId);
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#else
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static int SetupIntrSystem(XScuGic *IntcInstancePtr, XAxiCdma *InstancePtr,
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u32 IntrId);
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static void DisableIntrSystem(XScuGic *IntcInstancePtr, u32 IntrId);
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int XAxiCdma_SimpleIntrExample(XScuGic *IntcInstancePtr, XAxiCdma *InstancePtr,
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u16 DeviceId,u32 IntrId);
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#endif
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/************************** Variable Definitions *****************************/
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#ifndef TESTAPP_GEN
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static XAxiCdma AxiCdmaInstance; /* Instance of the XAxiCdma */
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#ifdef XPAR_INTC_0_DEVICE_ID
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static XIntc IntcController; /* Instance of the Interrupt Controller */
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#else
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static XScuGic IntcController; /* Instance of the Interrupt Controller */
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#endif
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#endif
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/* Source and Destination buffer for DMA transfer.
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*/
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volatile static u8 SrcBuffer[BUFFER_BYTESIZE] __attribute__ ((aligned (64)));
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volatile static u8 DestBuffer[BUFFER_BYTESIZE] __attribute__ ((aligned (64)));
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/* Shared variables used to test the callbacks.
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*/
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volatile static int Done = 0; /* Dma transfer is done */
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volatile static int Error = 0; /* Dma Bus Error occurs */
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/*****************************************************************************/
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/*
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* The entry point for this example. It invokes the example function,
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* and reports the execution status.
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*
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* @param None.
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*
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* @return
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* - XST_SUCCESS if example finishes successfully
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* - XST_FAILURE if example fails.
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*
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* @note None
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*
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******************************************************************************/
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#ifndef TESTAPP_GEN
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int main()
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{
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int Status;
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xil_printf("\r\n--- Entering main() --- \r\n");
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/* Run the interrupt example for simple transfer
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*/
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Status = XAxiCdma_SimpleIntrExample(&IntcController, &AxiCdmaInstance,
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DMA_CTRL_DEVICE_ID,DMA_CTRL_IRPT_INTR);
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if (Status != XST_SUCCESS) {
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xil_printf("XAxiCdma_SimpleIntrExample: Failed\r\n");
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return XST_FAILURE;
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}
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xil_printf("XAxiCdma_SimpleIntrExample: Passed\r\n");
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xil_printf("--- Exiting main() --- \r\n");
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return XST_SUCCESS;
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}
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#endif
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/*****************************************************************************/
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/**
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* The example to do the simple transfer through interrupt.
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*
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* @param IntcInstancePtr is a pointer to the INTC instance
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* @param InstancePtr is a pointer to the XAxiCdma instance
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* @param DeviceId is the Device Id of the XAxiCdma instance
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* @param IntrId is the interrupt Id for the XAxiCdma instance in build
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*
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* @return
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* - XST_SUCCESS if example finishes successfully
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* - XST_FAILURE if error occurs
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*
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* @note If the hardware build has problems with interrupt,
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* then this function hangs
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*
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******************************************************************************/
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#ifdef XPAR_INTC_0_DEVICE_ID
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int XAxiCdma_SimpleIntrExample(XIntc *IntcInstancePtr, XAxiCdma *InstancePtr,
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u16 DeviceId,u32 IntrId)
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#else
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int XAxiCdma_SimpleIntrExample(XScuGic *IntcInstancePtr, XAxiCdma *InstancePtr,
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u16 DeviceId, u32 IntrId)
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#endif
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{
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XAxiCdma_Config *CfgPtr;
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int Status;
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int SubmitTries = 10; /* Retry to submit */
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int Tries = NUMBER_OF_TRANSFERS;
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int Index;
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/* Initialize the XAxiCdma device.
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*/
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CfgPtr = XAxiCdma_LookupConfig(DeviceId);
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if (!CfgPtr) {
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return XST_FAILURE;
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}
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Status = XAxiCdma_CfgInitialize(InstancePtr, CfgPtr, CfgPtr->BaseAddress);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/* Setup the interrupt system
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*/
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Status = SetupIntrSystem(IntcInstancePtr, InstancePtr, IntrId);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/* Enable all (completion/error/delay) interrupts
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*/
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XAxiCdma_IntrEnable(InstancePtr, XAXICDMA_XR_IRQ_ALL_MASK);
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for (Index = 0; Index < Tries; Index++) {
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Status = DoSimpleTransfer(InstancePtr,
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BUFFER_BYTESIZE, SubmitTries);
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if(Status != XST_SUCCESS) {
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DisableIntrSystem(IntcInstancePtr, IntrId);
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return XST_FAILURE;
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}
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}
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/* Test finishes successfully, clean up and return
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*/
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DisableIntrSystem(IntcInstancePtr, IntrId);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/*
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*
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* This function does one simple transfer
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*
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* @param InstancePtr is a pointer to the XAxiCdma instance
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* @param Length is the transfer length
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* @param Retries is how many times to retry on submission
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*
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* @return
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* - XST_SUCCESS if transfer is successful
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* - XST_FAILURE if either the transfer fails or the data has
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* error
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*
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* @note None
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*
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******************************************************************************/
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static int DoSimpleTransfer(XAxiCdma *InstancePtr, int Length, int Retries)
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{
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u32 Index;
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u8 *SrcPtr;
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u8 *DestPtr;
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int Status;
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Done = 0;
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Error = 0;
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/* Initialize the source buffer bytes with a pattern and the
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* the destination buffer bytes to zero
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*/
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SrcPtr = (u8 *)SrcBuffer;
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DestPtr = (u8 *)DestBuffer;
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for (Index = 0; Index < Length; Index++) {
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SrcPtr[Index] = Index & 0xFF;
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DestPtr[Index] = 0;
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}
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/* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
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* is enabled
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*/
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Xil_DCacheFlushRange((u32)&SrcBuffer, Length);
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/* Try to start the DMA transfer
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*/
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while (Retries) {
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Retries -= 1;
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Status = XAxiCdma_SimpleTransfer(InstancePtr, (u32)SrcBuffer,
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(u32)DestBuffer, Length, Example_CallBack,
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(void *)InstancePtr);
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if (Status == XST_SUCCESS) {
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break;
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}
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}
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if (!Retries) {
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return XST_FAILURE;
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}
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/* Wait until the DMA transfer is done
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*/
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while (!Done && !Error) {
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/* Wait */
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}
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if (Error) {
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return XST_FAILURE;
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}
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/* Invalidate the DestBuffer before receiving the data, in case the
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* Data Cache is enabled
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*/
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Xil_DCacheInvalidateRange((u32)&DestBuffer, Length);
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/* Transfer completes successfully, check data
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*
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* Compare the contents of destination buffer and source buffer
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*/
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for (Index = 0; Index < Length; Index++) {
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if ( DestPtr[Index] != SrcPtr[Index]) {
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return XST_FAILURE;
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}
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}
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/*
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* Setup the interrupt system, including:
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* - Initialize the interrupt controller,
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* - Register the XAxiCdma interrupt handler to the interrupt controller
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* - Enable interrupt
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*
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* @param IntcInstancePtr is a pointer to the instance of the INTC
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* @param InstancePtr is a pointer to the instance of the XAxiCdma
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* @param IntrId is the interrupt Id for XAxiCdma
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*
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* @return
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* - XST_SUCCESS if interrupt system setup successfully
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* - XST_FAILURE if error occurs
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*
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* @note None
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*
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*******************************************************************************/
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#ifdef XPAR_INTC_0_DEVICE_ID
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static int SetupIntrSystem(XIntc *IntcInstancePtr, XAxiCdma *InstancePtr,
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u32 IntrId)
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{
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int Status;
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#ifndef TESTAPP_GEN
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/*
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* Initialize the interrupt controller driver
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*/
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Status = XIntc_Initialize(IntcInstancePtr, INTC_DEVICE_ID);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#endif
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/*
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* Connect the driver interrupt handler
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* It will call the example callback upon transfer completion
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*/
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Status = XIntc_Connect(IntcInstancePtr, IntrId,
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(XInterruptHandler)XAxiCdma_IntrHandler,
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(void *)InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#ifndef TESTAPP_GEN
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/*
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* Start the interrupt controller such that interrupts are enabled for
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* all devices that cause interrupts. Specify real mode so that the DMA
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* engine can generate interrupts through the interrupt controller
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*/
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Status = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#endif
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/*
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* Enable the interrupt for the DMA engine
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*/
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XIntc_Enable(IntcInstancePtr, IntrId);
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#ifndef TESTAPP_GEN
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Xil_ExceptionInit();
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Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
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(Xil_ExceptionHandler)XIntc_InterruptHandler,
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(void *)IntcInstancePtr);
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Xil_ExceptionEnable();
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#endif /* TESTAPP_GEN */
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return XST_SUCCESS;
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}
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#else
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static int SetupIntrSystem(XScuGic *IntcInstancePtr, XAxiCdma *InstancePtr,
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u32 IntrId)
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{
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int Status;
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#ifndef TESTAPP_GEN
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||
|
/*
|
||
|
* Initialize the interrupt controller driver
|
||
|
*/
|
||
|
XScuGic_Config *IntcConfig;
|
||
|
|
||
|
|
||
|
/*
|
||
|
* Initialize the interrupt controller driver so that it is ready to
|
||
|
* use.
|
||
|
*/
|
||
|
IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
|
||
|
if (NULL == IntcConfig) {
|
||
|
return XST_FAILURE;
|
||
|
}
|
||
|
|
||
|
Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
|
||
|
IntcConfig->CpuBaseAddress);
|
||
|
if (Status != XST_SUCCESS) {
|
||
|
return XST_FAILURE;
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
XScuGic_SetPriorityTriggerType(IntcInstancePtr, IntrId, 0xA0, 0x3);
|
||
|
|
||
|
/*
|
||
|
* Connect the device driver handler that will be called when an
|
||
|
* interrupt for the device occurs, the handler defined above performs
|
||
|
* the specific interrupt processing for the device.
|
||
|
*/
|
||
|
Status = XScuGic_Connect(IntcInstancePtr, IntrId,
|
||
|
(Xil_InterruptHandler)XAxiCdma_IntrHandler,
|
||
|
InstancePtr);
|
||
|
if (Status != XST_SUCCESS) {
|
||
|
return Status;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Enable the interrupt for the DMA device.
|
||
|
*/
|
||
|
XScuGic_Enable(IntcInstancePtr, IntrId);
|
||
|
|
||
|
|
||
|
|
||
|
#ifndef TESTAPP_GEN
|
||
|
|
||
|
Xil_ExceptionInit();
|
||
|
|
||
|
/*
|
||
|
* Connect the interrupt controller interrupt handler to the hardware
|
||
|
* interrupt handling logic in the processor.
|
||
|
*/
|
||
|
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
|
||
|
(Xil_ExceptionHandler)XScuGic_InterruptHandler,
|
||
|
IntcInstancePtr);
|
||
|
|
||
|
|
||
|
/*
|
||
|
* Enable interrupts in the Processor.
|
||
|
*/
|
||
|
Xil_ExceptionEnable();
|
||
|
|
||
|
#endif /* TESTAPP_GEN */
|
||
|
|
||
|
return XST_SUCCESS;
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
/*****************************************************************************/
|
||
|
/*
|
||
|
* Callback function for the simple transfer. It is called by the driver's
|
||
|
* interrupt handler.
|
||
|
*
|
||
|
* @param CallBackRef is the reference pointer registered through
|
||
|
* transfer submission. In this case, it is the pointer to the
|
||
|
* driver instance
|
||
|
* @param IrqMask is the interrupt mask the driver interrupt handler
|
||
|
* passes to the callback function.
|
||
|
* @param IgnorePtr is a pointer that is ignored by simple callback
|
||
|
* function
|
||
|
*
|
||
|
* @return None
|
||
|
*
|
||
|
* @note None
|
||
|
*
|
||
|
******************************************************************************/
|
||
|
static void Example_CallBack(void *CallBackRef, u32 IrqMask, int *IgnorePtr)
|
||
|
{
|
||
|
|
||
|
if (IrqMask & XAXICDMA_XR_IRQ_ERROR_MASK) {
|
||
|
Error = TRUE;
|
||
|
}
|
||
|
|
||
|
if (IrqMask & XAXICDMA_XR_IRQ_IOC_MASK) {
|
||
|
Done = TRUE;
|
||
|
}
|
||
|
|
||
|
}
|
||
|
|
||
|
|
||
|
/*****************************************************************************/
|
||
|
/*
|
||
|
*
|
||
|
* This function disables the interrupt for the XAxiCdma device
|
||
|
*
|
||
|
* @param IntcInstancePtr is the pointer to the instance of the INTC
|
||
|
* @param IntrId is the interrupt Id for the XAxiCdma instance
|
||
|
*
|
||
|
* @return None.
|
||
|
*
|
||
|
* @note None.
|
||
|
*
|
||
|
******************************************************************************/
|
||
|
#ifdef XPAR_INTC_0_DEVICE_ID
|
||
|
static void DisableIntrSystem(XIntc *IntcInstancePtr, u32 IntrId)
|
||
|
{
|
||
|
|
||
|
/* Disconnect the interrupt
|
||
|
*/
|
||
|
XIntc_Disconnect(IntcInstancePtr, IntrId);
|
||
|
|
||
|
}
|
||
|
#else
|
||
|
static void DisableIntrSystem(XScuGic *IntcInstancePtr, u32 IntrId)
|
||
|
{
|
||
|
|
||
|
/* Disconnect the interrupt
|
||
|
*/
|
||
|
XScuGic_Disable(IntcInstancePtr, IntrId);
|
||
|
XScuGic_Disconnect(IntcInstancePtr, IntrId);
|
||
|
|
||
|
|
||
|
}
|
||
|
|
||
|
#endif
|
||
|
|