<p>It is the responsibility of the application to provide an interrupt handler for the watchdog timer and connect it to the interrupt system if interrupt driven mode is desired.</p>
<p>If interrupt is enabled, the watchdog timer device generates an interrupt when the counter reaches zero.</p>
<p>If the hardware interrupt signal is not connected/enabled, polled mode is the only option (using IsWdtExpired) for the watchdog.</p>
<p>The outputs from the WDT are individually enabled/disabled using _EnableOutput()/_DisableOutput(). The clock divisor ratio and initial restart value of the count is configurable using _SetControlValues().</p>
<p>The reset condition of the hardware has the maximum initial count in the Counter Reset Value (CRV) and the WDT is disabled with the reset enable enabled and the reset length set to 32 clocks. i.e. </p>
</pre><p>This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.</p>