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sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53

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This enables saving of some OCM space for FSBL.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
This commit is contained in:
Sarat Chand Savitala 2015-07-02 18:49:37 +05:30 • committed by Nava kishore Manne
parent 9083a0a512
commit 0133313ae5
1 changed files with 3 additions and 3 deletions
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6
lib/sw_apps/zynqmp_fsbl/src/lscript_a53.ld
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@ -198,19 +198,19 @@ SECTIONS
*(.gcc_except_table)
} > psu_ocm_ram_0_S_AXI_BASEADDR
.mmu_tbl0 (ALIGN(4096)) : {
.mmu_tbl0 (ALIGN(16)) : {
__mmu_tbl0_start = .;
*(.mmu_tbl0)
__mmu_tbl0_end = .;
} > psu_ocm_ram_0_S_AXI_BASEADDR
.mmu_tbl1 (ALIGN(4096)) : {
.mmu_tbl1 (ALIGN(2048)) : {
__mmu_tbl1_start = .;
*(.mmu_tbl1)
__mmu_tbl1_end = .;
} > psu_ocm_ram_0_S_AXI_BASEADDR
.mmu_tbl2 (ALIGN(4096)) : {
.mmu_tbl2 (ALIGN(2048)) : {
__mmu_tbl2_start = .;
*(.mmu_tbl2)
__mmu_tbl2_end = .;