stv0g/embeddedsw
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

cpu_cortexa9 : added common namespace to all common tcl commands.

Browse source 
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
This commit is contained in:
Nava kishore Manne 2015-04-10 10:48:33 +05:30
parent 92c6b0e7b5
commit 05938c3694
1 changed files with 17 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

34
XilinxProcessorIPLib/drivers/cpu_cortexa9/data/cpu_cortexa9.tcl
View file

@ -34,7 +34,7 @@
#
# Ver Who Date Changes
# ----- ---- -------- -----------------------------------------------
# 1.00a sdm 05/16/10 Updated to support AXI version of the core
# 1.00a sdm 05/16/10 Updated to support AXI common::version of the core
# 2.0 adk 10/12/13 Updated as per the New Tcl API's
# 2.1 pkp 06/27/14 Updated the tcl to create empty libxil for IAR support in BSP
#
@ -54,10 +54,10 @@ proc generate {drv_handle} {
proc xdefine_cortexa9_params {drvhandle} {
set sw_proc_handle [get_sw_processor]
set hw_proc_handle [get_cells [get_property HW_INSTANCE $sw_proc_handle ]]
set procdrv [get_sw_processor]
set archiver [get_property CONFIG.archiver $procdrv]
set sw_proc_handle [hsi::get_sw_processor]
set hw_proc_handle [hsi::get_cells [common::get_property HW_INSTANCE $sw_proc_handle ]]
set procdrv [hsi::get_sw_processor]
set archiver [common::get_property CONFIG.archiver $procdrv]
if {[string first "iarchive" $archiver] < 0 } {
} else {
set libxil_a [file join .. .. lib libxil.a]
@ -70,14 +70,14 @@ proc xdefine_cortexa9_params {drvhandle} {
}
}
set periphs [::hsi::utils::get_common_driver_ips $drvhandle]
set lprocs [get_cells -filter "IP_NAME==ps7_cortexa9"]
set lprocs [hsi::get_cells -filter "IP_NAME==ps7_cortexa9"]
set lprocs [lsort $lprocs]
set config_inc [::hsi::utils::open_include_file "xparameters.h"]
puts $config_inc "/* Definition for CPU ID */"
foreach periph $periphs {
set iname [get_property NAME $periph]
set iname [common::get_property NAME $periph]
#-----------
# Set CPU ID
@ -95,29 +95,29 @@ proc xdefine_cortexa9_params {drvhandle} {
}
proc xdefine_addr_params_for_ext_intf {drvhandle file_name} {
set sw_proc_handle [get_sw_processor]
set hw_proc_handle [get_cells [get_property HW_INSTANCE $sw_proc_handle ]]
set sw_proc_handle [hsi::get_sw_processor]
set hw_proc_handle [hsi::get_cells [common::get_property HW_INSTANCE $sw_proc_handle ]]
# Open include file
set file_handle [::hsi::utils::open_include_file $file_name]
set mem_ranges [get_mem_ranges -of_objects $hw_proc_handle]
set mem_ranges [hsi::get_mem_ranges -of_objects $hw_proc_handle]
foreach mem_range $mem_ranges {
set inst [get_property INSTANCE $mem_range]
set inst [common::get_property INSTANCE $mem_range]
if {$inst != ""} {
continue
}
set bparam_name [get_property BASE_NAME $mem_range]
set bparam_value [get_property BASE_VALUE $mem_range]
set hparam_name [get_property HIGH_NAME $mem_range]
set hparam_value [get_property HIGH_VALUE $mem_range]
set bparam_name [common::get_property BASE_NAME $mem_range]
set bparam_value [common::get_property BASE_VALUE $mem_range]
set hparam_name [common::get_property HIGH_NAME $mem_range]
set hparam_value [common::get_property HIGH_VALUE $mem_range]
# Print all parameters for all peripherals
set name [string toupper [get_property NAME $mem_range]]
set name [string toupper [common::get_property NAME $mem_range]]
puts $file_handle ""
puts $file_handle "/* Definitions for interface [string toupper $name] */"
set name [format "XPAR_%s_" $name]
@ -135,7 +135,7 @@ proc xdefine_addr_params_for_ext_intf {drvhandle file_name} {
puts $file_handle "#define $name $value"
}
set name [string toupper [get_property NAME $mem_range]]
set name [string toupper [common::get_property NAME $mem_range]]
set name [format "XPAR_%s_" $name]
if {$hparam_value != ""} {
set value [::hsi::utils::format_addr_string $hparam_value $hparam_name]