stv0g/embeddedsw
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

dp: rx: Added a function to enable a specified interrupt.

Browse source 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-01-16 15:32:53 -08:00 • committed by Nava kishore Manne
parent 3748170590
commit 13e6880ff5
2 changed files with 12 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
XilinxProcessorIPLib/drivers/dp/src/xdprx.h
View file

@ -189,6 +189,7 @@ void XDprx_WaitUs(XDprx *InstancePtr, u32 MicroSeconds);
/* xdprx_intr.c: Interrupt handling functions. */
void XDprx_InterruptHandler(XDprx *InstancePtr);
void XDprx_GenerateHpdInterrupt(XDprx *InstancePtr, u16 DurationUs);
void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask);
void XDprx_InterruptDisable(XDprx *InstancePtr, u32 Mask);
void XDprx_SetIntrVmChangeHandler(XDprx *InstancePtr,
XDprx_IntrHandler CallbackFunc, void *CallbackRef);

11
XilinxProcessorIPLib/drivers/dp/src/xdprx_intr.c
View file

@ -158,6 +158,17 @@ void XDprx_GenerateHpdInterrupt(XDprx *InstancePtr, u16 DurationUs)
(DurationUs << 16) | 0x1);
}
void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask)
{
u32 MaskVal;
MaskVal = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
XDPRX_INTERRUPT_CAUSE);
MaskVal &= ~Mask;
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_INTERRUPT_MASK,
MaskVal);
}
void XDprx_InterruptDisable(XDprx *InstancePtr, u32 Mask)
{
u32 MaskVal;