dp: Initial version based on dptx.
Dptx driver moved to a common DisplayPort driver, Dp, in order to have a common location for both transmit (Dptx) and receive (Dprx). Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion
Nava kishore Manne
parent
d94ec8f60e
commit
202d0114c1
87 changed files with 37030 additions and 0 deletions
6
XilinxProcessorIPLib/drivers/dp/data/dependencies.props
Normal file
6
XilinxProcessorIPLib/drivers/dp/data/dependencies.props
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
xdptx_audio_example.c=xdptx_example_common.h,xdptx_example_common.c
|
||||
xdptx_intr_example.c=xdptx_example_common.h,xdptx_example_common.c
|
||||
xdptx_mst_example.c=xdptx_example_common.h,xdptx_example_common.c
|
||||
xdptx_poll_example.c=xdptx_example_common.h,xdptx_example_common.c
|
||||
xdptx_selftest_example.c=xdptx_example_common.h,xdptx_example_common.c
|
||||
xdptx_timer_example.c=xdptx_example_common.h,xdptx_example_common.c
|
||||
42
XilinxProcessorIPLib/drivers/dp/data/dp.mdd
Normal file
42
XilinxProcessorIPLib/drivers/dp/data/dp.mdd
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
##******************************************************************************
|
||||
##
|
||||
## Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
##
|
||||
## Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
## of this software and associated documentation files (the "Software"), to deal
|
||||
## in the Software without restriction, including without limitation the rights
|
||||
## to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
## copies of the Software, and to permit persons to whom the Software is
|
||||
## furnished to do so, subject to the following conditions:
|
||||
##
|
||||
## The above copyright notice and this permission notice shall be included in
|
||||
## all copies or substantial portions of the Software.
|
||||
##
|
||||
## Use of the Software is limited solely to applications:
|
||||
## (a) running on a Xilinx device, or
|
||||
## (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
##
|
||||
## THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
## IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
## FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
## XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
## WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
## OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
## SOFTWARE.
|
||||
##
|
||||
## Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
## in advertising or otherwise to promote the sale, use or other dealings in
|
||||
## this Software without prior written authorization from Xilinx.
|
||||
##
|
||||
##*****************************************************************************/
|
||||
|
||||
OPTION psf_version = 2.1;
|
||||
|
||||
BEGIN driver dp
|
||||
OPTION supported_peripherals = (displayport);
|
||||
OPTION driver_state = ACTIVE;
|
||||
OPTION depends = (video_common);
|
||||
OPTION copyfiles = all;
|
||||
OPTION VERSION = 1.0;
|
||||
OPTION NAME = dp;
|
||||
END driver
|
||||
186
XilinxProcessorIPLib/drivers/dp/data/dp.tcl
Normal file
186
XilinxProcessorIPLib/drivers/dp/data/dp.tcl
Normal file
|
|
@ -0,0 +1,186 @@
|
|||
##******************************************************************************
|
||||
##
|
||||
## Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
##
|
||||
## Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
## of this software and associated documentation files (the "Software"), to deal
|
||||
## in the Software without restriction, including without limitation the rights
|
||||
## to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
## copies of the Software, and to permit persons to whom the Software is
|
||||
## furnished to do so, subject to the following conditions:
|
||||
##
|
||||
## The above copyright notice and this permission notice shall be included in
|
||||
## all copies or substantial portions of the Software.
|
||||
##
|
||||
## Use of the Software is limited solely to applications:
|
||||
## (a) running on a Xilinx device, or
|
||||
## (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
##
|
||||
## THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
## IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
## FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
## XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
## WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
## OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
## SOFTWARE.
|
||||
##
|
||||
## Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
## in advertising or otherwise to promote the sale, use or other dealings in
|
||||
## this Software without prior written authorization from Xilinx.
|
||||
##
|
||||
##*****************************************************************************/
|
||||
proc generate {drv_handle} {
|
||||
xdefine_include_file $drv_handle "xparameters.h" "XDptx" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_LANE_COUNT" "C_LINK_RATE" "C_MAX_BITS_PER_COLOR" "C_QUAD_PIXEL_ENABLE" "C_DUAL_PIXEL_ENABLE" "C_YCRCB_ENABLE" "C_YONLY_ENABLE" "C_GT_DATAWIDTH" "C_SECONDARY_SUPPORT" "C_AUDIO_CHANNELS" "C_MST_ENABLE" "C_NUMBER_OF_MST_STREAMS" "C_PROTOCOL_SELECTION" "S_AXI_ACLK"
|
||||
xdefine_config_file $drv_handle "xdptx_g.c" "XDptx" "DEVICE_ID" "C_BASEADDR" "S_AXI_ACLK" "C_LANE_COUNT" "C_LINK_RATE" "C_MAX_BITS_PER_COLOR" "C_QUAD_PIXEL_ENABLE" "C_DUAL_PIXEL_ENABLE" "C_YCRCB_ENABLE" "C_YONLY_ENABLE" "C_GT_DATAWIDTH" "C_SECONDARY_SUPPORT" "C_AUDIO_CHANNELS" "C_MST_ENABLE" "C_NUMBER_OF_MST_STREAMS" "C_PROTOCOL_SELECTION"
|
||||
xdefine_canonical_xpars $drv_handle "xparameters.h" "XDptx" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_LANE_COUNT" "C_LINK_RATE" "C_MAX_BITS_PER_COLOR" "C_QUAD_PIXEL_ENABLE" "C_DUAL_PIXEL_ENABLE" "C_YCRCB_ENABLE" "C_YONLY_ENABLE" "C_GT_DATAWIDTH" "C_SECONDARY_SUPPORT" "C_AUDIO_CHANNELS" "C_MST_ENABLE" "C_NUMBER_OF_MST_STREAMS" "C_PROTOCOL_SELECTION" "S_AXI_ACLK"
|
||||
}
|
||||
|
||||
#
|
||||
# Given a list of arguments, define them all in an include file.
|
||||
# Handles IP model/user parameters, as well as the special parameters NUM_INSTANCES,
|
||||
# DEVICE_ID
|
||||
# Will not work for a processor.
|
||||
#
|
||||
proc xdefine_include_file {drv_handle file_name drv_string args} {
|
||||
set args [get_exact_arg_list $args]
|
||||
# Open include file
|
||||
set file_handle [xopen_include_file $file_name]
|
||||
|
||||
# Get all peripherals connected to this driver
|
||||
set periphs [xget_sw_iplist_for_driver $drv_handle]
|
||||
|
||||
# Handle special cases
|
||||
set arg "NUM_INSTANCES"
|
||||
set posn [lsearch -exact $args $arg]
|
||||
if {$posn > -1} {
|
||||
puts $file_handle "/* Definitions for driver [string toupper [get_property name $drv_handle]] */"
|
||||
# Define NUM_INSTANCES
|
||||
puts $file_handle "#define [xget_dname $drv_string $arg] [llength $periphs]"
|
||||
set args [lreplace $args $posn $posn]
|
||||
}
|
||||
|
||||
# Check if it is a driver parameter
|
||||
lappend newargs
|
||||
foreach arg $args {
|
||||
set value [get_property CONFIG.$arg $drv_handle]
|
||||
if {[llength $value] == 0} {
|
||||
lappend newargs $arg
|
||||
} else {
|
||||
puts $file_handle "#define [xget_dname $drv_string $arg] [get_property $arg $drv_handle]"
|
||||
}
|
||||
}
|
||||
set args $newargs
|
||||
|
||||
# Print all parameters for all peripherals
|
||||
set device_id 0
|
||||
foreach periph $periphs {
|
||||
puts $file_handle ""
|
||||
puts $file_handle "/* Definitions for peripheral [string toupper [get_property NAME $periph]] */"
|
||||
|
||||
foreach arg $args {
|
||||
if {[string compare -nocase "DEVICE_ID" $arg] == 0} {
|
||||
set value $device_id
|
||||
incr device_id
|
||||
} elseif {[string compare -nocase "S_AXI_ACLK" $arg] == 0} {
|
||||
set freq [xget_ip_clk_pin_freq $periph $arg]
|
||||
if {[llength $freq] == 0} {
|
||||
set freq 0
|
||||
puts "WARNING: Clock frequency information is not available in the design, \
|
||||
for peripheral $periph_name. This will not work."
|
||||
}
|
||||
set value $freq
|
||||
} else {
|
||||
set value [get_property CONFIG.$arg $periph]
|
||||
}
|
||||
if {[llength $value] == 0} {
|
||||
set value 0
|
||||
}
|
||||
set value [xformat_addr_string $value $arg]
|
||||
if {[string compare -nocase "HW_VER" $arg] == 0} {
|
||||
puts $file_handle "#define [xget_name $periph $arg] \"$value\""
|
||||
} else {
|
||||
puts $file_handle "#define [xget_name $periph $arg] $value"
|
||||
}
|
||||
}
|
||||
puts $file_handle ""
|
||||
}
|
||||
puts $file_handle "\n/******************************************************************/\n"
|
||||
close $file_handle
|
||||
}
|
||||
|
||||
#
|
||||
# xdefine_canonical_xpars - Used to print out canonical defines for a driver.
|
||||
# Given a list of arguments, define each as a canonical constant name, using
|
||||
# the driver name, in an include file.
|
||||
#
|
||||
proc xdefine_canonical_xpars {drv_handle file_name drv_string args} {
|
||||
set args [get_exact_arg_list $args]
|
||||
# Open include file
|
||||
set file_handle [xopen_include_file $file_name]
|
||||
|
||||
# Get all the peripherals connected to this driver
|
||||
set periphs [xget_sw_iplist_for_driver $drv_handle]
|
||||
|
||||
# Get the names of all the peripherals connected to this driver
|
||||
foreach periph $periphs {
|
||||
set peripheral_name [string toupper [get_property NAME $periph]]
|
||||
lappend peripherals $peripheral_name
|
||||
}
|
||||
|
||||
# Get possible canonical names for all the peripherals connected to this
|
||||
# driver
|
||||
set device_id 0
|
||||
foreach periph $periphs {
|
||||
set canonical_name [string toupper [format "%s_%s" $drv_string $device_id]]
|
||||
lappend canonicals $canonical_name
|
||||
|
||||
# Create a list of IDs of the peripherals whose hardware instance name
|
||||
# doesn't match the canonical name. These IDs can be used later to
|
||||
# generate canonical definitions
|
||||
if { [lsearch $peripherals $canonical_name] < 0 } {
|
||||
lappend indices $device_id
|
||||
}
|
||||
incr device_id
|
||||
}
|
||||
|
||||
set i 0
|
||||
foreach periph $periphs {
|
||||
set periph_name [string toupper [get_property NAME $periph]]
|
||||
|
||||
# Generate canonical definitions only for the peripherals whose
|
||||
# canonical name is not the same as hardware instance name
|
||||
if { [lsearch $canonicals $periph_name] < 0 } {
|
||||
puts $file_handle "/* Canonical definitions for peripheral $periph_name */"
|
||||
set canonical_name [format "%s_%s" $drv_string [lindex $indices $i]]
|
||||
|
||||
foreach arg $args {
|
||||
set lvalue [xget_dname $canonical_name $arg]
|
||||
|
||||
# The commented out rvalue is the name of the instance-specific constant
|
||||
# set rvalue [xget_name $periph $arg]
|
||||
# The rvalue set below is the actual value of the parameter
|
||||
if {[string compare -nocase "S_AXI_ACLK" $arg] == 0} {
|
||||
set freq [xget_ip_clk_pin_freq $periph $arg]
|
||||
if {[llength $freq] == 0} {
|
||||
set freq 0
|
||||
puts "WARNING: Clock frequency information is not available in the design, \
|
||||
for peripheral $periph_name. This will not work."
|
||||
}
|
||||
set rvalue $freq
|
||||
} else {
|
||||
set rvalue [xget_param_value $periph $arg]
|
||||
if {[llength $rvalue] == 0} {
|
||||
set rvalue 0
|
||||
}
|
||||
set rvalue [xformat_addr_string $rvalue $arg]
|
||||
}
|
||||
puts $file_handle "#define $lvalue $rvalue"
|
||||
}
|
||||
puts $file_handle ""
|
||||
incr i
|
||||
}
|
||||
}
|
||||
|
||||
puts $file_handle "\n/******************************************************************/\n"
|
||||
close $file_handle
|
||||
}
|
||||
42
XilinxProcessorIPLib/drivers/dp/doc/html/api/annotated.html
Executable file
42
XilinxProcessorIPLib/drivers/dp/doc/html/api/annotated.html
Executable file
|
|
@ -0,0 +1,42 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>Class List</h1>Here are the classes, structs, unions and interfaces with brief descriptions:<table>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx.html">XDptx</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___aux_transaction.html">XDptx_AuxTransaction</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sideband_msg.html">XDptx_SidebandMsg</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sideband_reply.html">XDptx_SidebandReply</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___sink_config.html">XDptx_SinkConfig</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td class="indexvalue"></td></tr>
|
||||
</table>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/doxygen.png
Executable file
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/doxygen.png
Executable file
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
334
XilinxProcessorIPLib/drivers/dp/doc/html/api/driver_api_doxygen.css
Executable file
334
XilinxProcessorIPLib/drivers/dp/doc/html/api/driver_api_doxygen.css
Executable file
|
|
@ -0,0 +1,334 @@
|
|||
BODY {
|
||||
background-color: #FFFFFF;
|
||||
font-family: Verdana, Arial, Helvetica, Sans-serif;
|
||||
}
|
||||
|
||||
H1 {
|
||||
margin-bottom: 0em;
|
||||
font-size: 2.00em;
|
||||
font-style: normal;
|
||||
color: #990033;
|
||||
}
|
||||
|
||||
H2 {
|
||||
font-size: 1.05em;
|
||||
font-style: normal;
|
||||
color: #666666;
|
||||
}
|
||||
|
||||
H3 {
|
||||
font-size: 1.00em;
|
||||
font-style: normal;
|
||||
color: #000000;
|
||||
}
|
||||
|
||||
H4 {
|
||||
font-size: .90em;
|
||||
font-style: italic;
|
||||
color: #000000;
|
||||
}
|
||||
|
||||
H5 {
|
||||
font-size: .90em;
|
||||
font-style: italic;
|
||||
color: #000000;
|
||||
}
|
||||
|
||||
H6 {
|
||||
font-size: .90em;
|
||||
font-style: italic;
|
||||
color: #000000;
|
||||
}
|
||||
|
||||
OL {
|
||||
}
|
||||
|
||||
UL {
|
||||
}
|
||||
|
||||
LI {
|
||||
}
|
||||
|
||||
P {
|
||||
color: #000000;
|
||||
}
|
||||
|
||||
P.Caution {
|
||||
color: #990033;
|
||||
}
|
||||
|
||||
P.Code {
|
||||
font-family: Courier New, Courier, Mono;
|
||||
color: #003399;
|
||||
}
|
||||
|
||||
P.HeadingDBox {
|
||||
font-weight: bold;
|
||||
}
|
||||
|
||||
P.HeadingGlossary {
|
||||
font-weight: bold;
|
||||
}
|
||||
|
||||
P.LinkGlossary {
|
||||
margin-bottom: .50em;
|
||||
}
|
||||
|
||||
P.Note {
|
||||
}
|
||||
|
||||
P.SysInOut {
|
||||
font-family: Courier New, Courier, Mono;
|
||||
}
|
||||
|
||||
P.TableFootnote {
|
||||
font-size: .80em;
|
||||
margin-bottom: .70em;
|
||||
}
|
||||
|
||||
P.TableHeading {
|
||||
font-weight: bold;
|
||||
color: #FFFFFF;
|
||||
}
|
||||
|
||||
P.TableTitle {
|
||||
font-style: italic;
|
||||
font-weight: bold;
|
||||
}
|
||||
|
||||
SPAN.aEmphasis {
|
||||
font-style: italic;
|
||||
}
|
||||
|
||||
SPAN.aFilename {
|
||||
font-family: Courier New, Courier, Mono;
|
||||
}
|
||||
|
||||
|
||||
SPAN.aGUISysIn {
|
||||
font-family: Verdana, Arial, Helvetica, Sans-serif;
|
||||
font-weight: bold;
|
||||
}
|
||||
|
||||
SPAN.aReference {
|
||||
font-style: italic;
|
||||
}
|
||||
|
||||
SPAN.aSysIn {
|
||||
font-family: Courier New, Courier, Monospace;
|
||||
font-weight: bold;
|
||||
}
|
||||
|
||||
SPAN.aSysOut {
|
||||
font-family: Courier New, Courier, Monospace;
|
||||
}
|
||||
|
||||
SPAN.aSymbol {
|
||||
font-family: Symbol;
|
||||
}
|
||||
|
||||
CAPTION { font-weight: bold }
|
||||
DIV.qindex {
|
||||
width: 100%;
|
||||
background-color: #eeeeff;
|
||||
border: 1px solid #B0B0B0;
|
||||
text-align: center;
|
||||
margin: 2px;
|
||||
padding: 2px;
|
||||
}
|
||||
A.qindex {
|
||||
text-decoration: none;
|
||||
font-weight: bold;
|
||||
color: #1A419D;
|
||||
padding: 2px;
|
||||
}
|
||||
A.qindex:visited {
|
||||
text-decoration: none;
|
||||
font-weight: bold;
|
||||
color: #1A419D
|
||||
padding: 2px;
|
||||
}
|
||||
A.qindex:hover {
|
||||
text-decoration: none;
|
||||
background-color: #ddddff;
|
||||
padding: 2px;
|
||||
}
|
||||
A.qindexHL {
|
||||
text-decoration: none;
|
||||
font-weight: bold;
|
||||
background-color: #6666cc;
|
||||
color: #ffffff;
|
||||
padding: 2 6px;
|
||||
border: 1px double #9295C2;
|
||||
}
|
||||
A.qindexHL:hover {
|
||||
text-decoration: none;
|
||||
background-color: #6666cc;
|
||||
color: #ffffff;
|
||||
padding: 2px 6px;
|
||||
}
|
||||
A.qindexHL:visited { text-decoration: none; background-color: #6666cc; color: #ffffff }
|
||||
A.el { text-decoration: none; font-weight: bold }
|
||||
A.elRef { font-weight: bold }
|
||||
A.code { text-decoration: none; font-weight: normal; color: #1A419D}
|
||||
A.codeRef { font-weight: normal; color: #1A419D}
|
||||
A:hover { text-decoration: none; background-color: #f2f2ff }
|
||||
DL.el { margin-left: -1cm }
|
||||
PRE.fragment {
|
||||
border: 1px solid #CCCCCC;
|
||||
background-color: #f5f5f5;
|
||||
margin-top: 4px;
|
||||
margin-bottom: 4px;
|
||||
margin-left: 2px;
|
||||
margin-right: 8px;
|
||||
padding-left: 6px;
|
||||
padding-right: 6px;
|
||||
padding-top: 4px;
|
||||
padding-bottom: 4px;
|
||||
}
|
||||
DIV.fragment {
|
||||
border: 1px solid #CCCCCC;
|
||||
background-color: #f5f5f5;
|
||||
padding: 6px;
|
||||
}
|
||||
DIV.ah { background-color: black; font-weight: bold; color: #ffffff; margin-bottom: 3px; margin-top: 3px }
|
||||
TD.md { background-color: #F4F4FB; font-weight: bold; }
|
||||
TD.mdname1 { background-color: #F4F4FB; font-weight: bold; color: #602020; }
|
||||
TD.mdname { background-color: #F4F4FB; font-weight: bold; color: #602020; width: 600px; }
|
||||
DIV.groupHeader { margin-left: 16px; margin-top: 12px; margin-bottom: 6px; font-weight: bold }
|
||||
DIV.groupText { margin-left: 16px; font-style: italic; font-size: smaller }
|
||||
BODY {
|
||||
background: white;
|
||||
color: black;
|
||||
margin-right: 20px;
|
||||
margin-left: 20px;
|
||||
}
|
||||
TD.indexkey {
|
||||
background-color: #eeeeff;
|
||||
font-weight: bold;
|
||||
padding-right : 10px;
|
||||
padding-top : 2px;
|
||||
padding-left : 10px;
|
||||
padding-bottom : 2px;
|
||||
margin-left : 0px;
|
||||
margin-right : 0px;
|
||||
margin-top : 2px;
|
||||
margin-bottom : 2px;
|
||||
border: 1px solid #CCCCCC;
|
||||
}
|
||||
TD.indexvalue {
|
||||
background-color: #eeeeff;
|
||||
font-style: italic;
|
||||
padding-right : 10px;
|
||||
padding-top : 2px;
|
||||
padding-left : 10px;
|
||||
padding-bottom : 2px;
|
||||
margin-left : 0px;
|
||||
margin-right : 0px;
|
||||
margin-top : 2px;
|
||||
margin-bottom : 2px;
|
||||
border: 1px solid #CCCCCC;
|
||||
}
|
||||
TR.memlist {
|
||||
background-color: #f0f0f0;
|
||||
}
|
||||
P.formulaDsp { text-align: center; }
|
||||
IMG.formulaDsp { }
|
||||
IMG.formulaInl { vertical-align: middle; }
|
||||
SPAN.keyword { color: #008000 }
|
||||
SPAN.keywordtype { color: #604020 }
|
||||
SPAN.keywordflow { color: #e08000 }
|
||||
SPAN.comment { color: #800000 }
|
||||
SPAN.preprocessor { color: #806020 }
|
||||
SPAN.stringliteral { color: #002080 }
|
||||
SPAN.charliteral { color: #008080 }
|
||||
.mdTable {
|
||||
border: 1px solid #868686;
|
||||
background-color: #F4F4FB;
|
||||
}
|
||||
.mdRow {
|
||||
padding: 8px 10px;
|
||||
}
|
||||
.mdescLeft {
|
||||
font-size: smaller;
|
||||
font-family: Verdana, Arial, Helvetica, sans-serif;
|
||||
background-color: #FAFAFA;
|
||||
padding-left: 8px;
|
||||
border-top: 1px none #E0E0E0;
|
||||
border-right: 1px none #E0E0E0;
|
||||
border-bottom: 1px none #E0E0E0;
|
||||
border-left: 1px none #E0E0E0;
|
||||
margin: 0px;
|
||||
}
|
||||
.mdescRight {
|
||||
font-size: smaller;
|
||||
font-family: Verdana, Arial, Helvetica, sans-serif;
|
||||
font-style: italic;
|
||||
background-color: #FAFAFA;
|
||||
padding-left: 4px;
|
||||
border-top: 1px none #E0E0E0;
|
||||
border-right: 1px none #E0E0E0;
|
||||
border-bottom: 1px none #E0E0E0;
|
||||
border-left: 1px none #E0E0E0;
|
||||
margin: 0px;
|
||||
padding-bottom: 0px;
|
||||
padding-right: 8px;
|
||||
}
|
||||
.memItemLeft {
|
||||
padding: 1px 0px 0px 8px;
|
||||
margin: 4px;
|
||||
border-top-width: 1px;
|
||||
border-right-width: 1px;
|
||||
border-bottom-width: 1px;
|
||||
border-left-width: 1px;
|
||||
border-top-style: solid;
|
||||
border-top-color: #E0E0E0;
|
||||
border-right-color: #E0E0E0;
|
||||
border-bottom-color: #E0E0E0;
|
||||
border-left-color: #E0E0E0;
|
||||
border-right-style: none;
|
||||
border-bottom-style: none;
|
||||
border-left-style: none;
|
||||
background-color: #FAFAFA;
|
||||
font-family: Verdana, Arial, Helvetica, sans-serif;
|
||||
font-size: 12px;
|
||||
}
|
||||
.memItemRight {
|
||||
padding: 1px 0px 0px 8px;
|
||||
margin: 4px;
|
||||
border-top-width: 1px;
|
||||
border-right-width: 1px;
|
||||
border-bottom-width: 1px;
|
||||
border-left-width: 1px;
|
||||
border-top-style: solid;
|
||||
border-top-color: #E0E0E0;
|
||||
border-right-color: #E0E0E0;
|
||||
border-bottom-color: #E0E0E0;
|
||||
border-left-color: #E0E0E0;
|
||||
border-right-style: none;
|
||||
border-bottom-style: none;
|
||||
border-left-style: none;
|
||||
background-color: #FAFAFA;
|
||||
font-family: Verdana, Arial, Helvetica, sans-serif;
|
||||
font-size: 13px;
|
||||
}
|
||||
.search { color: #003399;
|
||||
font-weight: bold;
|
||||
}
|
||||
FORM.search {
|
||||
margin-bottom: 0px;
|
||||
margin-top: 0px;
|
||||
}
|
||||
INPUT.search { font-size: 75%;
|
||||
color: #000080;
|
||||
font-weight: normal;
|
||||
background-color: #eeeeff;
|
||||
}
|
||||
TD.tiny { font-size: 75%;
|
||||
}
|
||||
a {
|
||||
color: #252E78;
|
||||
}
|
||||
a:visited {
|
||||
color: #3D2185;
|
||||
}
|
||||
35
XilinxProcessorIPLib/drivers/dp/doc/html/api/files.html
Executable file
35
XilinxProcessorIPLib/drivers/dp/doc/html/api/files.html
Executable file
|
|
@ -0,0 +1,35 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
File Index
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>File List</h1>Here is a list of all files with brief descriptions:<table>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx_8c.html">xdptx.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx_8h.html">xdptx.h</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__edid_8c.html">xdptx_edid.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__hw_8h.html">xdptx_hw.h</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__intr_8c.html">xdptx_intr.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__mst_8c.html">xdptx_mst.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__selftest_8c.html">xdptx_selftest.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__sinit_8c.html">xdptx_sinit.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xdptx__spm_8c.html">xdptx_spm.c</a></td><td class="indexvalue"></td></tr>
|
||||
</table>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
208
XilinxProcessorIPLib/drivers/dp/doc/html/api/functions.html
Executable file
208
XilinxProcessorIPLib/drivers/dp/doc/html/api/functions.html
Executable file
|
|
@ -0,0 +1,208 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li id="current"><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="functions.html"><span>All</span></a></li>
|
||||
<li><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="#index_a"><span>a</span></a></li>
|
||||
<li><a href="#index_b"><span>b</span></a></li>
|
||||
<li><a href="#index_c"><span>c</span></a></li>
|
||||
<li><a href="#index_d"><span>d</span></a></li>
|
||||
<li><a href="#index_e"><span>e</span></a></li>
|
||||
<li><a href="#index_g"><span>g</span></a></li>
|
||||
<li><a href="#index_h"><span>h</span></a></li>
|
||||
<li><a href="#index_i"><span>i</span></a></li>
|
||||
<li><a href="#index_l"><span>l</span></a></li>
|
||||
<li><a href="#index_m"><span>m</span></a></li>
|
||||
<li><a href="#index_n"><span>n</span></a></li>
|
||||
<li><a href="#index_o"><span>o</span></a></li>
|
||||
<li><a href="#index_p"><span>p</span></a></li>
|
||||
<li><a href="#index_q"><span>q</span></a></li>
|
||||
<li><a href="#index_r"><span>r</span></a></li>
|
||||
<li><a href="#index_s"><span>s</span></a></li>
|
||||
<li><a href="#index_t"><span>t</span></a></li>
|
||||
<li><a href="#index_u"><span>u</span></a></li>
|
||||
<li><a href="#index_v"><span>v</span></a></li>
|
||||
<li><a href="#index_y"><span>y</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
Here is a list of all class members with links to the classes they belong to:
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_a">- a -</a></h3><ul>
|
||||
<li>Address
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#070f26779477d477d9f2cc4429b483e8">XDptx_AuxTransaction</a><li>AuxDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#2fdb769ccb56ed1c526f6997e97018d4">XDptx</a><li>AvgBytesPerTU
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#4ada79460ac8ec93764b7cf6ef6a03e0">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_b">- b -</a></h3><ul>
|
||||
<li>BaseAddr
|
||||
: <a class="el" href="struct_x_dptx___config.html#46946d5bdc36055fa2459fd4d8e1c11d">XDptx_Config</a><li>BitsPerColor
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#b2771987aba38d35ecb12fe068522779">XDptx_MainStreamAttributes</a><li>BoardChar
|
||||
: <a class="el" href="struct_x_dptx.html#2e3feb5199d0d6af0831d8ecf48cff0d">XDptx</a><li>Body
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg.html#9a14fd013ddc3647fb2bcc78b8dc94e4">XDptx_SidebandMsg</a><li>BroadcastMsg
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#81ce1b3145e6af1535a9b36f472d2abc">XDptx_SidebandMsgHeader</a></ul>
|
||||
<h3><a class="anchor" name="index_c">- c -</a></h3><ul>
|
||||
<li>CmdCode
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#d2a8df61186824f7dd4c5beabf80506d">XDptx_AuxTransaction</a><li>ComponentFormat
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#5aae7d62087f1d2d732e026fc4a27405">XDptx_MainStreamAttributes</a><li>Config
|
||||
: <a class="el" href="struct_x_dptx.html#e3324edbc15a89340bdee2bbf56244df">XDptx</a><li>Crc
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_body.html#181f9d362b18752ad169ef782b192e32">XDptx_SidebandMsgBody</a>, <a class="el" href="struct_x_dptx___sideband_msg_header.html#c071b683dae18c20e3bc98a9aaac828f">XDptx_SidebandMsgHeader</a></ul>
|
||||
<h3><a class="anchor" name="index_d">- d -</a></h3><ul>
|
||||
<li>Data
|
||||
: <a class="el" href="struct_x_dptx___sideband_reply.html#5d91abfc59ffb351b17a00bf160d67ba">XDptx_SidebandReply</a>, <a class="el" href="struct_x_dptx___aux_transaction.html#7da0bfdcb3040c60f229626e088d3628">XDptx_AuxTransaction</a><li>DataPerLane
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#d9cb9ca501e27d8ac67d2cdefddb0869">XDptx_MainStreamAttributes</a><li>DeviceId
|
||||
: <a class="el" href="struct_x_dptx___config.html#e2afeef00c31ea626b874e45fb2d2680">XDptx_Config</a><li>DeviceType
|
||||
: <a class="el" href="struct_x_dptx___topology_node.html#3527cc83675cc55b3ab3feaeeafbca3d">XDptx_TopologyNode</a><li>DownspreadControl
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#f2887aa9ccb9d5b1813f935c544e462c">XDptx_LinkConfig</a><li>DpcdRev
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#ae474930457d5513237b372d35091b03">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#a477c863dbf616294b63b4fc4f61d338">XDptx_TopologyNode</a><li>DpcdRxCapsField
|
||||
: <a class="el" href="struct_x_dptx___sink_config.html#f7b46d2ac8b400d853382160782173bd">XDptx_SinkConfig</a><li>DpDevPlugStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#6925e9c4a34296ea6bbb7f043a187ce2">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>DpProtocol
|
||||
: <a class="el" href="struct_x_dptx___config.html#2043b0951fa248834d4306f20c9dc356">XDptx_Config</a><li>DualPixelEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#1a6f1f6a21a776b98d1f260cbaa036e6">XDptx_Config</a><li>DynamicRange
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#38d56ea36d19b0a19372cd0ab1e46368">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_e">- e -</a></h3><ul>
|
||||
<li>EndOfMsgTransaction
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#3fa0eaf17023613f4a52764655bec992">XDptx_SidebandMsgHeader</a><li>EnhancedFramingMode
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#ff465864665a1355a64b09dd53a59393">XDptx_LinkConfig</a></ul>
|
||||
<h3><a class="anchor" name="index_g">- g -</a></h3><ul>
|
||||
<li>Guid
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#34af1751495e24548fc7b5af4c6255f4">XDptx_SbMsgLinkAddressReplyDeviceInfo</a>, <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#b080e020948e5ebe9180c89b761c34fd">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#31f91fdac9d2223df8dabb36cd3d47dc">XDptx_TopologyNode</a></ul>
|
||||
<h3><a class="anchor" name="index_h">- h -</a></h3><ul>
|
||||
<li>HasRedriverInPath
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#f0c1cc4e8db9d5eea7d122ae97d72898">XDptx_BoardChar</a><li>HClkTotal
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#6dd2f67ac69e011b4aca69e5c8993c96">XDptx_MainStreamAttributes</a><li>Header
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg.html#8b8fb5d20e109c82daf16a8ea2bcb4bd">XDptx_SidebandMsg</a><li>HpdEventCallbackRef
|
||||
: <a class="el" href="struct_x_dptx.html#71e5740080d8cced1992a1ab73ccc0f2">XDptx</a><li>HpdEventHandler
|
||||
: <a class="el" href="struct_x_dptx.html#5db934dcfed963ee3fba51bfe087a1f7">XDptx</a><li>HpdPulseCallbackRef
|
||||
: <a class="el" href="struct_x_dptx.html#c07874d7442b5365af712ba8bd2f62cf">XDptx</a><li>HpdPulseHandler
|
||||
: <a class="el" href="struct_x_dptx.html#45338386a1abde48a38eea87b0aaef7b">XDptx</a><li>HStart
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#8a71abcd837672ebc8786afeec2a85d3">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_i">- i -</a></h3><ul>
|
||||
<li>InitWait
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#e5baab206041cf94ed952f2260b03a79">XDptx_MainStreamAttributes</a><li>InputPort
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#eb197110cc31e2bae441202d6ba96054">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>IsReady
|
||||
: <a class="el" href="struct_x_dptx.html#015d2c021b09d7574d280aa6ce4d9f80">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_l">- l -</a></h3><ul>
|
||||
<li>LaneCount
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#5fd3e8be169ccbc7c35a1d1d5965fb71">XDptx_LinkConfig</a><li>LaneStatusAdjReqs
|
||||
: <a class="el" href="struct_x_dptx___sink_config.html#75bf05accd81b8d83f5a409ee5f8975c">XDptx_SinkConfig</a><li>LegacyDevPlugStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#95a12d0b4384367b4df42383ae6cc12a">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>Length
|
||||
: <a class="el" href="struct_x_dptx___sideband_reply.html#53ccde4b28338d067e1e2731d06a94df">XDptx_SidebandReply</a><li>LinkConfig
|
||||
: <a class="el" href="struct_x_dptx.html#edc0f840ca6831c1a035724ed6cbe9b3">XDptx</a><li>LinkCountRemaining
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#58f94d860d878f7d5cde18d36c802cf9">XDptx_SidebandMsgHeader</a><li>LinkCountTotal
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#c0653445a9e55279aed47a90c3fc17ee">XDptx_SidebandMsgHeader</a>, <a class="el" href="struct_x_dptx___topology_node.html#6d0f7bee5c754021229d2aae559dc87e">XDptx_TopologyNode</a>, <a class="el" href="struct_x_dptx___mst_stream.html#a40175bf863e3635cb571e4dc237094f">XDptx_MstStream</a><li>LinkRate
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#10e477559691bd1c87526131f2470228">XDptx_LinkConfig</a></ul>
|
||||
<h3><a class="anchor" name="index_m">- m -</a></h3><ul>
|
||||
<li>MaxBitsPerColor
|
||||
: <a class="el" href="struct_x_dptx___config.html#144510f23c003b3ee2c4e566a7e5c6b1">XDptx_Config</a><li>MaxLaneCount
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#aa0a00f750ae7a77d726b4e3f4d88179">XDptx_LinkConfig</a>, <a class="el" href="struct_x_dptx___config.html#fe5e452f3a20a37cbc5a38da108e733f">XDptx_Config</a><li>MaxLinkRate
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#25ad708afc7452a98787b8237b364768">XDptx_LinkConfig</a>, <a class="el" href="struct_x_dptx___config.html#5d9e90fba3360ed16662e4fd4f3db21c">XDptx_Config</a><li>Misc0
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#e38c5264a92f1f3da62ee8ab04fdc768">XDptx_MainStreamAttributes</a><li>Misc1
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#b2156fd70d080aff62bc0ce32e0c9228">XDptx_MainStreamAttributes</a><li>MsaConfig
|
||||
: <a class="el" href="struct_x_dptx.html#7b242be9fdb9add31d4c9693365dc768">XDptx</a><li>MsgBodyLength
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#de4041a35b21b47d6290628c19564e80">XDptx_SidebandMsgHeader</a><li>MsgCapStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#1adb3b0ebe9a304558f63dc5a7212967">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#79367001f80ea1724f1cff524f0d8f4c">XDptx_TopologyNode</a><li>MsgData
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_body.html#ea560deb8a9d20e8d55cda0612666a8e">XDptx_SidebandMsgBody</a><li>MsgDataLength
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_body.html#0cfc624b39f0c0327b7b7fe667bd3463">XDptx_SidebandMsgBody</a><li>MsgHeaderLength
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#92e5b63cdfcc2a7a20934a053aa25f93">XDptx_SidebandMsgHeader</a><li>MsgSequenceNum
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#5f8b98bf6ee140c4731d7126446d7651">XDptx_SidebandMsgHeader</a><li>MstEnable
|
||||
: <a class="el" href="struct_x_dptx.html#a4c0fd5e83c23fd09c3c5a75cf76a7a9">XDptx</a><li>MstPbn
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#bdf7ac405c9581934d5c93214ced134c">XDptx_MstStream</a><li>MstStreamConfig
|
||||
: <a class="el" href="struct_x_dptx.html#6261b624a5d125375b764bf885c7f05d">XDptx</a><li>MstStreamEnable
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#cc3b7a3b3de5c3fc6fdfa4e07e8950ec">XDptx_MstStream</a><li>MstSupport
|
||||
: <a class="el" href="struct_x_dptx___config.html#b2f1632d02f494b95062941bcd286d00">XDptx_Config</a></ul>
|
||||
<h3><a class="anchor" name="index_n">- n -</a></h3><ul>
|
||||
<li>NodeTable
|
||||
: <a class="el" href="struct_x_dptx___topology.html#741d70ec6f24bcb7cae5cbe72cf7db21">XDptx_Topology</a><li>NodeTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#f1ed741fb1e449500103ce6bb5f079e5">XDptx_Topology</a><li>NumAudioChs
|
||||
: <a class="el" href="struct_x_dptx___config.html#7713a1d6ad88e93ad7a41036f7e41052">XDptx_Config</a><li>NumBytes
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#07719007eb2231016d5dfb1bffd1f35f">XDptx_AuxTransaction</a><li>NumMstStreams
|
||||
: <a class="el" href="struct_x_dptx___config.html#12d443c35685ba9d24dd788a51dfffc8">XDptx_Config</a><li>NumPorts
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#fd111357e61fc8315c01c796b2911b3b">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>NumSdpStreams
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#fd93f2c7da62c15190efbc139ac5ae23">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NumSdpStreamSinks
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#18c49014ab2a87dcaa83e5e2c9379046">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NVid
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#90edcc6fa8254a65a8e0c6fdd2cae1a1">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_o">- o -</a></h3><ul>
|
||||
<li>OverrideUserPixelWidth
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#577be212fb5a000069331993bd6b90b9">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_p">- p -</a></h3><ul>
|
||||
<li>PathMsg
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#04cf484cdd01dc208ccdb289520dcb6c">XDptx_SidebandMsgHeader</a><li>Pattern
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#234eff85460c7b422e117549f9121da7">XDptx_LinkConfig</a><li>PayloadDataWidth
|
||||
: <a class="el" href="struct_x_dptx___config.html#929b4359944d85d520b4c14634ae392a">XDptx_Config</a><li>PeerDeviceType
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#7246cd0cdf0c7c33cf1904aebb6da8dc">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>PeLevel
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#b7eb55816a62936fdbe42a8ea8a0ae79">XDptx_LinkConfig</a><li>PortDetails
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#2fc2252e0e60c4635f548b986759429a">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>PortNum
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#be3cce0570a9d5f0424196c2233c136d">XDptx_SbMsgLinkAddressReplyPortDetail</a></ul>
|
||||
<h3><a class="anchor" name="index_q">- q -</a></h3><ul>
|
||||
<li>QuadPixelEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#61967a7b8aa8a673c6f1cf4785d50b30">XDptx_Config</a></ul>
|
||||
<h3><a class="anchor" name="index_r">- r -</a></h3><ul>
|
||||
<li>RelativeAddress
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#2edf685cb155f78eaed2e510f6c0e3dd">XDptx_SidebandMsgHeader</a>, <a class="el" href="struct_x_dptx___topology_node.html#0627b064137f9cbd0398e6f05aab53d3">XDptx_TopologyNode</a>, <a class="el" href="struct_x_dptx___mst_stream.html#7b22f20753c9f4094538489822b5f609">XDptx_MstStream</a><li>ReplyType
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#07cdd19e809c39a2ab778d806ac2caf5">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>RequestId
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#ccebabbc6590e534019113d8f5d87198">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>RxConfig
|
||||
: <a class="el" href="struct_x_dptx.html#480b18d97985dd93a873f14bf27a8ea1">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_s">- s -</a></h3><ul>
|
||||
<li>SAxiClkHz
|
||||
: <a class="el" href="struct_x_dptx___config.html#fc601e4130de1b72955b9443ea3c3442">XDptx_Config</a><li>SbMsgDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#02d8905bbfcbc162babc2de8b5191d5d">XDptx</a><li>ScramblerEn
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#f61e06566b46f064cff02c3a5b391d84">XDptx_LinkConfig</a><li>SecondaryChEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#efdd88941a72cdf752e1d6bed8e8a753">XDptx_Config</a><li>SinkList
|
||||
: <a class="el" href="struct_x_dptx___topology.html#b6c0116c9897379543dd213162cadc7d">XDptx_Topology</a><li>SinkTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#b7fe845c1a540d412756100ad1ab77d4">XDptx_Topology</a><li>StartOfMsgTransaction
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#d7767d83c449e53007dd245bb61dd847">XDptx_SidebandMsgHeader</a><li>SupportDownspreadControl
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#d61b965f2a46bda06461febe6eeabc08">XDptx_LinkConfig</a><li>SupportEnhancedFramingMode
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#911713583f48685e17fedaeadd791fcf">XDptx_LinkConfig</a><li>SynchronousClockMode
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#fcdf2d723786ffe2c7153a61fdea2966">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_t">- t -</a></h3><ul>
|
||||
<li>Topology
|
||||
: <a class="el" href="struct_x_dptx.html#6af805e431d276c4a649c9fdc94ea2e7">XDptx</a><li>TrainAdaptive
|
||||
: <a class="el" href="struct_x_dptx.html#ea0d9e963446066ccce156f4ca642408">XDptx</a><li>TransferUnitSize
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#ffba3d4fddc885d2db008c9e0643df28">XDptx_MainStreamAttributes</a><li>TxPeLevels
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#64d00c6039ca8bee1786aa5400d801c0">XDptx_BoardChar</a><li>TxVsLevels
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#20b791eed1817bed0e9b1903843971c4">XDptx_BoardChar</a><li>TxVsOffset
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#98dcfd0a58c03facb5e27533fb093673">XDptx_BoardChar</a></ul>
|
||||
<h3><a class="anchor" name="index_u">- u -</a></h3><ul>
|
||||
<li>UserPixelWidth
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#9c1460f55c4a8cad813aa8942aa48027">XDptx_MainStreamAttributes</a><li>UserTimerPtr
|
||||
: <a class="el" href="struct_x_dptx.html#fd631f0f90f6cdbbba8848ca5a216ba8">XDptx</a><li>UserTimerWaitUs
|
||||
: <a class="el" href="struct_x_dptx.html#fd2cbc84e307d853f48f19d9d8aedc06">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_v">- v -</a></h3><ul>
|
||||
<li>VClkTotal
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#862e898079c25c530cc796330de0ba1a">XDptx_MainStreamAttributes</a><li>VsLevel
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#bb910ca8ad553f5c6d80071265fb3584">XDptx_LinkConfig</a><li>VStart
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#b37f3817a1bda33892d2dd8a2a6bcc23">XDptx_MainStreamAttributes</a><li>Vtm
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#2e5f919bab78b5937a78d9855b545a24">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_y">- y -</a></h3><ul>
|
||||
<li>YCbCrColorimetry
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#3ec3d85682eb90198377b0fbd92d4df2">XDptx_MainStreamAttributes</a><li>YCrCbEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#c8a1e41054c82ae7665abbc840a46a23">XDptx_Config</a><li>YOnlyEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#614ad0c0300186a61fddacb0422bc3cf">XDptx_Config</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
208
XilinxProcessorIPLib/drivers/dp/doc/html/api/functions_vars.html
Executable file
208
XilinxProcessorIPLib/drivers/dp/doc/html/api/functions_vars.html
Executable file
|
|
@ -0,0 +1,208 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members - Variables
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li id="current"><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="functions.html"><span>All</span></a></li>
|
||||
<li id="current"><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="#index_a"><span>a</span></a></li>
|
||||
<li><a href="#index_b"><span>b</span></a></li>
|
||||
<li><a href="#index_c"><span>c</span></a></li>
|
||||
<li><a href="#index_d"><span>d</span></a></li>
|
||||
<li><a href="#index_e"><span>e</span></a></li>
|
||||
<li><a href="#index_g"><span>g</span></a></li>
|
||||
<li><a href="#index_h"><span>h</span></a></li>
|
||||
<li><a href="#index_i"><span>i</span></a></li>
|
||||
<li><a href="#index_l"><span>l</span></a></li>
|
||||
<li><a href="#index_m"><span>m</span></a></li>
|
||||
<li><a href="#index_n"><span>n</span></a></li>
|
||||
<li><a href="#index_o"><span>o</span></a></li>
|
||||
<li><a href="#index_p"><span>p</span></a></li>
|
||||
<li><a href="#index_q"><span>q</span></a></li>
|
||||
<li><a href="#index_r"><span>r</span></a></li>
|
||||
<li><a href="#index_s"><span>s</span></a></li>
|
||||
<li><a href="#index_t"><span>t</span></a></li>
|
||||
<li><a href="#index_u"><span>u</span></a></li>
|
||||
<li><a href="#index_v"><span>v</span></a></li>
|
||||
<li><a href="#index_y"><span>y</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_a">- a -</a></h3><ul>
|
||||
<li>Address
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#070f26779477d477d9f2cc4429b483e8">XDptx_AuxTransaction</a><li>AuxDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#2fdb769ccb56ed1c526f6997e97018d4">XDptx</a><li>AvgBytesPerTU
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#4ada79460ac8ec93764b7cf6ef6a03e0">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_b">- b -</a></h3><ul>
|
||||
<li>BaseAddr
|
||||
: <a class="el" href="struct_x_dptx___config.html#46946d5bdc36055fa2459fd4d8e1c11d">XDptx_Config</a><li>BitsPerColor
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#b2771987aba38d35ecb12fe068522779">XDptx_MainStreamAttributes</a><li>BoardChar
|
||||
: <a class="el" href="struct_x_dptx.html#2e3feb5199d0d6af0831d8ecf48cff0d">XDptx</a><li>Body
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg.html#9a14fd013ddc3647fb2bcc78b8dc94e4">XDptx_SidebandMsg</a><li>BroadcastMsg
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#81ce1b3145e6af1535a9b36f472d2abc">XDptx_SidebandMsgHeader</a></ul>
|
||||
<h3><a class="anchor" name="index_c">- c -</a></h3><ul>
|
||||
<li>CmdCode
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#d2a8df61186824f7dd4c5beabf80506d">XDptx_AuxTransaction</a><li>ComponentFormat
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#5aae7d62087f1d2d732e026fc4a27405">XDptx_MainStreamAttributes</a><li>Config
|
||||
: <a class="el" href="struct_x_dptx.html#e3324edbc15a89340bdee2bbf56244df">XDptx</a><li>Crc
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_body.html#181f9d362b18752ad169ef782b192e32">XDptx_SidebandMsgBody</a>, <a class="el" href="struct_x_dptx___sideband_msg_header.html#c071b683dae18c20e3bc98a9aaac828f">XDptx_SidebandMsgHeader</a></ul>
|
||||
<h3><a class="anchor" name="index_d">- d -</a></h3><ul>
|
||||
<li>Data
|
||||
: <a class="el" href="struct_x_dptx___sideband_reply.html#5d91abfc59ffb351b17a00bf160d67ba">XDptx_SidebandReply</a>, <a class="el" href="struct_x_dptx___aux_transaction.html#7da0bfdcb3040c60f229626e088d3628">XDptx_AuxTransaction</a><li>DataPerLane
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#d9cb9ca501e27d8ac67d2cdefddb0869">XDptx_MainStreamAttributes</a><li>DeviceId
|
||||
: <a class="el" href="struct_x_dptx___config.html#e2afeef00c31ea626b874e45fb2d2680">XDptx_Config</a><li>DeviceType
|
||||
: <a class="el" href="struct_x_dptx___topology_node.html#3527cc83675cc55b3ab3feaeeafbca3d">XDptx_TopologyNode</a><li>DownspreadControl
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#f2887aa9ccb9d5b1813f935c544e462c">XDptx_LinkConfig</a><li>DpcdRev
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#ae474930457d5513237b372d35091b03">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#a477c863dbf616294b63b4fc4f61d338">XDptx_TopologyNode</a><li>DpcdRxCapsField
|
||||
: <a class="el" href="struct_x_dptx___sink_config.html#f7b46d2ac8b400d853382160782173bd">XDptx_SinkConfig</a><li>DpDevPlugStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#6925e9c4a34296ea6bbb7f043a187ce2">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>DpProtocol
|
||||
: <a class="el" href="struct_x_dptx___config.html#2043b0951fa248834d4306f20c9dc356">XDptx_Config</a><li>DualPixelEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#1a6f1f6a21a776b98d1f260cbaa036e6">XDptx_Config</a><li>DynamicRange
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#38d56ea36d19b0a19372cd0ab1e46368">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_e">- e -</a></h3><ul>
|
||||
<li>EndOfMsgTransaction
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#3fa0eaf17023613f4a52764655bec992">XDptx_SidebandMsgHeader</a><li>EnhancedFramingMode
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#ff465864665a1355a64b09dd53a59393">XDptx_LinkConfig</a></ul>
|
||||
<h3><a class="anchor" name="index_g">- g -</a></h3><ul>
|
||||
<li>Guid
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#34af1751495e24548fc7b5af4c6255f4">XDptx_SbMsgLinkAddressReplyDeviceInfo</a>, <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#b080e020948e5ebe9180c89b761c34fd">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#31f91fdac9d2223df8dabb36cd3d47dc">XDptx_TopologyNode</a></ul>
|
||||
<h3><a class="anchor" name="index_h">- h -</a></h3><ul>
|
||||
<li>HasRedriverInPath
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#f0c1cc4e8db9d5eea7d122ae97d72898">XDptx_BoardChar</a><li>HClkTotal
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#6dd2f67ac69e011b4aca69e5c8993c96">XDptx_MainStreamAttributes</a><li>Header
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg.html#8b8fb5d20e109c82daf16a8ea2bcb4bd">XDptx_SidebandMsg</a><li>HpdEventCallbackRef
|
||||
: <a class="el" href="struct_x_dptx.html#71e5740080d8cced1992a1ab73ccc0f2">XDptx</a><li>HpdEventHandler
|
||||
: <a class="el" href="struct_x_dptx.html#5db934dcfed963ee3fba51bfe087a1f7">XDptx</a><li>HpdPulseCallbackRef
|
||||
: <a class="el" href="struct_x_dptx.html#c07874d7442b5365af712ba8bd2f62cf">XDptx</a><li>HpdPulseHandler
|
||||
: <a class="el" href="struct_x_dptx.html#45338386a1abde48a38eea87b0aaef7b">XDptx</a><li>HStart
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#8a71abcd837672ebc8786afeec2a85d3">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_i">- i -</a></h3><ul>
|
||||
<li>InitWait
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#e5baab206041cf94ed952f2260b03a79">XDptx_MainStreamAttributes</a><li>InputPort
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#eb197110cc31e2bae441202d6ba96054">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>IsReady
|
||||
: <a class="el" href="struct_x_dptx.html#015d2c021b09d7574d280aa6ce4d9f80">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_l">- l -</a></h3><ul>
|
||||
<li>LaneCount
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#5fd3e8be169ccbc7c35a1d1d5965fb71">XDptx_LinkConfig</a><li>LaneStatusAdjReqs
|
||||
: <a class="el" href="struct_x_dptx___sink_config.html#75bf05accd81b8d83f5a409ee5f8975c">XDptx_SinkConfig</a><li>LegacyDevPlugStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#95a12d0b4384367b4df42383ae6cc12a">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>Length
|
||||
: <a class="el" href="struct_x_dptx___sideband_reply.html#53ccde4b28338d067e1e2731d06a94df">XDptx_SidebandReply</a><li>LinkConfig
|
||||
: <a class="el" href="struct_x_dptx.html#edc0f840ca6831c1a035724ed6cbe9b3">XDptx</a><li>LinkCountRemaining
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#58f94d860d878f7d5cde18d36c802cf9">XDptx_SidebandMsgHeader</a><li>LinkCountTotal
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#c0653445a9e55279aed47a90c3fc17ee">XDptx_SidebandMsgHeader</a>, <a class="el" href="struct_x_dptx___topology_node.html#6d0f7bee5c754021229d2aae559dc87e">XDptx_TopologyNode</a>, <a class="el" href="struct_x_dptx___mst_stream.html#a40175bf863e3635cb571e4dc237094f">XDptx_MstStream</a><li>LinkRate
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#10e477559691bd1c87526131f2470228">XDptx_LinkConfig</a></ul>
|
||||
<h3><a class="anchor" name="index_m">- m -</a></h3><ul>
|
||||
<li>MaxBitsPerColor
|
||||
: <a class="el" href="struct_x_dptx___config.html#144510f23c003b3ee2c4e566a7e5c6b1">XDptx_Config</a><li>MaxLaneCount
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#aa0a00f750ae7a77d726b4e3f4d88179">XDptx_LinkConfig</a>, <a class="el" href="struct_x_dptx___config.html#fe5e452f3a20a37cbc5a38da108e733f">XDptx_Config</a><li>MaxLinkRate
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#25ad708afc7452a98787b8237b364768">XDptx_LinkConfig</a>, <a class="el" href="struct_x_dptx___config.html#5d9e90fba3360ed16662e4fd4f3db21c">XDptx_Config</a><li>Misc0
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#e38c5264a92f1f3da62ee8ab04fdc768">XDptx_MainStreamAttributes</a><li>Misc1
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#b2156fd70d080aff62bc0ce32e0c9228">XDptx_MainStreamAttributes</a><li>MsaConfig
|
||||
: <a class="el" href="struct_x_dptx.html#7b242be9fdb9add31d4c9693365dc768">XDptx</a><li>MsgBodyLength
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#de4041a35b21b47d6290628c19564e80">XDptx_SidebandMsgHeader</a><li>MsgCapStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#1adb3b0ebe9a304558f63dc5a7212967">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#79367001f80ea1724f1cff524f0d8f4c">XDptx_TopologyNode</a><li>MsgData
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_body.html#ea560deb8a9d20e8d55cda0612666a8e">XDptx_SidebandMsgBody</a><li>MsgDataLength
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_body.html#0cfc624b39f0c0327b7b7fe667bd3463">XDptx_SidebandMsgBody</a><li>MsgHeaderLength
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#92e5b63cdfcc2a7a20934a053aa25f93">XDptx_SidebandMsgHeader</a><li>MsgSequenceNum
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#5f8b98bf6ee140c4731d7126446d7651">XDptx_SidebandMsgHeader</a><li>MstEnable
|
||||
: <a class="el" href="struct_x_dptx.html#a4c0fd5e83c23fd09c3c5a75cf76a7a9">XDptx</a><li>MstPbn
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#bdf7ac405c9581934d5c93214ced134c">XDptx_MstStream</a><li>MstStreamConfig
|
||||
: <a class="el" href="struct_x_dptx.html#6261b624a5d125375b764bf885c7f05d">XDptx</a><li>MstStreamEnable
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#cc3b7a3b3de5c3fc6fdfa4e07e8950ec">XDptx_MstStream</a><li>MstSupport
|
||||
: <a class="el" href="struct_x_dptx___config.html#b2f1632d02f494b95062941bcd286d00">XDptx_Config</a></ul>
|
||||
<h3><a class="anchor" name="index_n">- n -</a></h3><ul>
|
||||
<li>NodeTable
|
||||
: <a class="el" href="struct_x_dptx___topology.html#741d70ec6f24bcb7cae5cbe72cf7db21">XDptx_Topology</a><li>NodeTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#f1ed741fb1e449500103ce6bb5f079e5">XDptx_Topology</a><li>NumAudioChs
|
||||
: <a class="el" href="struct_x_dptx___config.html#7713a1d6ad88e93ad7a41036f7e41052">XDptx_Config</a><li>NumBytes
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#07719007eb2231016d5dfb1bffd1f35f">XDptx_AuxTransaction</a><li>NumMstStreams
|
||||
: <a class="el" href="struct_x_dptx___config.html#12d443c35685ba9d24dd788a51dfffc8">XDptx_Config</a><li>NumPorts
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#fd111357e61fc8315c01c796b2911b3b">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>NumSdpStreams
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#fd93f2c7da62c15190efbc139ac5ae23">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NumSdpStreamSinks
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#18c49014ab2a87dcaa83e5e2c9379046">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NVid
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#90edcc6fa8254a65a8e0c6fdd2cae1a1">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_o">- o -</a></h3><ul>
|
||||
<li>OverrideUserPixelWidth
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#577be212fb5a000069331993bd6b90b9">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_p">- p -</a></h3><ul>
|
||||
<li>PathMsg
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#04cf484cdd01dc208ccdb289520dcb6c">XDptx_SidebandMsgHeader</a><li>Pattern
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#234eff85460c7b422e117549f9121da7">XDptx_LinkConfig</a><li>PayloadDataWidth
|
||||
: <a class="el" href="struct_x_dptx___config.html#929b4359944d85d520b4c14634ae392a">XDptx_Config</a><li>PeerDeviceType
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#7246cd0cdf0c7c33cf1904aebb6da8dc">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>PeLevel
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#b7eb55816a62936fdbe42a8ea8a0ae79">XDptx_LinkConfig</a><li>PortDetails
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#2fc2252e0e60c4635f548b986759429a">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>PortNum
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#be3cce0570a9d5f0424196c2233c136d">XDptx_SbMsgLinkAddressReplyPortDetail</a></ul>
|
||||
<h3><a class="anchor" name="index_q">- q -</a></h3><ul>
|
||||
<li>QuadPixelEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#61967a7b8aa8a673c6f1cf4785d50b30">XDptx_Config</a></ul>
|
||||
<h3><a class="anchor" name="index_r">- r -</a></h3><ul>
|
||||
<li>RelativeAddress
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#2edf685cb155f78eaed2e510f6c0e3dd">XDptx_SidebandMsgHeader</a>, <a class="el" href="struct_x_dptx___topology_node.html#0627b064137f9cbd0398e6f05aab53d3">XDptx_TopologyNode</a>, <a class="el" href="struct_x_dptx___mst_stream.html#7b22f20753c9f4094538489822b5f609">XDptx_MstStream</a><li>ReplyType
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#07cdd19e809c39a2ab778d806ac2caf5">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>RequestId
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#ccebabbc6590e534019113d8f5d87198">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>RxConfig
|
||||
: <a class="el" href="struct_x_dptx.html#480b18d97985dd93a873f14bf27a8ea1">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_s">- s -</a></h3><ul>
|
||||
<li>SAxiClkHz
|
||||
: <a class="el" href="struct_x_dptx___config.html#fc601e4130de1b72955b9443ea3c3442">XDptx_Config</a><li>SbMsgDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#02d8905bbfcbc162babc2de8b5191d5d">XDptx</a><li>ScramblerEn
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#f61e06566b46f064cff02c3a5b391d84">XDptx_LinkConfig</a><li>SecondaryChEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#efdd88941a72cdf752e1d6bed8e8a753">XDptx_Config</a><li>SinkList
|
||||
: <a class="el" href="struct_x_dptx___topology.html#b6c0116c9897379543dd213162cadc7d">XDptx_Topology</a><li>SinkTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#b7fe845c1a540d412756100ad1ab77d4">XDptx_Topology</a><li>StartOfMsgTransaction
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#d7767d83c449e53007dd245bb61dd847">XDptx_SidebandMsgHeader</a><li>SupportDownspreadControl
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#d61b965f2a46bda06461febe6eeabc08">XDptx_LinkConfig</a><li>SupportEnhancedFramingMode
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#911713583f48685e17fedaeadd791fcf">XDptx_LinkConfig</a><li>SynchronousClockMode
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#fcdf2d723786ffe2c7153a61fdea2966">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_t">- t -</a></h3><ul>
|
||||
<li>Topology
|
||||
: <a class="el" href="struct_x_dptx.html#6af805e431d276c4a649c9fdc94ea2e7">XDptx</a><li>TrainAdaptive
|
||||
: <a class="el" href="struct_x_dptx.html#ea0d9e963446066ccce156f4ca642408">XDptx</a><li>TransferUnitSize
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#ffba3d4fddc885d2db008c9e0643df28">XDptx_MainStreamAttributes</a><li>TxPeLevels
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#64d00c6039ca8bee1786aa5400d801c0">XDptx_BoardChar</a><li>TxVsLevels
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#20b791eed1817bed0e9b1903843971c4">XDptx_BoardChar</a><li>TxVsOffset
|
||||
: <a class="el" href="struct_x_dptx___board_char.html#98dcfd0a58c03facb5e27533fb093673">XDptx_BoardChar</a></ul>
|
||||
<h3><a class="anchor" name="index_u">- u -</a></h3><ul>
|
||||
<li>UserPixelWidth
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#9c1460f55c4a8cad813aa8942aa48027">XDptx_MainStreamAttributes</a><li>UserTimerPtr
|
||||
: <a class="el" href="struct_x_dptx.html#fd631f0f90f6cdbbba8848ca5a216ba8">XDptx</a><li>UserTimerWaitUs
|
||||
: <a class="el" href="struct_x_dptx.html#fd2cbc84e307d853f48f19d9d8aedc06">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_v">- v -</a></h3><ul>
|
||||
<li>VClkTotal
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#862e898079c25c530cc796330de0ba1a">XDptx_MainStreamAttributes</a><li>VsLevel
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#bb910ca8ad553f5c6d80071265fb3584">XDptx_LinkConfig</a><li>VStart
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#b37f3817a1bda33892d2dd8a2a6bcc23">XDptx_MainStreamAttributes</a><li>Vtm
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#2e5f919bab78b5937a78d9855b545a24">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_y">- y -</a></h3><ul>
|
||||
<li>YCbCrColorimetry
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#3ec3d85682eb90198377b0fbd92d4df2">XDptx_MainStreamAttributes</a><li>YCrCbEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#c8a1e41054c82ae7665abbc840a46a23">XDptx_Config</a><li>YOnlyEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#614ad0c0300186a61fddacb0422bc3cf">XDptx_Config</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
49
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals.html
Executable file
49
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals.html
Executable file
|
|
@ -0,0 +1,49 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals.html#index_g"><span>g</span></a></li>
|
||||
<li><a href="globals_0x72.html#index_r"><span>r</span></a></li>
|
||||
<li><a href="globals_0x78.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
Here is a list of all file members with links to the files they belong to:
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_g">- g -</a></h3><ul>
|
||||
<li>GuidTable
|
||||
: <a class="el" href="xdptx__mst_8c.html#ebcfa89429e19f3b373bf81dd3f18740">xdptx_mst.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
50
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_0x72.html
Executable file
50
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_0x72.html
Executable file
|
|
@ -0,0 +1,50 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html#index_g"><span>g</span></a></li>
|
||||
<li id="current"><a href="globals_0x72.html#index_r"><span>r</span></a></li>
|
||||
<li><a href="globals_0x78.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
Here is a list of all file members with links to the files they belong to:
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_r">- r -</a></h3><ul>
|
||||
<li>ResetValues
|
||||
: <a class="el" href="xdptx__selftest_8c.html#65af729ef8da95153475f2224b4329c2">xdptx_selftest.c</a><li>ResetValuesMsa
|
||||
: <a class="el" href="xdptx__selftest_8c.html#7a190e8d88f6885fdd71e6bbda945c72">xdptx_selftest.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
756
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_0x78.html
Executable file
756
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_0x78.html
Executable file
|
|
@ -0,0 +1,756 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html#index_g"><span>g</span></a></li>
|
||||
<li><a href="globals_0x72.html#index_r"><span>r</span></a></li>
|
||||
<li id="current"><a href="globals_0x78.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
Here is a list of all file members with links to the files they belong to:
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_x">- x -</a></h3><ul>
|
||||
<li>XDptx_AllocatePayloadStreams()
|
||||
: <a class="el" href="xdptx__mst_8c.html#cd8369516355503303d1b82f3ffae846">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#cd8369516355503303d1b82f3ffae846">xdptx.h</a><li>XDptx_AllocatePayloadVcIdTable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#af814b5ceb3b267656ef120b55569d80">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#af814b5ceb3b267656ef120b55569d80">xdptx.h</a><li>XDPTX_AUX_ADDRESS
|
||||
: <a class="el" href="xdptx__hw_8h.html#ef28ace5390d018381c44b4c93c1cf6e">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER
|
||||
: <a class="el" href="xdptx__hw_8h.html#b085b0eb13592c155bfe3e6932a15cce">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER_AUX_SIG_WIDTH_FILT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#256c4dc0f04dc61a37e4513576d3b15d">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER_AUX_SIG_WIDTH_FILT_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1bdc93d900d56dc734a9952abd04d357">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER_VAL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4fe1ec40f3824ebed89671597f4c7a47">xdptx_hw.h</a><li>XDPTX_AUX_CMD
|
||||
: <a class="el" href="xdptx__hw_8h.html#3766f2f4d3e535097e76149d85cf0832">xdptx_hw.h</a><li>XDPTX_AUX_CMD_ADDR_ONLY_TRANSFER_EN
|
||||
: <a class="el" href="xdptx__hw_8h.html#f26422aba2aac6856f7505a8aea074a1">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#387d09b2135001a8780ca728f4ee4473">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_READ_MOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#b7d527a8d91542840a22551a35db1f0d">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#1ad73ffce6b0af3206db7d9257809905">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE_MOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#809f0e7e6abdb3c442652e48466765ff">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#b41d3af8ac6b8aa6d8a94b13d1f79163">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE_STATUS_MOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d0de53f660dbc3ce8fec8a8275bf71d8">xdptx_hw.h</a><li>XDPTX_AUX_CMD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#584cbb2f66de91dbcef0682cb848a8e7">xdptx_hw.h</a><li>XDPTX_AUX_CMD_NBYTES_TRANSFER_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e4c8f97e06dbf0700302776c094fb4b8">xdptx_hw.h</a><li>XDPTX_AUX_CMD_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#376f09e8e7461b8c2406ad7672517172">xdptx_hw.h</a><li>XDPTX_AUX_CMD_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#6b0faa3339996257e0e4c5547518267c">xdptx_hw.h</a><li>XDPTX_AUX_CMD_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#1a3e99fddab799fad355458b30c1ef33">xdptx_hw.h</a><li>XDPTX_AUX_MAX_DEFER_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#24424437a73cf172a7fb44ccfc5c5721">xdptx.c</a><li>XDPTX_AUX_MAX_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#eec1e2b97ff0cb2443757ddd87a60f5a">xdptx.c</a><li>XDPTX_AUX_REPLY_CODE
|
||||
: <a class="el" href="xdptx__hw_8h.html#dc0adab369e4b87b0bc46604a95e2f11">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_ACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#99177d5882b7fee7dd5bc97e03cb05a0">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_DEFER
|
||||
: <a class="el" href="xdptx__hw_8h.html#82da5326526cce4ed1999976a1c6ac19">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_I2C_ACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#04f2853300ee8c6898db53949257b101">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_I2C_DEFER
|
||||
: <a class="el" href="xdptx__hw_8h.html#88a375159cb8586a610a794199137729">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_I2C_NACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f567cac6032afeaec8c117b13be34821">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_NACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a1b2839bc0fd02fcd4b97d9d349b2992">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#56285438f78c5c47f1cf91a5fec40f72">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#a163b6c030b44373d60840a406d6fe6e">xdptx_hw.h</a><li>XDPTX_AUX_WRITE_FIFO
|
||||
: <a class="el" href="xdptx__hw_8h.html#5d0c38ef868bab03b795aceadd7830b6">xdptx_hw.h</a><li>XDptx_AuxRead()
|
||||
: <a class="el" href="xdptx_8h.html#b25ef45e949568bf5ae5623fb3303a31">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b25ef45e949568bf5ae5623fb3303a31">xdptx.c</a><li>XDptx_AuxWrite()
|
||||
: <a class="el" href="xdptx_8h.html#d24537a5bd001781f3ec2157e80438bd">xdptx.h</a>, <a class="el" href="xdptx_8c.html#d24537a5bd001781f3ec2157e80438bd">xdptx.c</a><li>XDptx_CfgInitialize()
|
||||
: <a class="el" href="xdptx_8h.html#9128bf8d6da59ba2b255197db5e621b6">xdptx.h</a>, <a class="el" href="xdptx_8c.html#9128bf8d6da59ba2b255197db5e621b6">xdptx.c</a><li>XDptx_CfgMainLinkMax()
|
||||
: <a class="el" href="xdptx_8h.html#7ef44713234442c3a6cf13e2fce70a4b">xdptx.h</a>, <a class="el" href="xdptx_8c.html#7ef44713234442c3a6cf13e2fce70a4b">xdptx.c</a><li>XDptx_CfgMsaEnSynchClkMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#9192eda72dd8e74339cca7de45383110">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#9192eda72dd8e74339cca7de45383110">xdptx.h</a><li>XDptx_CfgMsaRecalculate()
|
||||
: <a class="el" href="xdptx__spm_8c.html#99d8902337e7bb3f7c607568501e16a1">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#99d8902337e7bb3f7c607568501e16a1">xdptx.h</a><li>XDptx_CfgMsaSetBpc()
|
||||
: <a class="el" href="xdptx__spm_8c.html#5dba8599ab68d0766e120119a6c6b83a">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#5dba8599ab68d0766e120119a6c6b83a">xdptx.h</a><li>XDptx_CfgMsaUseCustom()
|
||||
: <a class="el" href="xdptx__spm_8c.html#b04d6d38ab65f7d6d5b4734eedf9b020">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#b04d6d38ab65f7d6d5b4734eedf9b020">xdptx.h</a><li>XDptx_CfgMsaUseEdidPreferredTiming()
|
||||
: <a class="el" href="xdptx__spm_8c.html#b4778897734128bf467047a90066c922">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#b4778897734128bf467047a90066c922">xdptx.h</a><li>XDptx_CfgMsaUseStandardVideoMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#8f5a8d3f316f519145ecd9a94bf27ce8">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#8f5a8d3f316f519145ecd9a94bf27ce8">xdptx.h</a><li>XDptx_CfgTxPeLevel()
|
||||
: <a class="el" href="xdptx_8h.html#eda4459fe23e2926575401293fa9ee75">xdptx.h</a>, <a class="el" href="xdptx_8c.html#eda4459fe23e2926575401293fa9ee75">xdptx.c</a><li>XDptx_CfgTxVsLevel()
|
||||
: <a class="el" href="xdptx_8h.html#1c2e557e06c47e2f6d3b6f072a462d03">xdptx.h</a>, <a class="el" href="xdptx_8c.html#1c2e557e06c47e2f6d3b6f072a462d03">xdptx.c</a><li>XDptx_CfgTxVsOffset()
|
||||
: <a class="el" href="xdptx_8h.html#74b044b7d09f44e887d9a5c61b6dfcdb">xdptx.h</a>, <a class="el" href="xdptx_8c.html#74b044b7d09f44e887d9a5c61b6dfcdb">xdptx.c</a><li>XDptx_CheckLinkStatus()
|
||||
: <a class="el" href="xdptx_8h.html#3cedae7883dc5cab5f15f8110805f2c6">xdptx.h</a>, <a class="el" href="xdptx_8c.html#3cedae7883dc5cab5f15f8110805f2c6">xdptx.c</a><li>XDptx_ClearMsaValues()
|
||||
: <a class="el" href="xdptx__spm_8c.html#b2120a4c08427e4e102efdfd17d65fac">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#b2120a4c08427e4e102efdfd17d65fac">xdptx.h</a><li>XDptx_ClearPayloadVcIdTable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#a023515f0fbe9fbfa26fb72ed5219579">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#a023515f0fbe9fbfa26fb72ed5219579">xdptx.h</a><li>XDptx_ConfigTable
|
||||
: <a class="el" href="xdptx__sinit_8c.html#277a1798d54193f6873982d7ca66ed39">xdptx_sinit.c</a><li>XDPTX_CORE_ID
|
||||
: <a class="el" href="xdptx__hw_8h.html#ee7163543e09d183451dad6da0e18829">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MJR_VER_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d488a646ac9f8879590723a51ef1a566">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MJR_VER_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#c7dd35de3ed114cdbcf2811509821008">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MNR_VER_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#467db5e22f86036031ed516afb0f7157">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MNR_VER_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#331aed29139430b5e3b5ff189c8d1378">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_REV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e140ce3c9f5e0ac26306483a7ce2bcd">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_REV_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d23d382537c5945936a0c1864738c05f">xdptx_hw.h</a><li>XDPTX_CORE_ID_TYPE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3bce075884b67bd03350a4def35e4df9">xdptx_hw.h</a><li>XDPTX_CORE_ID_TYPE_RX
|
||||
: <a class="el" href="xdptx__hw_8h.html#c8ecc5b34e6c74640c776f9507da8451">xdptx_hw.h</a><li>XDPTX_CORE_ID_TYPE_TX
|
||||
: <a class="el" href="xdptx__hw_8h.html#285d8cb635a1701e6dd4d631a20d538a">xdptx_hw.h</a><li>XDptx_DisableMainLink()
|
||||
: <a class="el" href="xdptx_8h.html#c440c032b45acf3ae5be9eba37c9203e">xdptx.h</a>, <a class="el" href="xdptx_8c.html#c440c032b45acf3ae5be9eba37c9203e">xdptx.c</a><li>XDptx_DiscoverTopology()
|
||||
: <a class="el" href="xdptx__mst_8c.html#cb0e6bda66711f10a0ce352cbd61b0ab">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#cb0e6bda66711f10a0ce352cbd61b0ab">xdptx.h</a><li>XDPTX_DISPID_DB_SEC_REV
|
||||
: <a class="el" href="xdptx__hw_8h.html#6ca7ac1ba3917bb4cb4d77b2ae87ca98">xdptx_hw.h</a><li>XDPTX_DISPID_DB_SEC_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#8f68f52ce68c5aed08f1d7009c98dbc7">xdptx_hw.h</a><li>XDPTX_DISPID_DB_SEC_TAG
|
||||
: <a class="el" href="xdptx__hw_8h.html#912b6764be5ed4f08e71b971e8b9b3d3">xdptx_hw.h</a><li>XDPTX_DISPID_EXT_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#fff7bcc8d397f10cecb9a90340dd88ac">xdptx_hw.h</a><li>XDPTX_DISPID_PAYLOAD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#562b191e60bb4ff9d00fbc62da2527fc">xdptx_hw.h</a><li>XDPTX_DISPID_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#c95ee28631f340244b8f481268b94b15">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_HSIZE0
|
||||
: <a class="el" href="xdptx__hw_8h.html#b6522fb1c3b93be90b0a17e33bc2d41f">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_HSIZE1
|
||||
: <a class="el" href="xdptx__hw_8h.html#1f24166a37a0a80ccddac64f3d6dd26b">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_PCODE0
|
||||
: <a class="el" href="xdptx__hw_8h.html#6764fbf867217645acdfd61175f1eda5">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_PCODE1
|
||||
: <a class="el" href="xdptx__hw_8h.html#da44cbb9fde6d28c62b944cfe2cd9c6b">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN0
|
||||
: <a class="el" href="xdptx__hw_8h.html#3c66618902528afacf30386916d2b26a">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN1
|
||||
: <a class="el" href="xdptx__hw_8h.html#c6b7b43b55460580b0f4b12fb67c2805">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN2
|
||||
: <a class="el" href="xdptx__hw_8h.html#bc0694659cbae73e4436a59f7faa66b3">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN3
|
||||
: <a class="el" href="xdptx__hw_8h.html#f2d7ec7434fd6b13396896f741fe38d0">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TAG
|
||||
: <a class="el" href="xdptx__hw_8h.html#d035a9e26770fd7ecd637ae1800e3bf1">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0
|
||||
: <a class="el" href="xdptx__hw_8h.html#85a8fbe9dde44683e4bb750bbe5874ef">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0_HTOT_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f123f3012fbc23896ddfa6318692e67c">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0_HTOT_L_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#3e4f8ba68afc0ee3b18810607e0ddc65">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0_VTOT_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ea7b7386496998e9176a203524e5a6f9">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#4fda2211d1024d165f60d02b1eac14e0">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1_HLOC_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f43fb576310551b94788ba81b5a8cd50">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1_HLOC_L_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#77a88c39775447984a70f33d35f7c41c">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1_VLOC_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0d891ba2f78ed619241c3ecab4df3abc">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6c6ef416641384948bef1951bb39e07">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HLOC_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#9b1793b382b2cb0cf84b81eb4977515e">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HLOC_H_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d2733bcc60a3805db72f3a4270e632ae">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HTOT_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#80347114e59f83ab82b46a825678e6fb">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HTOT_H_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#9cc2cd8f05664b5baef3c894864f991d">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_VLOC_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#888f67be4526e1d0eee224eb922de823">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_VTOT_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3474298bced86150a839b540e6dd76f3">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_VTOT_H_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#c51fd0b94b202625e44ee8e0eaf058e6">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VENID0
|
||||
: <a class="el" href="xdptx__hw_8h.html#2678a80a5e85b73f2bd8f42ed2e80918">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VENID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#b9dae3f6bf84f77a79d983efbc592643">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VENID2
|
||||
: <a class="el" href="xdptx__hw_8h.html#148bdf4689a6d11f40abc47c47531f4b">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VSIZE0
|
||||
: <a class="el" href="xdptx__hw_8h.html#3614de866a91c8ae966258a4ff983a25">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VSIZE1
|
||||
: <a class="el" href="xdptx__hw_8h.html#a456f064def30373a7856a8c0a5b3fd0">xdptx_hw.h</a><li>XDPTX_DISPID_TYPE
|
||||
: <a class="el" href="xdptx__hw_8h.html#f1fbc48f8ec7b4055ac41c8644097795">xdptx_hw.h</a><li>XDPTX_DISPID_VER_REV
|
||||
: <a class="el" href="xdptx__hw_8h.html#b5850d213e43bf4cee57335b2b59886e">xdptx_hw.h</a><li>XDPTX_DOWNSPREAD_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d7314efe73c45ba07580ea59f5a418f">xdptx_hw.h</a><li>XDPTX_DPCD_ADAPTER_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#a3aa3f5913969cec5a47a558c6017613">xdptx_hw.h</a><li>XDPTX_DPCD_ADAPTER_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#c64ca43b89612663c8844abeeeec7e78">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c8bce31401ffa566d21aa92ebae8623">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_2_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0087e699f6242cd83d73340f1e05410f">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_2_PE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#7026a1a306485ce723a85b54fd94a63a">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_2_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c24be80c2abb9b9bbd217646a02b1d5">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8bb029a51b57b35a27cbecf180e0d1d2">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_PE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#04057aeb36ca3ca804d9d6d8bdc0c258">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#07af664a8112081d206388bcbfd79bbe">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_VS_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#31b4aee3d0ccaddc27bbe7a9518a55f0">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_2_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#5d20270033f656741e29817c29fd149b">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4865f9c9f8c065fda7e42b413714c8e">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#48c0a442bcd56fdd24ffc713d1d99b51">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e597fbd6e66e6186b313aef984a90ec1">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_1_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#75971ac529167738afea8dbc0fa10579">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0e516a73f6632cd5e8e2af8f5ee2800d">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#4f188c5a087587cac75ebc446ae72b27">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#bd185bd8b26a1373fcbe23c27c9fab5b">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_3_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#539bfd061ea3ef3a3d3ea4ea01fc6e31">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEC_LAT_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#6b22757e5dcb07cee3d0ad639986fdea">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEC_LAT_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#d0e92e23dd2e8aa02696b792c7f711b8">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEL_INS_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#2662fd71600d4703a37b98ff173b520b">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEL_INS_23_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#683ac84d712d823ed5a117813f4e5064">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEL_INS_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#860d16627dc599f9259d7336e6d3ddb2">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_PP_LAT_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#c04f6e977d538150872c7f44a2b10787">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_PP_LAT_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#453da42a77d9ac39649834c3c7f5a0ac">xdptx_hw.h</a><li>XDPTX_DPCD_AUDIO_DELAY_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#60ca3f4a60ca5a126ffe7b585afeb897">xdptx_hw.h</a><li>XDPTX_DPCD_AUDIO_DELAY_23_6
|
||||
: <a class="el" href="xdptx__hw_8h.html#054ccfce51b06605b2261aa994d8d21b">xdptx_hw.h</a><li>XDPTX_DPCD_AUDIO_DELAY_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#1e6d3a37e680eebeb7440a020d6d3375">xdptx_hw.h</a><li>XDPTX_DPCD_AV_GRANULARITY
|
||||
: <a class="el" href="xdptx__hw_8h.html#af4e55eb6dcfe7d15a471ac89a57b976">xdptx_hw.h</a><li>XDPTX_DPCD_BACK_CH_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#42db2dafc46e7229b1d9d9214398ac76">xdptx_hw.h</a><li>XDPTX_DPCD_BRANCH_DEVICE_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb0348881ec67b88fbb1bf041e2ce6c7">xdptx_hw.h</a><li>XDPTX_DPCD_DEVICE_SERVICE_IRQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff46f7b53d9db083faf5cd32dfbba656">xdptx_hw.h</a><li>XDPTX_DPCD_DOWN_REP
|
||||
: <a class="el" href="xdptx__hw_8h.html#799361f0a9fff72c0b8a00b980487426">xdptx_hw.h</a><li>XDPTX_DPCD_DOWN_REQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#7f2c19b7f70266fd7704966bbbcbc282">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_0_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff680cf70bcaa0559253b386d8fc7289">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_0_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#9ff31b9da333f29dfb2ae1c53f96201c">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_1_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#ec758b5045ea114cf666ab7f796ce942">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_1_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#e913243d128a6d769090a4d9aaded02d">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_2_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#035362bee9cdb86a67cbf6583eb3b25e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_2_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#71dd52a67e42f08871b12177683225e9">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_3_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d084f30cbfa4b7b9cc551c0837d7fa7">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_3_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#9f812c0901062c30d045b5a8aaadae2b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_COUNT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#573e69226083c3219554f8d6d9e9ee19">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_COUNT_MSA_OUI
|
||||
: <a class="el" href="xdptx__hw_8h.html#1a9a7f59c92a6f4ee0ab8659cc391918">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_DCAP_INFO_AVAIL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8dd87b80e4fa6bbfac688ca0117ace5b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_FORMAT_CONV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb9c63c2f5266f600bdaf717d187d50e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_PRESENT
|
||||
: <a class="el" href="xdptx__hw_8h.html#11f7a316506b29ff631cb38621412bda">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_PRESENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f9414c6a2fdf3c24d16b7171886899b0">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_AVGA_ADVII
|
||||
: <a class="el" href="xdptx__hw_8h.html#8762f7f992b2166e68374a36ee685a32">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_DP
|
||||
: <a class="el" href="xdptx__hw_8h.html#44b7819429a47897a3ae60a4cffb7a0a">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_DVI_HDMI_DPPP
|
||||
: <a class="el" href="xdptx__hw_8h.html#2dbdb4e7a32184ebe681e0c3aaa6e968">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6043dca80d5be7d0538d9791043d685f">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_OTHERS
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c4b1d4a644a24b2222d701ad476f468">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#390d55253cac7da25d27c7a453c2342f">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_HPD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#45a5519eb6dbe23a515a49d2f903e8a5">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1280_720_P_50
|
||||
: <a class="el" href="xdptx__hw_8h.html#ba9fe2784c54f18ef1d831cec50d42c7">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1280_720_P_60
|
||||
: <a class="el" href="xdptx__hw_8h.html#e0143eb2065072f6660ef524ca99868c">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1920_1080_I_50
|
||||
: <a class="el" href="xdptx__hw_8h.html#faa35eccf2a0f2f45e8e67c31a4ddd14">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1920_1080_I_60
|
||||
: <a class="el" href="xdptx__hw_8h.html#873ab083295961f23ee5c52298ce713b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_720_480_I_50
|
||||
: <a class="el" href="xdptx__hw_8h.html#b00fd7214a692cd521974b69aca7665e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_720_480_I_60
|
||||
: <a class="el" href="xdptx__hw_8h.html#e07dc03e13bfd262c55287f638963c82">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#280effba58556e2edb9b6904a74ebdc0">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#453579a385b3889d7ebd94c82a4e7d12">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_AVGA
|
||||
: <a class="el" href="xdptx__hw_8h.html#35fc140c32db4a744e848470547b872b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_DP
|
||||
: <a class="el" href="xdptx__hw_8h.html#e2eed172bff3de833cbf8df1529264bd">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_DPPP
|
||||
: <a class="el" href="xdptx__hw_8h.html#4af82b4168e6c9095f2cd762f7ddd9b4">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_DVI
|
||||
: <a class="el" href="xdptx__hw_8h.html#99722442a4d41d432adadc662d2d4290">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_HDMI
|
||||
: <a class="el" href="xdptx__hw_8h.html#f280a9705c077cfdfdcab8e686bd48e7">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8915b44f437ede717e00275811721c58">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_OTHERS
|
||||
: <a class="el" href="xdptx__hw_8h.html#6737acbb69c94dda0767aa48f67a99e5">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_DVI_DL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e1c3f30e8c17a182f54d3b1e220e2cf5">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_DVI_HCD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c9e8e5780d595fe58b4c4b00ce88bb1e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_HDMI_DPPP_FS2FP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#067ea715ec39bb6bee120406c6b8fba8">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_10
|
||||
: <a class="el" href="xdptx__hw_8h.html#a37425e236d64e2db11868e408b1e577">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_12
|
||||
: <a class="el" href="xdptx__hw_8h.html#876781ddac3aad6aef9d54999329fe7f">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#b6ae5e24fa88203c893c51d721602f68">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#9d0afc4cad326c0530372acbac73a754">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#da4a6f12a50ba8886821c79fed4c67c9">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSPREAD_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#230e672dd8c3c78536de84315c9e3bd4">xdptx_hw.h</a><li>XDPTX_DPCD_EDP_CFG_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#eb8ffa0e35cbd37d762e32676c928629">xdptx_hw.h</a><li>XDPTX_DPCD_EDP_CFG_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#9b102ba2776dd6679b5fcb79ab21e950">xdptx_hw.h</a><li>XDPTX_DPCD_ENHANCED_FRAME_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#afe9c144ccb5f8f5e8891ee26e5ab3b0">xdptx_hw.h</a><li>XDPTX_DPCD_ENHANCED_FRAME_SUPPORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0aaabb8cf6918f1a2d90f2229f1c3b39">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_DRIVE_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#92946c10808462d70483d40ea84ff5df">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_SYM_ERR_COUNT_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#5e716445788a4606e633239557e02908">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_SYMBOL_ERROR_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1593885d053a8171050df64b8fbd535d">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_TRAINING_PATTERN_TIME
|
||||
: <a class="el" href="xdptx__hw_8h.html#3cbf3fe86b7c5a047d5f2931802b5de4">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#fced383aef9bd85e603d96a8844eccfe">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_CAP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4a3d5b4acf04d4df8e5df74bd54d4fb">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_FORWARD_CH_DRIVE_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#c84d404a7b27d5e0844d03ace51a3e18">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_FORWARD_CH_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#51a5145e4160592555278c7a4a40657a">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_FORWARD_CH_SYMBOL_ERROR_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#f80117dd505977a78f0bd9d1d0236929">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_MODE_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#d2b5c2c2a3f81ac8fac3f52a2ed5f1c1">xdptx_hw.h</a><li>XDPTX_DPCD_GUID
|
||||
: <a class="el" href="xdptx__hw_8h.html#64f9139d99683e3b1a5f1d4f425bceb4">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_100KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a0311f344efa2a81a639d709795efadb">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_10KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6d16d3a8051785865e7462fbf837f5f">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_1KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#e3ff10e311f2b8ca8f0d55d86496884a">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_1MBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#dbdd34beed6f5dcdd7a1bba23ef08a1e">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_400KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a97b0b25239da828620c8aabec0c7211">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_5KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#c62ca1b5535924a1eab5df407d187271">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#e65ef48bf9f52a5112b7a9ba9eb82374">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_NONE
|
||||
: <a class="el" href="xdptx__hw_8h.html#3b6fe1ee845016de1816cb166817a22f">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#3109d81022878039797788b3334c7db5">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED
|
||||
: <a class="el" href="xdptx__hw_8h.html#895d00af74b9999362523ac0c1e37e4b">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED_DOWNSP_STATUS_CHANGED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#291fcce612161ed5b19f8d055732c051">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED_IA_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d7872eb2100bc5f2f6894fe28df1a4d8">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED_LINK_STATUS_UPDATED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#86cbb0c5ed85e7dfa348d3e8c3c837a7">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#f632ca1437f240e8bc63458884535628">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e18010b25f853a2e8c5c6f33e7ba496">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#4eb9fa224984d48accc35d482c418b52">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_4
|
||||
: <a class="el" href="xdptx__hw_8h.html#d33160fafa12c7e60ada3832003492dd">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8b09ca30bc0692989a2cff44bf8f78ce">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#92ea790907817798e73b848fb9c07cec">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#fa2ec41da25eef9575240cb0cabc8f57">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#5ec43c75fae423a51c8238a42ddb9e79">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#33df4753aefb80d7232614a4f2075341">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_CFG_FIELD_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#89827ad11f16d827e54264fb77f76c46">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_CFG_FIELD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#fda6d2d176ee1c9dfebcc9e04ae362fa">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE0_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#b66e056707d1bdb71f050fa2df99ec3d">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE1_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#09598c07067bdeae9ec39ee23f9a6336">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE2_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#5a74723bf3835e5e964dc80d6df4e43f">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE3_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#e7a35574b8dd1c8f2a5c87e5c3423fe4">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_SINK_STATUS_FIELD_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#d1af78da67d30387e97e5c72c1115221">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_SINK_STATUS_FIELD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#87fed4c1ef79079bc4bd28be6cf76129">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_DOWNSPREAD
|
||||
: <a class="el" href="xdptx__hw_8h.html#8efffeebf215d058830a2ed5d47fdbf2">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_DOWNSPREAD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fa51d7957cab5f3e5a9be7f36c922a23">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d9a12078ce929fae31606d229a770728">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4833aec4d4e00a7dfff6abe7665ef3a">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#99be9f951fc7679f27aa9323f7739d7d">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_4
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d450c41879a9df654ba0b634ee99dbb">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#820d2a44cb464c1fcffb35552c7a89e8">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE
|
||||
: <a class="el" href="xdptx__hw_8h.html#d31318ecdfa6e6d348f255a05e87982d">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#85d167953f706f372255a80c5414ee18">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#2ead0879a7035ba1ae212e4d8c158615">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#ae36adb66ce773ed16ee9b2c281e715d">xdptx_hw.h</a><li>XDPTX_DPCD_ML_CH_CODING_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#5589e577989a936ad0bd999699c322db">xdptx_hw.h</a><li>XDPTX_DPCD_ML_CH_CODING_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d0890e5f9f2b8e85e593369692f6abae">xdptx_hw.h</a><li>XDPTX_DPCD_ML_CH_CODING_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#76b15516363d7225c8da712427687a63">xdptx_hw.h</a><li>XDPTX_DPCD_MSA_TIMING_PAR_IGNORED_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c55f8ea40c08519adab044f72c1bae98">xdptx_hw.h</a><li>XDPTX_DPCD_MSA_TIMING_PAR_IGNORED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#678ac9965da7bbe16f5431950d138891">xdptx_hw.h</a><li>XDPTX_DPCD_MST_CAP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#2294ad91fed2668f2b2b4d509f2fffb0">xdptx_hw.h</a><li>XDPTX_DPCD_MST_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#67483228aa1d8c2f66614554bdf6c744">xdptx_hw.h</a><li>XDPTX_DPCD_MSTM_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#bfc4b4455c9671abe6d44ffe3f08da31">xdptx_hw.h</a><li>XDPTX_DPCD_MSTM_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#4daa1cda21b83425e4082ece56ef0c4c">xdptx_hw.h</a><li>XDPTX_DPCD_NO_AUX_HANDSHAKE_LINK_TRAIN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#988de89a73b6337a4d60e344f0200c3e">xdptx_hw.h</a><li>XDPTX_DPCD_NORP_PWR_V_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#a336bd0a671a6b05f883173cff9213e9">xdptx_hw.h</a><li>XDPTX_DPCD_NUM_AUDIO_EPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#fdca186dba2f509c3ea4bf8f3913d762">xdptx_hw.h</a><li>XDPTX_DPCD_OUI_SUPPORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#66ab6872d42ad8fdd55687429db9f6a7">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_ALLOCATE_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#4a78c4bf745ea0cff3e2f64d6ff0b612">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_ALLOCATE_START_TIME_SLOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#12e200c2ced52d77522c833650271f88">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#4386277c1fba73293372267aebfa67ab">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_TABLE_UPDATE_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a4a3b829a95de966f5d3ecf2c7e847aa">xdptx_hw.h</a><li>XDPTX_DPCD_RECEIVER_CAP_FIELD_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#27228279f92a61a8ebedfedd397bc97a">xdptx_hw.h</a><li>XDPTX_DPCD_RECEIVER_CAP_FIELD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#b02c72a08c29aa61946100a47e5b37c2">xdptx_hw.h</a><li>XDPTX_DPCD_REP_LAT
|
||||
: <a class="el" href="xdptx__hw_8h.html#17b22094a3ca43ebf1e3cb4d2420a928">xdptx_hw.h</a><li>XDPTX_DPCD_REV
|
||||
: <a class="el" href="xdptx__hw_8h.html#fc6afb769480a2a5462745c2d2890988">xdptx_hw.h</a><li>XDPTX_DPCD_REV_MJR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4067eacb912de4cc2eb44bd92cacfc9c">xdptx_hw.h</a><li>XDPTX_DPCD_REV_MJR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#8eb1dde8c0b2fe9d9e65f2dc0bdbc104">xdptx_hw.h</a><li>XDPTX_DPCD_REV_MNR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e031b0f15ac5cc75ce942ad16eace568">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_FREQ_LOCK_DONE
|
||||
: <a class="el" href="xdptx__hw_8h.html#f356851c249cff2c18484e09267c9e28">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_MSTR_REQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#74e95abc0d829d1a279270d589ecf7a0">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#e95cbc46d57d6831e133eef053bd3435">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_23_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#b657466c4a008bc2f8340a31ffccdfac">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_31_24
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c5c6031f8dafee0182df3086503f49c">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#819cb1573a4a3135e40b4ec9ba8b57ef">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_PHASE_SKEW_EN
|
||||
: <a class="el" href="xdptx__hw_8h.html#03ca55708bdad9b1b7f04c093f732d34">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT0_CAP_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#5b7a46da5aab0e5e30f074fdf9299928">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT0_CAP_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3287ef2b6df2675c947bdde4aaf339a5">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT1_CAP_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#c74b25f595cbd8f1853f44f4ac1bf918">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT1_CAP_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb09722268b28c0c860f32c988b36823">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORTX_CAP_0_ASSOC_TO_PRECEDING_PORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3fef8714a6866993ec04e9c76235ea86">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORTX_CAP_0_LOCAL_EDID_PRESENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4a1cb9cc6e6f43816aecf6c1e6070975">xdptx_hw.h</a><li>XDPTX_DPCD_SET_POWER_DP_PWR_VOLTAGE
|
||||
: <a class="el" href="xdptx__hw_8h.html#f8a9aaa36c4285ed47f6467510ce2c16">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_ALIGN_STATUS_UPDATED_ESI
|
||||
: <a class="el" href="xdptx__hw_8h.html#34e5ebe1b78494b50d4898923720e573">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#43e851a0c29da93b42f50234b6f7a940">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_COUNT_ESI
|
||||
: <a class="el" href="xdptx__hw_8h.html#7449667b5696494e1b690acf7428dff1">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_DEVICE_SERVICE_IRQ_VECTOR_ESI0
|
||||
: <a class="el" href="xdptx__hw_8h.html#04fa9a9d906db41086fd7dac177efef9">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_DEVICE_SERVICE_IRQ_VECTOR_ESI1
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd6d72ad94664b64d6cd5400d7208ba5">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_LANE0_1_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#c0c6f54f1c84ff8586fbf9ce77f63864">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_LANE2_3_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#d8d70e03e5d9e0d9c8e1fc2434a8d2e8">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_LINK_SERVICE_IRQ_VECTOR_ESI0
|
||||
: <a class="el" href="xdptx__hw_8h.html#1d6bd20a1625b026530442a99bdc78cf">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#f54288a191917b9f3e83e87a8945347e">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS_ESI
|
||||
: <a class="el" href="xdptx__hw_8h.html#9105c05fa643493df5e91f985cf52b4b">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS_RX_PORT0_SYNC_STATUS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#490e1d896f2361eee79c1b0733506f20">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS_RX_PORT1_SYNC_STATUS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#db3a746e916bf683e92a624fcb312fb4">xdptx_hw.h</a><li>XDPTX_DPCD_SPREAD_AMP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#16742e2d4db17d0e8dfdaaecd711dad6">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3a88339c7381196b2234310ffaf6b44d">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6d72768bb0e6b09ffc4e0a8ab2a70a2">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#417fce194056449cd8479194824854ca">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#72e7f17f2ef9e62f365164b52fd1ee80">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_1_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fce707897d39d57cea2c234fabcbf1f2">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_1_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#34b5f7a01d0d0c25d0a25ce8f77aa9b2">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_1_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#2715edb8173270fcd07e61111db09a0d">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#8bdeefebf867de39104c52b20696186e">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a9839e55a555d02d018a5f5406cab2b5">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#71ab708cc08c194dd9b04d9bd8c792b8">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1e0409beb36c733715156ba4466ffdb5">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_3_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#829dc7d466a0c2d1a70fdb2ae989e86e">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_3_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b19faa2e9cc7886488bd650217068f9b">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_3_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7161301ab3de3b47bb50e209e7b5ffe2">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#4091657c9bd00ba5ac08719212132001">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#64da457178b98c6df1200ae20c8b65d4">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#67a552c96e6547655b7a7b95b9ab1067">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#21ae0a171f58679d477f9ad34ae20a12">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#644138fe5899e449ee2a0f3177b65aab">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#e2a7b3ab8820f826e14450a3ee4c4922">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_TP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#d9016a535e2210a73f909a6145a75049">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_TP2
|
||||
: <a class="el" href="xdptx__hw_8h.html#70f57190fe1f22fe2f83b764e64e81dd">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_TP3
|
||||
: <a class="el" href="xdptx__hw_8h.html#adaa26343ae1cb190433538c5e08ca73">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#5cefeeafceee09650abaa109f7ebb877">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_D102_TEST
|
||||
: <a class="el" href="xdptx__hw_8h.html#58a1376b284a4f8e415c1db7549da35b">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e0b9024ad912bf1aa3ea1e3ceffd69aa">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#edbc2eec348077f6556fd6a7bc115f22">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_PRBS7
|
||||
: <a class="el" href="xdptx__hw_8h.html#163910e90f4915a29331525d7bd0729c">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_SER_MES
|
||||
: <a class="el" href="xdptx__hw_8h.html#9c860a8cb3ff2ce19bf31675e167beb0">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6a51c5d0c30087cd9abfc9172ee5882">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_REC_CLK_OUT_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b3cabf9114a07385b47471c3c9768f23">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SCRAMB_DIS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5dd2918cb991f54417abd41ffb30241e">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_DE
|
||||
: <a class="el" href="xdptx__hw_8h.html#13afad6804971bfb88b7d4589237e89a">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_DE_ISE
|
||||
: <a class="el" href="xdptx__hw_8h.html#071c2e874b2737c3b65b758e8dbd941d">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_ISE
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d7432fc15c97e243314ff7f4941391a">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7cc1bb8b2360663f0332eace91226765">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#f9253b32388b3ee3784486005bdfa86f">xdptx_hw.h</a><li>XDPTX_DPCD_TPS3_SUPPORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4ffd6363ab920c73ec22b45a9071622">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_100_400US
|
||||
: <a class="el" href="xdptx__hw_8h.html#0c70d577d74c19c208aaaa5a709a204c">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_12MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#954cf49f28d9e216586cdfc825958eb6">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_16MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a9f951ba0ab564780e70ba028c711b1a">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_4MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#49ca016afe18bc37cc155ed90d87a403">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_8MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#77b918356b07f9badbf43ea76e870f52">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INTERVAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#84241d63bcf360513e4941d19b779c11">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE0_1_SET2
|
||||
: <a class="el" href="xdptx__hw_8h.html#fe46927d5908bac8b6019c165e76eebf">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE0_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#c86e34ddf3c00d04c565d1757b5e8eb9">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE1_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#42e7d0b2c4fc44f7ce62e8094f66fdaf">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE2_3_SET2
|
||||
: <a class="el" href="xdptx__hw_8h.html#b5efbea30c0c3615d9cf5f99b83d4672">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE2_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#176bccc8d707bb7fb0854b0a4bef829e">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE3_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#f34e9ec76271640fecd0f1e7495e1ae4">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_0_2_SET_MAX_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4394d4c0dbb11e2eebdde4d05488134">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_0_2_SET_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e98e2ace787a90ea9ab9e0038b8ccba0">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_1_3_SET_MAX_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f97a0181a4148ac17936863ae68d1d27">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_1_3_SET_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#10538678827f60b54c67df01da541a6e">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_1_3_SET_PC2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#0ed9a86e0162c3f4e9d21a87deeecb0d">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_MAX_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1c0eca9e8b1b681daf0615eb40f6fc91">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_MAX_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#19c5d300604717198b462dc3d1acbcb3">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0ba2991a049a91f4d157d6946df4f458">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_PE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#03b243263b770cdd3e1977fd854a02a2">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6fae9a2d6ba0529e37314e789178574">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#1112efd33c27fb573a7ace100c04dd65">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#538c4feddca2fdc5b6513b06962b1520">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#4fb8e8c64045a28330bcdbe25c5dfa6a">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#bb6d807aee4bdb7b424be7361a730378">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_FREQ_LOCK_DONE
|
||||
: <a class="el" href="xdptx__hw_8h.html#21aaf0546f8630de66c81f755ce8a01a">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#92b734335222864a2f90a7dbf329459c">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_23_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#82e8a15a7ec4e5289468d7f4bac37511">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_31_24
|
||||
: <a class="el" href="xdptx__hw_8h.html#2670c3f1bd7d688a91ab7bd5e71150d7">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#0e162f94573d136c879cc09ebc0a5bd9">xdptx_hw.h</a><li>XDPTX_DPCD_UP_IS_SRC_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3df8cf3462ae768adf99be59621ee8e9">xdptx_hw.h</a><li>XDPTX_DPCD_UP_REP
|
||||
: <a class="el" href="xdptx__hw_8h.html#61f5fdf1e50ed917f94f6fe3fa63c7dc">xdptx_hw.h</a><li>XDPTX_DPCD_UP_REQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#29760e54ce968788a6d08cb41442e4ff">xdptx_hw.h</a><li>XDPTX_DPCD_UP_REQ_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#905a796a81438eb2fd488ad0d981696f">xdptx_hw.h</a><li>XDPTX_DPCD_UPSTREAM_DEVICE_DP_PWR_NEED
|
||||
: <a class="el" href="xdptx__hw_8h.html#b45b21f5575c2e9b2589b012bd1090e0">xdptx_hw.h</a><li>XDPTX_DPCD_VC_PAYLOAD_ID_SLOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#707e0cd8eec3bd399f47068ba3574ab1">xdptx_hw.h</a><li>XDPTX_DPCD_VID_INTER_LAT
|
||||
: <a class="el" href="xdptx__hw_8h.html#a876602b0c183b3b7bd4f33336039f33">xdptx_hw.h</a><li>XDPTX_DPCD_VID_PROG_LAT
|
||||
: <a class="el" href="xdptx__hw_8h.html#528f1e1dbc9da6582fdc9fb522b9c92a">xdptx_hw.h</a><li>XDPTX_EDID_ADDR
|
||||
: <a class="el" href="xdptx__hw_8h.html#98b209809956d19e99bfb5861320238e">xdptx_hw.h</a><li>XDPTX_EDID_BLOCK_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#54556e26556d589cc446da234160c53f">xdptx_hw.h</a><li>XDPTX_EDID_DTD_DD
|
||||
: <a class="el" href="xdptx__hw_8h.html#4c0444d71ec8519b4c14f956c6b49687">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HBLANK_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#204efcbde19099818449e4eeb4e0c018">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HBORDER
|
||||
: <a class="el" href="xdptx__hw_8h.html#0972838a0b3870271f9c0245379e538f">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HFPORCH_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#d2dc4d9a8b7f695e11bc8a975403eeb5">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HIMGSIZE_MM_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd4bd1b0cc8d5df015d593092adb953b">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HRES_HBLANK_U4
|
||||
: <a class="el" href="xdptx__hw_8h.html#15df90489da71349d9332cc45ca84088">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HRES_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#0532f5b0ae7791d365e3a7aa2ff9a5ac">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HSPW_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#cedafc454b4ab8ccd8dc9053364c184c">xdptx_hw.h</a><li>XDPTX_EDID_DTD_PIXEL_CLK_KHZ_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#169ce642bc16fef5dd8acff402ea26a9">xdptx_hw.h</a><li>XDPTX_EDID_DTD_PIXEL_CLK_KHZ_MSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#2986d82e9dc105bab39beb211c331fb0">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#19a8e6f75438b41e384f54731dd5c681">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_HPOLARITY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1de303e3968172a23f1840b67992e734">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_HPOLARITY_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#090de354d74efc065058453646c6079c">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_VPOLARITY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#216d71a6c248d097c2ff283ab39c98e2">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_VPOLARITY_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#af126efe1d8d171b17ef8873d05562b0">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VBLANK_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#47f428d78ea90fdb4f95f77dedfcc185">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VBORDER
|
||||
: <a class="el" href="xdptx__hw_8h.html#73fcab61b51e51c7dc10a65bfd906b50">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4
|
||||
: <a class="el" href="xdptx__hw_8h.html#49e4c184d05fb0792b97520b827e1d60">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#9706a7d08651c3e2fe9ba4043e7079e8">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#ccab1c4ece9b2682864d5fb8390ef9bd">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VSPW_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a172ef632aa8505875cf99ef598c4dad">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VIMGSIZE_MM_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#7fdd24dd20b3fbf3b6cbe69b8b2260f1">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VRES_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#32bbfb939c0910c0f20a8cce327e3361">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VRES_VBLANK_U4
|
||||
: <a class="el" href="xdptx__hw_8h.html#fcc1d4a9046cb26a8bb7bab868072186">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2
|
||||
: <a class="el" href="xdptx__hw_8h.html#53264c546eafcb03312bc7acb144f453">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff71b903b31c8f87a4897f689ee625ef">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#940b72476eda533d932c4f7c043ec140">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e32c993299a79d2352198df22aea63a2">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#15faa764b80423fac349428591197301">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#bc881ed0ae67854773ca546a4ac58d03">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#362a887c3c21aa19d7250f5b16cf3263">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VSPW_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6d036670b17a42942fe0d63a23d088e4">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4
|
||||
: <a class="el" href="xdptx__hw_8h.html#1fc98e98c756fe2195080ab6f9b0490a">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4_HIMGSIZE_MM_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#26b8c0b0310089d00a561ca8b05651b9">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4_HIMGSIZE_MM_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#77875ea1863c117ce2bc60c6c64e4dc9">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4_VIMGSIZE_MM_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#764313a3588b9a493289d5f86928330d">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c816e23a48a1b873758469313ad7c1be">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3f336bc594d6a76296327801a4cbad7f">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#5633e0393467c82897ffb3f3adc34dc2">xdptx_hw.h</a><li>XDPTX_EDID_EXT_BLOCK_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#63e9b871d9eadf5e3978309b001e7816">xdptx_hw.h</a><li>XDPTX_EDID_EXT_BLOCK_TAG
|
||||
: <a class="el" href="xdptx__hw_8h.html#274a555b9eee8b1005de4e5cac96df0e">xdptx_hw.h</a><li>XDPTX_EDID_EXT_BLOCK_TAG_DISPID
|
||||
: <a class="el" href="xdptx__hw_8h.html#f56421792a0232a615c2174f21928236">xdptx_hw.h</a><li>XDPTX_EDID_PTM
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd996c267b92b75bc15aa546f12bcbcd">xdptx_hw.h</a><li>XDPTX_ENABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#dccd2085ac011c3526c29b18af61b533">xdptx_hw.h</a><li>XDPTX_ENABLE_MAIN_STREAM
|
||||
: <a class="el" href="xdptx__hw_8h.html#6cf7e0bee90d891de9523a1404f4dfce">xdptx_hw.h</a><li>XDPTX_ENABLE_SEC_STREAM
|
||||
: <a class="el" href="xdptx__hw_8h.html#7173b48b94714a38346fd15d84e39721">xdptx_hw.h</a><li>XDptx_EnableMainLink()
|
||||
: <a class="el" href="xdptx_8h.html#7d10dab87f3f11b925e9780765c0ae08">xdptx.h</a>, <a class="el" href="xdptx_8c.html#7d10dab87f3f11b925e9780765c0ae08">xdptx.c</a><li>XDptx_EnableTrainAdaptive()
|
||||
: <a class="el" href="xdptx_8h.html#7d15cd84e2391c5d8f19c7fbeac1781a">xdptx.h</a>, <a class="el" href="xdptx_8c.html#7d15cd84e2391c5d8f19c7fbeac1781a">xdptx.c</a><li>XDPTX_ENHANCED_FRAME_EN
|
||||
: <a class="el" href="xdptx__hw_8h.html#b9585758f007170a13039bfb6669e154">xdptx_hw.h</a><li>XDptx_EstablishLink()
|
||||
: <a class="el" href="xdptx_8h.html#b567f6a342ca0e7c4ceef86ff1df87cf">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b567f6a342ca0e7c4ceef86ff1df87cf">xdptx.c</a><li>XDptx_FindAccessibleDpDevices()
|
||||
: <a class="el" href="xdptx__mst_8c.html#991faef9c1e7417849ee2c682a3033de">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#991faef9c1e7417849ee2c682a3033de">xdptx.h</a><li>XDPTX_FORCE_SCRAMBLER_RESET
|
||||
: <a class="el" href="xdptx__hw_8h.html#81b5d89e3211a268e40653378010603f">xdptx_hw.h</a><li>XDPTX_FRAC_BYTES_PER_TU
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6fb8fc7ffbc02a36aec3763720e5d51">xdptx_hw.h</a><li>XDptx_GetDispIdDataBlock()
|
||||
: <a class="el" href="xdptx__edid_8c.html#4ad4de26b5e25389163b42e50def32fb">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#4ad4de26b5e25389163b42e50def32fb">xdptx.h</a><li>XDptx_GetDispIdTdtHLoc
|
||||
: <a class="el" href="xdptx__hw_8h.html#84a759a7889374fc716f118b50919aeb">xdptx_hw.h</a><li>XDptx_GetDispIdTdtHTotal
|
||||
: <a class="el" href="xdptx__hw_8h.html#a7f8c59fb4ad94c697f8c1f0e2257730">xdptx_hw.h</a><li>XDptx_GetDispIdTdtNumTiles
|
||||
: <a class="el" href="xdptx__hw_8h.html#6f877f976ffd7c65c5aed39f1d3142af">xdptx_hw.h</a><li>XDptx_GetDispIdTdtTileOrder
|
||||
: <a class="el" href="xdptx__hw_8h.html#42df077ce7bbb9925d5479b23ca2893f">xdptx_hw.h</a><li>XDptx_GetDispIdTdtVLoc
|
||||
: <a class="el" href="xdptx__hw_8h.html#7bbf7813f06fb924f58a5a40832f563e">xdptx_hw.h</a><li>XDptx_GetDispIdTdtVTotal
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d905fbb657f9f2d0b64c71543acbc72">xdptx_hw.h</a><li>XDptx_GetEdid()
|
||||
: <a class="el" href="xdptx__edid_8c.html#cdf3fcdd140ad27aacedc8852d43cdc5">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#cdf3fcdd140ad27aacedc8852d43cdc5">xdptx.h</a><li>XDptx_GetEdidBlock()
|
||||
: <a class="el" href="xdptx__edid_8c.html#f055e7ce4942e1bb7b0d20bc0d38d6c1">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#f055e7ce4942e1bb7b0d20bc0d38d6c1">xdptx.h</a><li>XDptx_GetGuid()
|
||||
: <a class="el" href="xdptx__mst_8c.html#f9dd742b76b327254d4e144ad015e261">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#f9dd742b76b327254d4e144ad015e261">xdptx.h</a><li>XDptx_GetRemoteEdid()
|
||||
: <a class="el" href="xdptx__edid_8c.html#504e1da83e392f0428ebf750f3fa5df5">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#504e1da83e392f0428ebf750f3fa5df5">xdptx.h</a><li>XDptx_GetRemoteEdidBlock()
|
||||
: <a class="el" href="xdptx__edid_8c.html#52517d09cc73a7e286d04790594a30c2">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#52517d09cc73a7e286d04790594a30c2">xdptx.h</a><li>XDptx_GetRemoteEdidDispIdExt()
|
||||
: <a class="el" href="xdptx__edid_8c.html#65c571add61a17c00ac380b24dbe9b98">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#65c571add61a17c00ac380b24dbe9b98">xdptx.h</a><li>XDptx_GetRemoteTiledDisplayDb()
|
||||
: <a class="el" href="xdptx__edid_8c.html#86ed8332a0bd5e0069132fe6bf945f21">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#86ed8332a0bd5e0069132fe6bf945f21">xdptx.h</a><li>XDptx_GetRxCapabilities()
|
||||
: <a class="el" href="xdptx_8h.html#b8c55ba66858d6af8095f263ee308d2d">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b8c55ba66858d6af8095f263ee308d2d">xdptx.c</a><li>XDPTX_GT_DRP_CHANNEL_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#0a1019d380ca28371f114372f6078b83">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND
|
||||
: <a class="el" href="xdptx__hw_8h.html#1cc4c78c44c341a64cd5ce9eb6488733">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_ADDR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7d9d092698674c66fc88d4b2edec5da8">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_RW_CMD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8f0ec89901485a76219b83547ee1e032">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_W_DATA_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#db0c02371ab905c33d6dc38e41ac125a">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_W_DATA_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#444041624084d4373266eb762c3afe18">xdptx_hw.h</a><li>XDPTX_GT_DRP_READ_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#1c299567502ff153b0e3ab3e04693a6b">xdptx_hw.h</a><li>XDPTX_HPD_DURATION
|
||||
: <a class="el" href="xdptx__hw_8h.html#79f1dd7d25b8299f9a5a82cc1401d463">xdptx_hw.h</a><li>XDptx_HpdEventHandler
|
||||
: <a class="el" href="xdptx_8h.html#6f6cee9a7863df256adb35802fc65017">xdptx.h</a><li>XDptx_HpdInterruptHandler()
|
||||
: <a class="el" href="xdptx__intr_8c.html#52950290a845ab93bac618ea8af9efc4">xdptx_intr.c</a>, <a class="el" href="xdptx_8h.html#52950290a845ab93bac618ea8af9efc4">xdptx.h</a><li>XDptx_HpdPulseHandler
|
||||
: <a class="el" href="xdptx_8h.html#41e04c356fe95636134164b0f03bca9b">xdptx.h</a><li>XDptx_IicRead()
|
||||
: <a class="el" href="xdptx_8h.html#c46b9e42cbf67c0f95fcbeb54b469839">xdptx.h</a>, <a class="el" href="xdptx_8c.html#c46b9e42cbf67c0f95fcbeb54b469839">xdptx.c</a><li>XDptx_IicWrite()
|
||||
: <a class="el" href="xdptx_8h.html#eaac8c34e7831b805916a05a8946fa29">xdptx.h</a>, <a class="el" href="xdptx_8c.html#eaac8c34e7831b805916a05a8946fa29">xdptx.c</a><li>XDptx_In32
|
||||
: <a class="el" href="xdptx__hw_8h.html#f11c526b53f6f8d5d397798df1c4703a">xdptx_hw.h</a><li>XDPTX_INIT_WAIT
|
||||
: <a class="el" href="xdptx__hw_8h.html#8e570f6926e0dc55c65a0c73dc0c7113">xdptx_hw.h</a><li>XDptx_InitializeTx()
|
||||
: <a class="el" href="xdptx_8h.html#9ebb3ed7a51593c63fbd31ea14924a49">xdptx.h</a>, <a class="el" href="xdptx_8c.html#9ebb3ed7a51593c63fbd31ea14924a49">xdptx.c</a><li>XDPTX_INTERRUPT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#09f3eb73078b0ac57fa1a871e4503c84">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_EXT_PKT_TXD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6b65ca1c4851291a64cf787d493eee4">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_HPD_EVENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7c0ab21d86f1f0ec70763c34e8f847e6">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_HPD_IRQ_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e264ca15d40e43986c6cc994b200a272">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#125bfbf273206044e940840632432855">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_REPLY_RECEIVED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ba5f4a2d11d1c16eb7ac42e46a66a1dd">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_REPLY_TIMEOUT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff47f0199d49bf176dd0672a489feb21">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE
|
||||
: <a class="el" href="xdptx__hw_8h.html#2c90e9fd29a27b064ed90193af1803f5">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_HPD_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#86fe8f09022654d68f297159cdcd266a">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_REPLY_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#35c6c25b2cef95cd4978a40db8c3204e">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_REPLY_TIMEOUT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd17f7ce4457d50ead5cbd6dde2bf51e">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_REQUEST_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3c619f1dbed1c62873fd8fb2fe4f198e">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#37d4b7923f7251ad4350533aa6bb8ff9">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_EXT_PKT_TXD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f553dc3dde408ced8895aef66587cf80">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#df451c8fc46142a74279cb1ff1c4d2ce">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_HPD_IRQ_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c43b1c32faaa60d3a91a9e06b0be7c2b">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3bbe32201efcb4b198f88732e472462b">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_REPLY_RECEIVED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#10599c8cf461799f0185d992375ed014">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_REPLY_TIMEOUT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd3e791215a6e8664f9aa9d5a1411912">xdptx_hw.h</a><li>XDPTX_IS_CONNECTED_MAX_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#eda7b677ddf7bb1cbfbc00bdf1594158">xdptx.c</a><li>XDptx_IsConnected()
|
||||
: <a class="el" href="xdptx_8h.html#6e793e6d9919548dc5396e7aba1cf77b">xdptx.h</a>, <a class="el" href="xdptx_8c.html#6e793e6d9919548dc5396e7aba1cf77b">xdptx.c</a><li>XDptx_IsEdidExtBlockDispId
|
||||
: <a class="el" href="xdptx__hw_8h.html#f9c078ce55f5c09971fcfa711296ab0e">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#60699d11e90355d8f5bcdd1a43ada31a">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f27f79722cbd8e05638a72c942261934">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#cbfb5d978ff4c2b5b8b77d3856e84fae">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET_4
|
||||
: <a class="el" href="xdptx__hw_8h.html#2486d2d588da9d897323f23b0023ba09">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#615a5c215decf0d186dccec73e66a0a7">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#19befc790dbc6e839b45cdbdf06397c2">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#334765330e1d30a1df9f0b874373e119">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#0f60cc81b390dc621b5fcc49732a0d48">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#ef7d54d2e4ebee982c4e9efb022e108d">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_D102_TEST
|
||||
: <a class="el" href="xdptx__hw_8h.html#8cef3c82f7dc1969bd5ee1ccc65132c9">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#0fe4df9f2f0fd9d0073ba054ea105917">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_PRBS7
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e6568309f6688b98fa9d473cd72984c">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_SER_MES
|
||||
: <a class="el" href="xdptx__hw_8h.html#2238f7e9e5a1e11f947bee2446963bad">xdptx_hw.h</a><li>XDptx_LookupConfig()
|
||||
: <a class="el" href="xdptx__sinit_8c.html#696416992bebdddc0fad449fe7afe24f">xdptx_sinit.c</a>, <a class="el" href="xdptx_8h.html#696416992bebdddc0fad449fe7afe24f">xdptx.h</a><li>XDPTX_M_VID
|
||||
: <a class="el" href="xdptx__hw_8h.html#12525c000e5e27377091080aeb16f676">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HRES
|
||||
: <a class="el" href="xdptx__hw_8h.html#46f4a5ce423759c35bc5e033cc959065">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HSTART
|
||||
: <a class="el" href="xdptx__hw_8h.html#e9e74dfaeeef0afcab887f8c2d8e16c8">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HSWIDTH
|
||||
: <a class="el" href="xdptx__hw_8h.html#4f0cf03e1278c8fa08884e3684115c12">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HTOTAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#abfdf1c8ce7c380c8e1a1e8f054f5120">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_INTERLACED
|
||||
: <a class="el" href="xdptx__hw_8h.html#369f88c7bed81fcc320ed60590ee198b">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_MISC0
|
||||
: <a class="el" href="xdptx__hw_8h.html#98a49091321fa30ac74a868dfdda94ea">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_MISC1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f8260d6919b171a531a5140e36b53d5f">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_POLARITY
|
||||
: <a class="el" href="xdptx__hw_8h.html#3191336d71991f45e685370166b75235">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VRES
|
||||
: <a class="el" href="xdptx__hw_8h.html#550fd6231df126304130eeddd06eecb4">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VSTART
|
||||
: <a class="el" href="xdptx__hw_8h.html#146ad1908ab33bcea4ff20864857fcda">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VSWIDTH
|
||||
: <a class="el" href="xdptx__hw_8h.html#b76db8018242c149a8f04425b96a0073">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VTOTAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#0106cb54397959b72820d01d2738e44f">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_10BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#817aef846203cb2353121b0d6ae72aa4">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_12BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#b8f14cc46979dd9cd1805194fc864e51">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_16BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#fbde22ffe7105d66d1ad969a7bda05b0">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_6BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#b51366f59b9f87a2af70e177aaf46ec5">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_8BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#91abe3ea71ac4c479e82039226669509">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8b97cf8821d9d64b6373484c117649c5">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#b979cb6c78c5e4039c53ba8efe8a5583">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#53437c9a8d17203c20273fe49944ba21">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_RGB
|
||||
: <a class="el" href="xdptx__hw_8h.html#f190b9960cbbd0b31bc8d94c3583e177">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#8e4e1a7bc814fd235d8b5bd4241cf993">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422
|
||||
: <a class="el" href="xdptx__hw_8h.html#2656084077d48a700d0471ced29ec4f3">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR444
|
||||
: <a class="el" href="xdptx__hw_8h.html#f2f8028fef49ced94003eff4317761b9">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5709d35da2320d69216ef309bd920447">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1a4cdc6a7c8e535bc11d9aa1f01f4081">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_SYNC_CLK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#9d1375c1c5bef0030ee4803e4b5a3154">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5c8fb63a3f70f0237ff78744066a8821">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#383a99c5d27aa2a7f85880d0e8389d31">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC1_INTERLACED_VTOTAL_GIVEN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b56aa216312e71f1ec74fc5ada78df29">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC1_STEREO_VID_ATTR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#12d409bfe12707708286f1b2d9b9550c">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC1_STEREO_VID_ATTR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#870bcaceda2377ffca92a46d251670ea">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_POLARITY_HSYNC_POL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4be382ffcb05750de249a696fd7bc88">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7ff368b199653120745d35dbbb8b6a67">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#5265dee8063dd9c922eb91264fc96359">xdptx_hw.h</a><li>XDPTX_MAX_SBMSG_REPLY_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx__mst_8c.html#f5fc0e734c06a4ef2c7fdb2adb767296">xdptx_mst.c</a><li>XDPTX_MAXIMUM_PE_LEVEL
|
||||
: <a class="el" href="xdptx_8c.html#2e92b9e3582508165c54dd78dbedff7c">xdptx.c</a><li>XDPTX_MAXIMUM_VS_LEVEL
|
||||
: <a class="el" href="xdptx_8c.html#e6eee4e2ce424bf02c3d44751049dd11">xdptx.c</a><li>XDPTX_MIN_BYTES_PER_TU
|
||||
: <a class="el" href="xdptx__hw_8h.html#ef02dda0634e52791bb332de791a79c3">xdptx_hw.h</a><li>XDptx_MstCapable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#688ad3269be26bc021855c7f8353883e">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#688ad3269be26bc021855c7f8353883e">xdptx.h</a><li>XDptx_MstCfgModeDisable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#7615c8afb7181ef0857c8d2b6973499a">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#7615c8afb7181ef0857c8d2b6973499a">xdptx.h</a><li>XDptx_MstCfgModeEnable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d7e8bb68f2e7c81be8ffad72b57601ff">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d7e8bb68f2e7c81be8ffad72b57601ff">xdptx.h</a><li>XDptx_MstCfgStreamDisable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#026e20a4f7d12c3a0f6aa6b7ebcb9461">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#026e20a4f7d12c3a0f6aa6b7ebcb9461">xdptx.h</a><li>XDptx_MstCfgStreamEnable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#ac2290634f6866f2deb960f6714aff2e">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#ac2290634f6866f2deb960f6714aff2e">xdptx.h</a><li>XDptx_MstDisable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d743a4fa1c3ebd1170df1042339146b1">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d743a4fa1c3ebd1170df1042339146b1">xdptx.h</a><li>XDptx_MstEnable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#9e21cc5e80eee639bfcb6d86db3c63e2">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#9e21cc5e80eee639bfcb6d86db3c63e2">xdptx.h</a><li>XDptx_MstStreamIsEnabled()
|
||||
: <a class="el" href="xdptx__mst_8c.html#737c353ccd6a4700ac71cff76d28c8ce">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#737c353ccd6a4700ac71cff76d28c8ce">xdptx.h</a><li>XDPTX_N_VID
|
||||
: <a class="el" href="xdptx__hw_8h.html#40b298687646706b016e22b7519d307d">xdptx_hw.h</a><li>XDptx_Out32
|
||||
: <a class="el" href="xdptx__hw_8h.html#39834ac0d826fdaa966446d39b1a97d0">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#909e1ad4d3ae849d78d331c471804d51">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#8ff3d019a3104dca0dfa45a0697270c0">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#f7dee42d77f428cec3989fc828b81ed3">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#ec6b9d0b996375749169408532849bec">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT
|
||||
: <a class="el" href="xdptx__hw_8h.html#a7270cf68ce3b8f845ccf6b89c9135d7">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#5622d06b48c3c4c96b25a21f424ae1c7">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#584ab44ad86fd24b3981290ffa022199">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#f7b48bbf5ca5eb1c6ca2b523cf0c8b23">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG
|
||||
: <a class="el" href="xdptx__hw_8h.html#ee00fdff8d608902361ed005d801c701">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_GT_ALL_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ccf42d665ae494c6b7a6ededcaec80b2">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_GTTX_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fa7579fc809a60ec3496f2c75e462525">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_PHY_RESET_ENABLE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#42d9dd623a58b4c7345c8c8bb23324ae">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_PHY_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ae0c20e361280cace984f7fff18271b6">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_LOOPBACK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#93d0e79c17341380bc09c89b316be10d">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_PCS_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b35e97c559c06d99ec74a66d3e7dfe2e">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_PMA_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6c85c6919805d15697f133b970f6a0e">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_POLARITY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#024c99d0a0ffcb86dd4fe5c4e88ea540">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_PRBSFORCEERR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#12873f8f39c55f2d48d95228ff37c685">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e5b81223eb667878b6151112f01e768">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3ccfdda68d33b153eefc850d9c49608d">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#9c1918c4cf09a2e7ad9838e0bb643907">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4ed918656b38c2894d383fb1d772805">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#772b112773abd58fc447800c4633b218">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#d09fe9f8e8be3a0cee44b91b0757838d">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#97005b8c8e20a1217596d3c5f3f70861">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#0237557d5695285a1fffdc317e387727">xdptx_hw.h</a><li>XDPTX_PHY_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb3b0e07aab567eaecdcdb0eb03f7dda">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_ALL_LANES_READY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7af4dd4c3cef9ccfe2b2639aafb18dc3">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_LANES_0_1_READY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e60d69bceb3c528d9c64ed41a3500f16">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_PLL_FABRIC_LOCK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f896d8991398a60dc53829f0c6b2bd16">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_PLL_LANE0_1_LOCK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0fc3cb0054f5da72ec8d48c37f1a98d7">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_PLL_LANE2_3_LOCK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d3ebd8ed82e7a058fe9316d188a6ce5b">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_RESET_LANE_0_1_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a1952aa5d9dfa957d15d40ac4a85b529">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_RESET_LANE_2_3_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f84d3b4c7c14fb85fbc5c2c14bf84da7">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6ec37de0a0fae9a49eaf3de511f21291">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_0_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#5d7d100e512b2785c95904568279e629">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e493d23edd46802e827b1677f7ec8499">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_1_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1750bcb0b748cc4c109a34601ebf96bb">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a4f9c7c733040bdec4643394fbb60a54">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#96349a0e22577555da25a5297edfa434">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#47dc660534d5788f8927c45d106dde5c">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_3_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#62ab17a9750b25a397998988ca4f55d4">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#232b7f7ea4e71966ab580de9cd3e7517">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_0_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#4f81065b3916c89ee929dce240f02d9b">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0b8b858f3c7a7377835092630efa80db">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_1_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#b966164071f998546e576e3b6c486fc2">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ea0427b430f68d914d9af7780fd950e0">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1f3029c28bfb8bc5988bd1289e72f576">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#75ecafb568607e2c9ca2650c9c6bff4a">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_3_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#f854ad6f9cc39b4ab546b55da928df0a">xdptx_hw.h</a><li>XDPTX_PHY_TRANSMIT_PRBS7
|
||||
: <a class="el" href="xdptx__hw_8h.html#17591248b848e2189f6f6dc88c4552e3">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#8ec0c28f1bcbf7ae87a17250353d9dd4">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#5bc32f5c07c68da3d1881e75274e046b">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#bc51d2bd7578978c3013c52b7413f039">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#0c4906f061a6e2ab671899c9988067dc">xdptx_hw.h</a><li>XDptx_ReadReg
|
||||
: <a class="el" href="xdptx__hw_8h.html#a1d3c151b7379c97992cdc746d3730f3">xdptx_hw.h</a><li>XDptx_RemoteDpcdRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#333314b39c0f89f069e4af89b2f9bcb0">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#333314b39c0f89f069e4af89b2f9bcb0">xdptx.h</a><li>XDptx_RemoteDpcdWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#5497755a5ad4e92aeb4819804aebb336">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#5497755a5ad4e92aeb4819804aebb336">xdptx.h</a><li>XDptx_RemoteIicRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d33b578260cff02298873bb62a697876">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d33b578260cff02298873bb62a697876">xdptx.h</a><li>XDptx_RemoteIicWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#3926b013ecc4f15d82ef39d07447ae4a">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#3926b013ecc4f15d82ef39d07447ae4a">xdptx.h</a><li>XDPTX_REPLY_DATA_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#00ed008e4e760a23ab3bb10fa663b5e4">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#696c23464136b2079a88bfdfddec4e2b">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_ERROR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b2578bc099e54c1739f06247a20c223d">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_IN_PROGRESS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1efa31f973089cf945b12dafdcac231f">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_RECEIVED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5cdb033e7e35e695799d5e9891c5ae57">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_STATUS_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#68aa2b53fec77188e095759d63fe4e4f">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_STATUS_STATE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#a197dff781bf4b692800ff4c98ef3d47">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REQUEST_IN_PROGRESS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#96428e20ecb1f0b2ea5627003e101237">xdptx_hw.h</a><li>XDptx_ResetPhy()
|
||||
: <a class="el" href="xdptx_8h.html#ebfd44b68145676eebcc0d463c9b4d6f">xdptx.h</a>, <a class="el" href="xdptx_8c.html#ebfd44b68145676eebcc0d463c9b4d6f">xdptx.c</a><li>XDPTX_SBMSG_ALLOCATE_PAYLOAD
|
||||
: <a class="el" href="xdptx__hw_8h.html#f1b9029d4b16aabd54f8d5b74b5eae46">xdptx_hw.h</a><li>XDPTX_SBMSG_CLEAR_PAYLOAD_ID_TABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#a7bcf7812e5f6d765d363b802fd8809b">xdptx_hw.h</a><li>XDPTX_SBMSG_ENUM_PATH_RESOURCES
|
||||
: <a class="el" href="xdptx__hw_8h.html#483a0a53c4f307ad5b6e47caf10c9178">xdptx_hw.h</a><li>XDPTX_SBMSG_LINK_ADDRESS
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4335170bc8750b83750203b0a87e5cd">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_DPCD_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#8b5315409c2d30abff7e3e322c9f570f">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_DPCD_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#ea8c4585545f2b51870ad7e9fcea5fa9">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_I2C_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#b04757d807314d13ba01ff38436bde7c">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_I2C_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#484ed7aefe5f42b0373137e45b9b0131">xdptx_hw.h</a><li>XDPTX_SCRAMBLING_DISABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#46b765f85cf9ffe068bb1d8b7aaa0d0d">xdptx_hw.h</a><li>XDPTX_SEGPTR_ADDR
|
||||
: <a class="el" href="xdptx__hw_8h.html#c542c7550b8e1eda4c0f55522ab0dc85">xdptx_hw.h</a><li>XDptx_SelfTest()
|
||||
: <a class="el" href="xdptx__selftest_8c.html#0f3e36d00cbb3c9550cf880bb03cfea9">xdptx_selftest.c</a>, <a class="el" href="xdptx_8h.html#0f3e36d00cbb3c9550cf880bb03cfea9">xdptx.h</a><li>XDptx_SendSbMsgAllocatePayload()
|
||||
: <a class="el" href="xdptx__mst_8c.html#c8547de5fd9d0c04d024f8721f3ed8bb">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#c8547de5fd9d0c04d024f8721f3ed8bb">xdptx.h</a><li>XDptx_SendSbMsgClearPayloadIdTable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#46bdd4a2732e25bc1faeb119b399dacf">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#46bdd4a2732e25bc1faeb119b399dacf">xdptx.h</a><li>XDptx_SendSbMsgEnumPathResources()
|
||||
: <a class="el" href="xdptx__mst_8c.html#3f5e598656e5badca2846be6c1b068a0">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#3f5e598656e5badca2846be6c1b068a0">xdptx.h</a><li>XDptx_SendSbMsgLinkAddress()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d8fc0c473eaa6ad66997bac406c664ba">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d8fc0c473eaa6ad66997bac406c664ba">xdptx.h</a><li>XDptx_SendSbMsgRemoteDpcdRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#0e865810199439fc345dd4858e0e077c">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#0e865810199439fc345dd4858e0e077c">xdptx.h</a><li>XDptx_SendSbMsgRemoteDpcdWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#22edd6fd3495a31fab9e0397161e76d3">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#22edd6fd3495a31fab9e0397161e76d3">xdptx.h</a><li>XDptx_SendSbMsgRemoteIicRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d848e62d19c981547a4d301cee71c0ba">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d848e62d19c981547a4d301cee71c0ba">xdptx.h</a><li>XDptx_SendSbMsgRemoteIicWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#8c528a3f1c067232e9359f1006271c32">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#8c528a3f1c067232e9359f1006271c32">xdptx.h</a><li>XDptx_SetDownspread()
|
||||
: <a class="el" href="xdptx_8h.html#b030d699fd11a5691295ac4ab3c48c27">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b030d699fd11a5691295ac4ab3c48c27">xdptx.c</a><li>XDptx_SetEnhancedFrameMode()
|
||||
: <a class="el" href="xdptx_8h.html#92d90bd5e3b79ba1ba2da23815af3de9">xdptx.h</a>, <a class="el" href="xdptx_8c.html#92d90bd5e3b79ba1ba2da23815af3de9">xdptx.c</a><li>XDptx_SetHasRedriverInPath()
|
||||
: <a class="el" href="xdptx_8h.html#b93d01339bd8c577ea22804786ce3c28">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b93d01339bd8c577ea22804786ce3c28">xdptx.c</a><li>XDptx_SetHpdEventHandler()
|
||||
: <a class="el" href="xdptx__intr_8c.html#af4bdfbe0785e1d0ec3d80edec1a86cb">xdptx_intr.c</a>, <a class="el" href="xdptx_8h.html#af4bdfbe0785e1d0ec3d80edec1a86cb">xdptx.h</a><li>XDptx_SetHpdPulseHandler()
|
||||
: <a class="el" href="xdptx__intr_8c.html#2ab1eec64ba571d155e56bb433fea5bf">xdptx_intr.c</a>, <a class="el" href="xdptx_8h.html#2ab1eec64ba571d155e56bb433fea5bf">xdptx.h</a><li>XDptx_SetLaneCount()
|
||||
: <a class="el" href="xdptx_8h.html#115ea420baf50627b248038ef176a068">xdptx.h</a>, <a class="el" href="xdptx_8c.html#115ea420baf50627b248038ef176a068">xdptx.c</a><li>XDptx_SetLinkRate()
|
||||
: <a class="el" href="xdptx_8h.html#83816bbeac40d06d6fc9e37e310b0fce">xdptx.h</a>, <a class="el" href="xdptx_8c.html#83816bbeac40d06d6fc9e37e310b0fce">xdptx.c</a><li>XDptx_SetMsaValues()
|
||||
: <a class="el" href="xdptx__spm_8c.html#93def464f8e63597dfde42ea658ec2a6">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#93def464f8e63597dfde42ea658ec2a6">xdptx.h</a><li>XDptx_SetScrambler()
|
||||
: <a class="el" href="xdptx_8h.html#2725860ddb4c74bf0abca8878dd987b3">xdptx.h</a>, <a class="el" href="xdptx_8c.html#2725860ddb4c74bf0abca8878dd987b3">xdptx.c</a><li>XDptx_SetStreamSelectFromSinkList()
|
||||
: <a class="el" href="xdptx__mst_8c.html#8363e32d51c93e25b85a802b70a3715c">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#8363e32d51c93e25b85a802b70a3715c">xdptx.h</a><li>XDptx_SetStreamSinkRad()
|
||||
: <a class="el" href="xdptx__mst_8c.html#f4716adc915bedad28b2bf0b1d7bd4fa">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#f4716adc915bedad28b2bf0b1d7bd4fa">xdptx.h</a><li>XDptx_SetUserTimerHandler()
|
||||
: <a class="el" href="xdptx_8h.html#2ccd64b33b2bd65423338312aa2977b5">xdptx.h</a>, <a class="el" href="xdptx_8c.html#2ccd64b33b2bd65423338312aa2977b5">xdptx.c</a><li>XDptx_SetVideoMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#1c1894cfa6ff7425bb8cdfa19847cd38">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#1c1894cfa6ff7425bb8cdfa19847cd38">xdptx.h</a><li>XDPTX_SOFT_RESET
|
||||
: <a class="el" href="xdptx__hw_8h.html#1642355960359ffea40e5478d0a6e206">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_AUX_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#eef2a4cf42a4d1d7408ce01ecefb94b1">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e5442e6a414c29b253947f9514802712">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d3a6ffdb2ad1e9ae8c38ab05c74af0df">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c05636cb103256a31e4bfc1b3261d322">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a58d4d2106e80b56a81a90b3a7d45f82">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b146c86e6453f74674fdaf21d4b0c54c">xdptx_hw.h</a><li>XDPTX_STREAM1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4088488d81460880094e01800f07439">xdptx_hw.h</a><li>XDPTX_STREAM1_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#2b82e26783f47f29574117ea62c34f78">xdptx_hw.h</a><li>XDPTX_STREAM2
|
||||
: <a class="el" href="xdptx__hw_8h.html#9fbb68c3e0908297f948163be6885141">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#ecc95afdc6f83c73fc875db4befebd6d">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#cbd281b359e81aeb0061598c1e6b702a">xdptx_hw.h</a><li>XDPTX_STREAM3
|
||||
: <a class="el" href="xdptx__hw_8h.html#eeeab96e9257636758cdc0a39ff0cd98">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#84ff5adeaa0209c64054caeb10a6aeb7">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#db003520dc786be3da092a62c40469fb">xdptx_hw.h</a><li>XDPTX_STREAM4
|
||||
: <a class="el" href="xdptx__hw_8h.html#ca743990bdc34da02e9645c7a39368da">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#ae5d853532eb62707a2edd7ee4554b48">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#2b9f5cf2a4c0f2357e370ae7a81a647f">xdptx_hw.h</a><li>XDPTX_STREAM_ID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#136254a14cb3ffae2bdd65cea222dcc1">xdptx_hw.h</a><li>XDPTX_STREAM_ID2
|
||||
: <a class="el" href="xdptx__hw_8h.html#6bb82a4f4c217be4cd683765eb227b52">xdptx_hw.h</a><li>XDPTX_STREAM_ID3
|
||||
: <a class="el" href="xdptx__hw_8h.html#8c395648124690c2fabe7b3e71472c11">xdptx_hw.h</a><li>XDPTX_STREAM_ID4
|
||||
: <a class="el" href="xdptx__hw_8h.html#6d96f8584a1912b8d004580ec4ba3f3c">xdptx_hw.h</a><li>XDptx_TimerHandler
|
||||
: <a class="el" href="xdptx_8h.html#1cc5fb6d828593d0e83a4fe44eb0d87d">xdptx.h</a><li>XDptx_TopologySortSinksByTiling()
|
||||
: <a class="el" href="xdptx__mst_8c.html#b6b286732cdad782f909c9461ea0f508">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#b6b286732cdad782f909c9461ea0f508">xdptx.h</a><li>XDptx_TopologySwapSinks()
|
||||
: <a class="el" href="xdptx__mst_8c.html#ec0c3b81cece2bd4e51188e2bb50f13b">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#ec0c3b81cece2bd4e51188e2bb50f13b">xdptx.h</a><li>XDPTX_TRAINING_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#abf4477645c65c9cef415a7d8e660f37">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#43dbd071ae47dc1f9c497fd6fc567ed9">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#6ba7710636d2779f80b6d54acbe9816d">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP2
|
||||
: <a class="el" href="xdptx__hw_8h.html#ba7639f88df19838f71f0e0bd5e6724f">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP3
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c7802b55671487663ec44628d423083">xdptx_hw.h</a><li>XDptx_TrainingState
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc">xdptx.c</a><li>XDPTX_TS_ADJUST_LANE_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc609bd01c745f033f32c82c0fb52a3c60">xdptx.c</a><li>XDPTX_TS_ADJUST_LINK_RATE
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc7200a113edaf8dfede43332ce872e9fa">xdptx.c</a><li>XDPTX_TS_CHANNEL_EQUALIZATION
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc4c50764533825a3e6e42e33367307f3f">xdptx.c</a><li>XDPTX_TS_CLOCK_RECOVERY
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcca132a70157b0136fc4a82cf6520fa078">xdptx.c</a><li>XDPTX_TS_FAILURE
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc892dc74b9b1182db65bee447b81a11be">xdptx.c</a><li>XDPTX_TS_SUCCESS
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc46d5b11d65003735591c8cd0ffb46c78">xdptx.c</a><li>XDPTX_TU_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#636b945926097deba9547fe7b03523a6">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_CHANNELS
|
||||
: <a class="el" href="xdptx__hw_8h.html#c37ba2f83438eeaf5330caba081b6394">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_CONTROL
|
||||
: <a class="el" href="xdptx__hw_8h.html#e7e52836b88c1f705ff8841adffb51c5">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_EXT_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#c7f55a04726ce5ab66d997aa3d398e5e">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_INFO_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d4932d0e30b72d83325ed1f0eff1dc0">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_MAUD
|
||||
: <a class="el" href="xdptx__hw_8h.html#b733bc0cbec6dc730f6284e30840a3f8">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_NAUD
|
||||
: <a class="el" href="xdptx__hw_8h.html#59f322babeebcbbcad569d2b383a7108">xdptx_hw.h</a><li>XDPTX_TX_MST_CONFIG
|
||||
: <a class="el" href="xdptx__hw_8h.html#5bf07ac629dc495d714ec07e9a4fc806">xdptx_hw.h</a><li>XDPTX_TX_MST_CONFIG_MST_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b7902be94504708df920d36507121d1e">xdptx_hw.h</a><li>XDPTX_TX_MST_CONFIG_VCP_UPDATED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#62e6792433828be3c4cd4a2077fe5326">xdptx_hw.h</a><li>XDPTX_TX_PHY_POWER_DOWN
|
||||
: <a class="el" href="xdptx__hw_8h.html#8881b088b8a5558394e6b87927c29cc5">xdptx_hw.h</a><li>XDPTX_TX_USER_FIFO_OVERFLOW
|
||||
: <a class="el" href="xdptx__hw_8h.html#87853c5f9b5899fef2ff4ab284bcfe97">xdptx_hw.h</a><li>XDPTX_USER_DATA_COUNT_PER_LANE
|
||||
: <a class="el" href="xdptx__hw_8h.html#878e506f4f5d3177baddd2c56b779b93">xdptx_hw.h</a><li>XDPTX_USER_PIXEL_WIDTH
|
||||
: <a class="el" href="xdptx__hw_8h.html#82d867d418c722d84dccf08c1c01cfb6">xdptx_hw.h</a><li>XDPTX_VC_PAYLOAD_BUFFER_ADDR
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e6ace0b3fe51be13d0aeefaec243858">xdptx_hw.h</a><li>XDPTX_VCP_TABLE_MAX_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx__mst_8c.html#b516e7ba6e3f491adc2e4d1ebf4ff523">xdptx_mst.c</a><li>XDPTX_VERSION
|
||||
: <a class="el" href="xdptx__hw_8h.html#6cdb6837074419af7219b993aafdd99c">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_PATCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3a86f4228ec12b11d77c495357e525a4">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_PATCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#41b287e0186563f32e0eec73bbddb9e5">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MJR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4155853cd5299448486c8af9c9e6b684">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MJR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1ad5d795efdae37b737554923539777f">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MNR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#2f996c450c159ac2d847ce2a2f6eaa0c">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MNR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#975cfa9b69ab4b8453c2893f14490fbf">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_REV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#62bf4dcfe2bde9aec0cbc48d2354c5c5">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_REV_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#3f43cd7e650b361eb8fd770282986294">xdptx_hw.h</a><li>XDPTX_VERSION_INTER_REV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5ed072718def374278356cc09991040a">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#89b7fb18ad910ec87a3cf22bc23cb330">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#09abef92c48d26ec02ec8e2994261515">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#914468805a969d87fbf657b43387a0be">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#e12265176bac83d51fd9c59e24fec3d7">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#f8505935c3db7e5bbe14b6fd706cfc11">xdptx_hw.h</a><li>XDptx_WaitUs()
|
||||
: <a class="el" href="xdptx_8h.html#6c460b31a3226815a96543e9c4c161fe">xdptx.h</a>, <a class="el" href="xdptx_8c.html#6c460b31a3226815a96543e9c4c161fe">xdptx.c</a><li>XDptx_WriteGuid()
|
||||
: <a class="el" href="xdptx__mst_8c.html#3db9ce86a190354ab3c671faf5991a8f">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#3db9ce86a190354ab3c671faf5991a8f">xdptx.h</a><li>XDptx_WriteReg
|
||||
: <a class="el" href="xdptx__hw_8h.html#44d7211deaaad4f7592a61adf0b4d3cd">xdptx_hw.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
665
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_defs.html
Executable file
665
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_defs.html
Executable file
|
|
@ -0,0 +1,665 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li id="current"><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals_defs.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_x">- x -</a></h3><ul>
|
||||
<li>XDPTX_AUX_ADDRESS
|
||||
: <a class="el" href="xdptx__hw_8h.html#ef28ace5390d018381c44b4c93c1cf6e">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER
|
||||
: <a class="el" href="xdptx__hw_8h.html#b085b0eb13592c155bfe3e6932a15cce">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER_AUX_SIG_WIDTH_FILT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#256c4dc0f04dc61a37e4513576d3b15d">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER_AUX_SIG_WIDTH_FILT_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1bdc93d900d56dc734a9952abd04d357">xdptx_hw.h</a><li>XDPTX_AUX_CLK_DIVIDER_VAL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4fe1ec40f3824ebed89671597f4c7a47">xdptx_hw.h</a><li>XDPTX_AUX_CMD
|
||||
: <a class="el" href="xdptx__hw_8h.html#3766f2f4d3e535097e76149d85cf0832">xdptx_hw.h</a><li>XDPTX_AUX_CMD_ADDR_ONLY_TRANSFER_EN
|
||||
: <a class="el" href="xdptx__hw_8h.html#f26422aba2aac6856f7505a8aea074a1">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#387d09b2135001a8780ca728f4ee4473">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_READ_MOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#b7d527a8d91542840a22551a35db1f0d">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#1ad73ffce6b0af3206db7d9257809905">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE_MOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#809f0e7e6abdb3c442652e48466765ff">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#b41d3af8ac6b8aa6d8a94b13d1f79163">xdptx_hw.h</a><li>XDPTX_AUX_CMD_I2C_WRITE_STATUS_MOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d0de53f660dbc3ce8fec8a8275bf71d8">xdptx_hw.h</a><li>XDPTX_AUX_CMD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#584cbb2f66de91dbcef0682cb848a8e7">xdptx_hw.h</a><li>XDPTX_AUX_CMD_NBYTES_TRANSFER_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e4c8f97e06dbf0700302776c094fb4b8">xdptx_hw.h</a><li>XDPTX_AUX_CMD_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#376f09e8e7461b8c2406ad7672517172">xdptx_hw.h</a><li>XDPTX_AUX_CMD_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#6b0faa3339996257e0e4c5547518267c">xdptx_hw.h</a><li>XDPTX_AUX_CMD_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#1a3e99fddab799fad355458b30c1ef33">xdptx_hw.h</a><li>XDPTX_AUX_MAX_DEFER_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#24424437a73cf172a7fb44ccfc5c5721">xdptx.c</a><li>XDPTX_AUX_MAX_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#eec1e2b97ff0cb2443757ddd87a60f5a">xdptx.c</a><li>XDPTX_AUX_REPLY_CODE
|
||||
: <a class="el" href="xdptx__hw_8h.html#dc0adab369e4b87b0bc46604a95e2f11">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_ACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#99177d5882b7fee7dd5bc97e03cb05a0">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_DEFER
|
||||
: <a class="el" href="xdptx__hw_8h.html#82da5326526cce4ed1999976a1c6ac19">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_I2C_ACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#04f2853300ee8c6898db53949257b101">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_I2C_DEFER
|
||||
: <a class="el" href="xdptx__hw_8h.html#88a375159cb8586a610a794199137729">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_I2C_NACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f567cac6032afeaec8c117b13be34821">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_CODE_NACK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a1b2839bc0fd02fcd4b97d9d349b2992">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#56285438f78c5c47f1cf91a5fec40f72">xdptx_hw.h</a><li>XDPTX_AUX_REPLY_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#a163b6c030b44373d60840a406d6fe6e">xdptx_hw.h</a><li>XDPTX_AUX_WRITE_FIFO
|
||||
: <a class="el" href="xdptx__hw_8h.html#5d0c38ef868bab03b795aceadd7830b6">xdptx_hw.h</a><li>XDPTX_CORE_ID
|
||||
: <a class="el" href="xdptx__hw_8h.html#ee7163543e09d183451dad6da0e18829">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MJR_VER_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d488a646ac9f8879590723a51ef1a566">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MJR_VER_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#c7dd35de3ed114cdbcf2811509821008">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MNR_VER_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#467db5e22f86036031ed516afb0f7157">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_MNR_VER_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#331aed29139430b5e3b5ff189c8d1378">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_REV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e140ce3c9f5e0ac26306483a7ce2bcd">xdptx_hw.h</a><li>XDPTX_CORE_ID_DP_REV_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d23d382537c5945936a0c1864738c05f">xdptx_hw.h</a><li>XDPTX_CORE_ID_TYPE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3bce075884b67bd03350a4def35e4df9">xdptx_hw.h</a><li>XDPTX_CORE_ID_TYPE_RX
|
||||
: <a class="el" href="xdptx__hw_8h.html#c8ecc5b34e6c74640c776f9507da8451">xdptx_hw.h</a><li>XDPTX_CORE_ID_TYPE_TX
|
||||
: <a class="el" href="xdptx__hw_8h.html#285d8cb635a1701e6dd4d631a20d538a">xdptx_hw.h</a><li>XDPTX_DISPID_DB_SEC_REV
|
||||
: <a class="el" href="xdptx__hw_8h.html#6ca7ac1ba3917bb4cb4d77b2ae87ca98">xdptx_hw.h</a><li>XDPTX_DISPID_DB_SEC_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#8f68f52ce68c5aed08f1d7009c98dbc7">xdptx_hw.h</a><li>XDPTX_DISPID_DB_SEC_TAG
|
||||
: <a class="el" href="xdptx__hw_8h.html#912b6764be5ed4f08e71b971e8b9b3d3">xdptx_hw.h</a><li>XDPTX_DISPID_EXT_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#fff7bcc8d397f10cecb9a90340dd88ac">xdptx_hw.h</a><li>XDPTX_DISPID_PAYLOAD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#562b191e60bb4ff9d00fbc62da2527fc">xdptx_hw.h</a><li>XDPTX_DISPID_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#c95ee28631f340244b8f481268b94b15">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_HSIZE0
|
||||
: <a class="el" href="xdptx__hw_8h.html#b6522fb1c3b93be90b0a17e33bc2d41f">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_HSIZE1
|
||||
: <a class="el" href="xdptx__hw_8h.html#1f24166a37a0a80ccddac64f3d6dd26b">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_PCODE0
|
||||
: <a class="el" href="xdptx__hw_8h.html#6764fbf867217645acdfd61175f1eda5">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_PCODE1
|
||||
: <a class="el" href="xdptx__hw_8h.html#da44cbb9fde6d28c62b944cfe2cd9c6b">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN0
|
||||
: <a class="el" href="xdptx__hw_8h.html#3c66618902528afacf30386916d2b26a">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN1
|
||||
: <a class="el" href="xdptx__hw_8h.html#c6b7b43b55460580b0f4b12fb67c2805">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN2
|
||||
: <a class="el" href="xdptx__hw_8h.html#bc0694659cbae73e4436a59f7faa66b3">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_SN3
|
||||
: <a class="el" href="xdptx__hw_8h.html#f2d7ec7434fd6b13396896f741fe38d0">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TAG
|
||||
: <a class="el" href="xdptx__hw_8h.html#d035a9e26770fd7ecd637ae1800e3bf1">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0
|
||||
: <a class="el" href="xdptx__hw_8h.html#85a8fbe9dde44683e4bb750bbe5874ef">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0_HTOT_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f123f3012fbc23896ddfa6318692e67c">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0_HTOT_L_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#3e4f8ba68afc0ee3b18810607e0ddc65">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP0_VTOT_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ea7b7386496998e9176a203524e5a6f9">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#4fda2211d1024d165f60d02b1eac14e0">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1_HLOC_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f43fb576310551b94788ba81b5a8cd50">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1_HLOC_L_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#77a88c39775447984a70f33d35f7c41c">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP1_VLOC_L_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0d891ba2f78ed619241c3ecab4df3abc">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6c6ef416641384948bef1951bb39e07">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HLOC_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#9b1793b382b2cb0cf84b81eb4977515e">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HLOC_H_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d2733bcc60a3805db72f3a4270e632ae">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HTOT_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#80347114e59f83ab82b46a825678e6fb">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_HTOT_H_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#9cc2cd8f05664b5baef3c894864f991d">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_VLOC_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#888f67be4526e1d0eee224eb922de823">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_VTOT_H_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3474298bced86150a839b540e6dd76f3">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_TOP2_VTOT_H_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#c51fd0b94b202625e44ee8e0eaf058e6">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VENID0
|
||||
: <a class="el" href="xdptx__hw_8h.html#2678a80a5e85b73f2bd8f42ed2e80918">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VENID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#b9dae3f6bf84f77a79d983efbc592643">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VENID2
|
||||
: <a class="el" href="xdptx__hw_8h.html#148bdf4689a6d11f40abc47c47531f4b">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VSIZE0
|
||||
: <a class="el" href="xdptx__hw_8h.html#3614de866a91c8ae966258a4ff983a25">xdptx_hw.h</a><li>XDPTX_DISPID_TDT_VSIZE1
|
||||
: <a class="el" href="xdptx__hw_8h.html#a456f064def30373a7856a8c0a5b3fd0">xdptx_hw.h</a><li>XDPTX_DISPID_TYPE
|
||||
: <a class="el" href="xdptx__hw_8h.html#f1fbc48f8ec7b4055ac41c8644097795">xdptx_hw.h</a><li>XDPTX_DISPID_VER_REV
|
||||
: <a class="el" href="xdptx__hw_8h.html#b5850d213e43bf4cee57335b2b59886e">xdptx_hw.h</a><li>XDPTX_DOWNSPREAD_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d7314efe73c45ba07580ea59f5a418f">xdptx_hw.h</a><li>XDPTX_DPCD_ADAPTER_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#a3aa3f5913969cec5a47a558c6017613">xdptx_hw.h</a><li>XDPTX_DPCD_ADAPTER_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#c64ca43b89612663c8844abeeeec7e78">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c8bce31401ffa566d21aa92ebae8623">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_2_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0087e699f6242cd83d73340f1e05410f">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_2_PE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#7026a1a306485ce723a85b54fd94a63a">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_0_2_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c24be80c2abb9b9bbd217646a02b1d5">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8bb029a51b57b35a27cbecf180e0d1d2">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_PE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#04057aeb36ca3ca804d9d6d8bdc0c258">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#07af664a8112081d206388bcbfd79bbe">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_1_3_VS_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#31b4aee3d0ccaddc27bbe7a9518a55f0">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_LANE_2_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#5d20270033f656741e29817c29fd149b">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4865f9c9f8c065fda7e42b413714c8e">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#48c0a442bcd56fdd24ffc713d1d99b51">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e597fbd6e66e6186b313aef984a90ec1">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_1_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#75971ac529167738afea8dbc0fa10579">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0e516a73f6632cd5e8e2af8f5ee2800d">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#4f188c5a087587cac75ebc446ae72b27">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#bd185bd8b26a1373fcbe23c27c9fab5b">xdptx_hw.h</a><li>XDPTX_DPCD_ADJ_REQ_PC2_LANE_3_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#539bfd061ea3ef3a3d3ea4ea01fc6e31">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEC_LAT_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#6b22757e5dcb07cee3d0ad639986fdea">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEC_LAT_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#d0e92e23dd2e8aa02696b792c7f711b8">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEL_INS_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#2662fd71600d4703a37b98ff173b520b">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEL_INS_23_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#683ac84d712d823ed5a117813f4e5064">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_DEL_INS_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#860d16627dc599f9259d7336e6d3ddb2">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_PP_LAT_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#c04f6e977d538150872c7f44a2b10787">xdptx_hw.h</a><li>XDPTX_DPCD_AUD_PP_LAT_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#453da42a77d9ac39649834c3c7f5a0ac">xdptx_hw.h</a><li>XDPTX_DPCD_AUDIO_DELAY_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#60ca3f4a60ca5a126ffe7b585afeb897">xdptx_hw.h</a><li>XDPTX_DPCD_AUDIO_DELAY_23_6
|
||||
: <a class="el" href="xdptx__hw_8h.html#054ccfce51b06605b2261aa994d8d21b">xdptx_hw.h</a><li>XDPTX_DPCD_AUDIO_DELAY_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#1e6d3a37e680eebeb7440a020d6d3375">xdptx_hw.h</a><li>XDPTX_DPCD_AV_GRANULARITY
|
||||
: <a class="el" href="xdptx__hw_8h.html#af4e55eb6dcfe7d15a471ac89a57b976">xdptx_hw.h</a><li>XDPTX_DPCD_BACK_CH_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#42db2dafc46e7229b1d9d9214398ac76">xdptx_hw.h</a><li>XDPTX_DPCD_BRANCH_DEVICE_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb0348881ec67b88fbb1bf041e2ce6c7">xdptx_hw.h</a><li>XDPTX_DPCD_DEVICE_SERVICE_IRQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff46f7b53d9db083faf5cd32dfbba656">xdptx_hw.h</a><li>XDPTX_DPCD_DOWN_REP
|
||||
: <a class="el" href="xdptx__hw_8h.html#799361f0a9fff72c0b8a00b980487426">xdptx_hw.h</a><li>XDPTX_DPCD_DOWN_REQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#7f2c19b7f70266fd7704966bbbcbc282">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_0_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff680cf70bcaa0559253b386d8fc7289">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_0_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#9ff31b9da333f29dfb2ae1c53f96201c">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_1_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#ec758b5045ea114cf666ab7f796ce942">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_1_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#e913243d128a6d769090a4d9aaded02d">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_2_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#035362bee9cdb86a67cbf6583eb3b25e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_2_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#71dd52a67e42f08871b12177683225e9">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_3_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d084f30cbfa4b7b9cc551c0837d7fa7">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_3_DET_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#9f812c0901062c30d045b5a8aaadae2b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_COUNT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#573e69226083c3219554f8d6d9e9ee19">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_COUNT_MSA_OUI
|
||||
: <a class="el" href="xdptx__hw_8h.html#1a9a7f59c92a6f4ee0ab8659cc391918">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_DCAP_INFO_AVAIL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8dd87b80e4fa6bbfac688ca0117ace5b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_FORMAT_CONV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb9c63c2f5266f600bdaf717d187d50e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_PRESENT
|
||||
: <a class="el" href="xdptx__hw_8h.html#11f7a316506b29ff631cb38621412bda">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_PRESENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f9414c6a2fdf3c24d16b7171886899b0">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_AVGA_ADVII
|
||||
: <a class="el" href="xdptx__hw_8h.html#8762f7f992b2166e68374a36ee685a32">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_DP
|
||||
: <a class="el" href="xdptx__hw_8h.html#44b7819429a47897a3ae60a4cffb7a0a">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_DVI_HDMI_DPPP
|
||||
: <a class="el" href="xdptx__hw_8h.html#2dbdb4e7a32184ebe681e0c3aaa6e968">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6043dca80d5be7d0538d9791043d685f">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_OTHERS
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c4b1d4a644a24b2222d701ad476f468">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_TYPE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#390d55253cac7da25d27c7a453c2342f">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_HPD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#45a5519eb6dbe23a515a49d2f903e8a5">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1280_720_P_50
|
||||
: <a class="el" href="xdptx__hw_8h.html#ba9fe2784c54f18ef1d831cec50d42c7">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1280_720_P_60
|
||||
: <a class="el" href="xdptx__hw_8h.html#e0143eb2065072f6660ef524ca99868c">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1920_1080_I_50
|
||||
: <a class="el" href="xdptx__hw_8h.html#faa35eccf2a0f2f45e8e67c31a4ddd14">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1920_1080_I_60
|
||||
: <a class="el" href="xdptx__hw_8h.html#873ab083295961f23ee5c52298ce713b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_720_480_I_50
|
||||
: <a class="el" href="xdptx__hw_8h.html#b00fd7214a692cd521974b69aca7665e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_720_480_I_60
|
||||
: <a class="el" href="xdptx__hw_8h.html#e07dc03e13bfd262c55287f638963c82">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#280effba58556e2edb9b6904a74ebdc0">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#453579a385b3889d7ebd94c82a4e7d12">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_AVGA
|
||||
: <a class="el" href="xdptx__hw_8h.html#35fc140c32db4a744e848470547b872b">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_DP
|
||||
: <a class="el" href="xdptx__hw_8h.html#e2eed172bff3de833cbf8df1529264bd">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_DPPP
|
||||
: <a class="el" href="xdptx__hw_8h.html#4af82b4168e6c9095f2cd762f7ddd9b4">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_DVI
|
||||
: <a class="el" href="xdptx__hw_8h.html#99722442a4d41d432adadc662d2d4290">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_HDMI
|
||||
: <a class="el" href="xdptx__hw_8h.html#f280a9705c077cfdfdcab8e686bd48e7">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8915b44f437ede717e00275811721c58">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_CAP_TYPE_OTHERS
|
||||
: <a class="el" href="xdptx__hw_8h.html#6737acbb69c94dda0767aa48f67a99e5">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_DVI_DL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e1c3f30e8c17a182f54d3b1e220e2cf5">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_DVI_HCD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c9e8e5780d595fe58b4c4b00ce88bb1e">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_HDMI_DPPP_FS2FP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#067ea715ec39bb6bee120406c6b8fba8">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_10
|
||||
: <a class="el" href="xdptx__hw_8h.html#a37425e236d64e2db11868e408b1e577">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_12
|
||||
: <a class="el" href="xdptx__hw_8h.html#876781ddac3aad6aef9d54999329fe7f">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#b6ae5e24fa88203c893c51d721602f68">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#9d0afc4cad326c0530372acbac73a754">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSP_X_DCAP_MAX_BPC_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#da4a6f12a50ba8886821c79fed4c67c9">xdptx_hw.h</a><li>XDPTX_DPCD_DOWNSPREAD_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#230e672dd8c3c78536de84315c9e3bd4">xdptx_hw.h</a><li>XDPTX_DPCD_EDP_CFG_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#eb8ffa0e35cbd37d762e32676c928629">xdptx_hw.h</a><li>XDPTX_DPCD_EDP_CFG_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#9b102ba2776dd6679b5fcb79ab21e950">xdptx_hw.h</a><li>XDPTX_DPCD_ENHANCED_FRAME_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#afe9c144ccb5f8f5e8891ee26e5ab3b0">xdptx_hw.h</a><li>XDPTX_DPCD_ENHANCED_FRAME_SUPPORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0aaabb8cf6918f1a2d90f2229f1c3b39">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_DRIVE_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#92946c10808462d70483d40ea84ff5df">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_SYM_ERR_COUNT_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#5e716445788a4606e633239557e02908">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_SYMBOL_ERROR_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1593885d053a8171050df64b8fbd535d">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_BACK_CH_TRAINING_PATTERN_TIME
|
||||
: <a class="el" href="xdptx__hw_8h.html#3cbf3fe86b7c5a047d5f2931802b5de4">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#fced383aef9bd85e603d96a8844eccfe">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_CAP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4a3d5b4acf04d4df8e5df74bd54d4fb">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_FORWARD_CH_DRIVE_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#c84d404a7b27d5e0844d03ace51a3e18">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_FORWARD_CH_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#51a5145e4160592555278c7a4a40657a">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_FORWARD_CH_SYMBOL_ERROR_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#f80117dd505977a78f0bd9d1d0236929">xdptx_hw.h</a><li>XDPTX_DPCD_FAUX_MODE_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#d2b5c2c2a3f81ac8fac3f52a2ed5f1c1">xdptx_hw.h</a><li>XDPTX_DPCD_GUID
|
||||
: <a class="el" href="xdptx__hw_8h.html#64f9139d99683e3b1a5f1d4f425bceb4">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_100KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a0311f344efa2a81a639d709795efadb">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_10KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6d16d3a8051785865e7462fbf837f5f">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_1KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#e3ff10e311f2b8ca8f0d55d86496884a">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_1MBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#dbdd34beed6f5dcdd7a1bba23ef08a1e">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_400KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a97b0b25239da828620c8aabec0c7211">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_5KBIPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#c62ca1b5535924a1eab5df407d187271">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#e65ef48bf9f52a5112b7a9ba9eb82374">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_NONE
|
||||
: <a class="el" href="xdptx__hw_8h.html#3b6fe1ee845016de1816cb166817a22f">xdptx_hw.h</a><li>XDPTX_DPCD_I2C_SPEED_CTL_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#3109d81022878039797788b3334c7db5">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED
|
||||
: <a class="el" href="xdptx__hw_8h.html#895d00af74b9999362523ac0c1e37e4b">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED_DOWNSP_STATUS_CHANGED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#291fcce612161ed5b19f8d055732c051">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED_IA_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d7872eb2100bc5f2f6894fe28df1a4d8">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_ALIGN_STATUS_UPDATED_LINK_STATUS_UPDATED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#86cbb0c5ed85e7dfa348d3e8c3c837a7">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#f632ca1437f240e8bc63458884535628">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e18010b25f853a2e8c5c6f33e7ba496">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#4eb9fa224984d48accc35d482c418b52">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_4
|
||||
: <a class="el" href="xdptx__hw_8h.html#d33160fafa12c7e60ada3832003492dd">xdptx_hw.h</a><li>XDPTX_DPCD_LANE_COUNT_SET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8b09ca30bc0692989a2cff44bf8f78ce">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#92ea790907817798e73b848fb9c07cec">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#fa2ec41da25eef9575240cb0cabc8f57">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#5ec43c75fae423a51c8238a42ddb9e79">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_BW_SET_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#33df4753aefb80d7232614a4f2075341">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_CFG_FIELD_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#89827ad11f16d827e54264fb77f76c46">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_CFG_FIELD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#fda6d2d176ee1c9dfebcc9e04ae362fa">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE0_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#b66e056707d1bdb71f050fa2df99ec3d">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE1_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#09598c07067bdeae9ec39ee23f9a6336">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE2_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#5a74723bf3835e5e964dc80d6df4e43f">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_QUAL_LANE3_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#e7a35574b8dd1c8f2a5c87e5c3423fe4">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_SINK_STATUS_FIELD_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#d1af78da67d30387e97e5c72c1115221">xdptx_hw.h</a><li>XDPTX_DPCD_LINK_SINK_STATUS_FIELD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#87fed4c1ef79079bc4bd28be6cf76129">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_DOWNSPREAD
|
||||
: <a class="el" href="xdptx__hw_8h.html#8efffeebf215d058830a2ed5d47fdbf2">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_DOWNSPREAD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fa51d7957cab5f3e5a9be7f36c922a23">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#d9a12078ce929fae31606d229a770728">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4833aec4d4e00a7dfff6abe7665ef3a">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#99be9f951fc7679f27aa9323f7739d7d">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_4
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d450c41879a9df654ba0b634ee99dbb">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LANE_COUNT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#820d2a44cb464c1fcffb35552c7a89e8">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE
|
||||
: <a class="el" href="xdptx__hw_8h.html#d31318ecdfa6e6d348f255a05e87982d">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#85d167953f706f372255a80c5414ee18">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#2ead0879a7035ba1ae212e4d8c158615">xdptx_hw.h</a><li>XDPTX_DPCD_MAX_LINK_RATE_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#ae36adb66ce773ed16ee9b2c281e715d">xdptx_hw.h</a><li>XDPTX_DPCD_ML_CH_CODING_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#5589e577989a936ad0bd999699c322db">xdptx_hw.h</a><li>XDPTX_DPCD_ML_CH_CODING_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d0890e5f9f2b8e85e593369692f6abae">xdptx_hw.h</a><li>XDPTX_DPCD_ML_CH_CODING_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#76b15516363d7225c8da712427687a63">xdptx_hw.h</a><li>XDPTX_DPCD_MSA_TIMING_PAR_IGNORED_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c55f8ea40c08519adab044f72c1bae98">xdptx_hw.h</a><li>XDPTX_DPCD_MSA_TIMING_PAR_IGNORED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#678ac9965da7bbe16f5431950d138891">xdptx_hw.h</a><li>XDPTX_DPCD_MST_CAP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#2294ad91fed2668f2b2b4d509f2fffb0">xdptx_hw.h</a><li>XDPTX_DPCD_MST_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#67483228aa1d8c2f66614554bdf6c744">xdptx_hw.h</a><li>XDPTX_DPCD_MSTM_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#bfc4b4455c9671abe6d44ffe3f08da31">xdptx_hw.h</a><li>XDPTX_DPCD_MSTM_CTRL
|
||||
: <a class="el" href="xdptx__hw_8h.html#4daa1cda21b83425e4082ece56ef0c4c">xdptx_hw.h</a><li>XDPTX_DPCD_NO_AUX_HANDSHAKE_LINK_TRAIN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#988de89a73b6337a4d60e344f0200c3e">xdptx_hw.h</a><li>XDPTX_DPCD_NORP_PWR_V_CAP
|
||||
: <a class="el" href="xdptx__hw_8h.html#a336bd0a671a6b05f883173cff9213e9">xdptx_hw.h</a><li>XDPTX_DPCD_NUM_AUDIO_EPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#fdca186dba2f509c3ea4bf8f3913d762">xdptx_hw.h</a><li>XDPTX_DPCD_OUI_SUPPORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#66ab6872d42ad8fdd55687429db9f6a7">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_ALLOCATE_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#4a78c4bf745ea0cff3e2f64d6ff0b612">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_ALLOCATE_START_TIME_SLOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#12e200c2ced52d77522c833650271f88">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#4386277c1fba73293372267aebfa67ab">xdptx_hw.h</a><li>XDPTX_DPCD_PAYLOAD_TABLE_UPDATE_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a4a3b829a95de966f5d3ecf2c7e847aa">xdptx_hw.h</a><li>XDPTX_DPCD_RECEIVER_CAP_FIELD_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#27228279f92a61a8ebedfedd397bc97a">xdptx_hw.h</a><li>XDPTX_DPCD_RECEIVER_CAP_FIELD_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#b02c72a08c29aa61946100a47e5b37c2">xdptx_hw.h</a><li>XDPTX_DPCD_REP_LAT
|
||||
: <a class="el" href="xdptx__hw_8h.html#17b22094a3ca43ebf1e3cb4d2420a928">xdptx_hw.h</a><li>XDPTX_DPCD_REV
|
||||
: <a class="el" href="xdptx__hw_8h.html#fc6afb769480a2a5462745c2d2890988">xdptx_hw.h</a><li>XDPTX_DPCD_REV_MJR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4067eacb912de4cc2eb44bd92cacfc9c">xdptx_hw.h</a><li>XDPTX_DPCD_REV_MJR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#8eb1dde8c0b2fe9d9e65f2dc0bdbc104">xdptx_hw.h</a><li>XDPTX_DPCD_REV_MNR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e031b0f15ac5cc75ce942ad16eace568">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_FREQ_LOCK_DONE
|
||||
: <a class="el" href="xdptx__hw_8h.html#f356851c249cff2c18484e09267c9e28">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_MSTR_REQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#74e95abc0d829d1a279270d589ecf7a0">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#e95cbc46d57d6831e133eef053bd3435">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_23_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#b657466c4a008bc2f8340a31ffccdfac">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_31_24
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c5c6031f8dafee0182df3086503f49c">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#819cb1573a4a3135e40b4ec9ba8b57ef">xdptx_hw.h</a><li>XDPTX_DPCD_RX_GTC_VALUE_PHASE_SKEW_EN
|
||||
: <a class="el" href="xdptx__hw_8h.html#03ca55708bdad9b1b7f04c093f732d34">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT0_CAP_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#5b7a46da5aab0e5e30f074fdf9299928">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT0_CAP_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3287ef2b6df2675c947bdde4aaf339a5">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT1_CAP_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#c74b25f595cbd8f1853f44f4ac1bf918">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORT1_CAP_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb09722268b28c0c860f32c988b36823">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORTX_CAP_0_ASSOC_TO_PRECEDING_PORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3fef8714a6866993ec04e9c76235ea86">xdptx_hw.h</a><li>XDPTX_DPCD_RX_PORTX_CAP_0_LOCAL_EDID_PRESENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4a1cb9cc6e6f43816aecf6c1e6070975">xdptx_hw.h</a><li>XDPTX_DPCD_SET_POWER_DP_PWR_VOLTAGE
|
||||
: <a class="el" href="xdptx__hw_8h.html#f8a9aaa36c4285ed47f6467510ce2c16">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_ALIGN_STATUS_UPDATED_ESI
|
||||
: <a class="el" href="xdptx__hw_8h.html#34e5ebe1b78494b50d4898923720e573">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#43e851a0c29da93b42f50234b6f7a940">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_COUNT_ESI
|
||||
: <a class="el" href="xdptx__hw_8h.html#7449667b5696494e1b690acf7428dff1">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_DEVICE_SERVICE_IRQ_VECTOR_ESI0
|
||||
: <a class="el" href="xdptx__hw_8h.html#04fa9a9d906db41086fd7dac177efef9">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_DEVICE_SERVICE_IRQ_VECTOR_ESI1
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd6d72ad94664b64d6cd5400d7208ba5">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_LANE0_1_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#c0c6f54f1c84ff8586fbf9ce77f63864">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_LANE2_3_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#d8d70e03e5d9e0d9c8e1fc2434a8d2e8">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_LINK_SERVICE_IRQ_VECTOR_ESI0
|
||||
: <a class="el" href="xdptx__hw_8h.html#1d6bd20a1625b026530442a99bdc78cf">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#f54288a191917b9f3e83e87a8945347e">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS_ESI
|
||||
: <a class="el" href="xdptx__hw_8h.html#9105c05fa643493df5e91f985cf52b4b">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS_RX_PORT0_SYNC_STATUS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#490e1d896f2361eee79c1b0733506f20">xdptx_hw.h</a><li>XDPTX_DPCD_SINK_STATUS_RX_PORT1_SYNC_STATUS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#db3a746e916bf683e92a624fcb312fb4">xdptx_hw.h</a><li>XDPTX_DPCD_SPREAD_AMP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#16742e2d4db17d0e8dfdaaecd711dad6">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3a88339c7381196b2234310ffaf6b44d">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6d72768bb0e6b09ffc4e0a8ab2a70a2">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#417fce194056449cd8479194824854ca">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_0_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#72e7f17f2ef9e62f365164b52fd1ee80">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_1_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fce707897d39d57cea2c234fabcbf1f2">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_1_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#34b5f7a01d0d0c25d0a25ce8f77aa9b2">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_1_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#2715edb8173270fcd07e61111db09a0d">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#8bdeefebf867de39104c52b20696186e">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a9839e55a555d02d018a5f5406cab2b5">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#71ab708cc08c194dd9b04d9bd8c792b8">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_2_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1e0409beb36c733715156ba4466ffdb5">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_3_CE_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#829dc7d466a0c2d1a70fdb2ae989e86e">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_3_CR_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b19faa2e9cc7886488bd650217068f9b">xdptx_hw.h</a><li>XDPTX_DPCD_STATUS_LANE_3_SL_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7161301ab3de3b47bb50e209e7b5ffe2">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#4091657c9bd00ba5ac08719212132001">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#64da457178b98c6df1200ae20c8b65d4">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#67a552c96e6547655b7a7b95b9ab1067">xdptx_hw.h</a><li>XDPTX_DPCD_SYMBOL_ERROR_COUNT_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#21ae0a171f58679d477f9ad34ae20a12">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#644138fe5899e449ee2a0f3177b65aab">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#e2a7b3ab8820f826e14450a3ee4c4922">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_TP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#d9016a535e2210a73f909a6145a75049">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_TP2
|
||||
: <a class="el" href="xdptx__hw_8h.html#70f57190fe1f22fe2f83b764e64e81dd">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SEL_TP3
|
||||
: <a class="el" href="xdptx__hw_8h.html#adaa26343ae1cb190433538c5e08ca73">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#5cefeeafceee09650abaa109f7ebb877">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_D102_TEST
|
||||
: <a class="el" href="xdptx__hw_8h.html#58a1376b284a4f8e415c1db7549da35b">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e0b9024ad912bf1aa3ea1e3ceffd69aa">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#edbc2eec348077f6556fd6a7bc115f22">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_PRBS7
|
||||
: <a class="el" href="xdptx__hw_8h.html#163910e90f4915a29331525d7bd0729c">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_SER_MES
|
||||
: <a class="el" href="xdptx__hw_8h.html#9c860a8cb3ff2ce19bf31675e167beb0">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_LQP_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6a51c5d0c30087cd9abfc9172ee5882">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_REC_CLK_OUT_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b3cabf9114a07385b47471c3c9768f23">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SCRAMB_DIS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5dd2918cb991f54417abd41ffb30241e">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_DE
|
||||
: <a class="el" href="xdptx__hw_8h.html#13afad6804971bfb88b7d4589237e89a">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_DE_ISE
|
||||
: <a class="el" href="xdptx__hw_8h.html#071c2e874b2737c3b65b758e8dbd941d">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_ISE
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d7432fc15c97e243314ff7f4941391a">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7cc1bb8b2360663f0332eace91226765">xdptx_hw.h</a><li>XDPTX_DPCD_TP_SET_SE_COUNT_SEL_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#f9253b32388b3ee3784486005bdfa86f">xdptx_hw.h</a><li>XDPTX_DPCD_TPS3_SUPPORT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4ffd6363ab920c73ec22b45a9071622">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_100_400US
|
||||
: <a class="el" href="xdptx__hw_8h.html#0c70d577d74c19c208aaaa5a709a204c">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_12MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#954cf49f28d9e216586cdfc825958eb6">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_16MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#a9f951ba0ab564780e70ba028c711b1a">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_4MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#49ca016afe18bc37cc155ed90d87a403">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INT_8MS
|
||||
: <a class="el" href="xdptx__hw_8h.html#77b918356b07f9badbf43ea76e870f52">xdptx_hw.h</a><li>XDPTX_DPCD_TRAIN_AUX_RD_INTERVAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#84241d63bcf360513e4941d19b779c11">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE0_1_SET2
|
||||
: <a class="el" href="xdptx__hw_8h.html#fe46927d5908bac8b6019c165e76eebf">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE0_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#c86e34ddf3c00d04c565d1757b5e8eb9">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE1_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#42e7d0b2c4fc44f7ce62e8094f66fdaf">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE2_3_SET2
|
||||
: <a class="el" href="xdptx__hw_8h.html#b5efbea30c0c3615d9cf5f99b83d4672">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE2_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#176bccc8d707bb7fb0854b0a4bef829e">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE3_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#f34e9ec76271640fecd0f1e7495e1ae4">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_0_2_SET_MAX_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4394d4c0dbb11e2eebdde4d05488134">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_0_2_SET_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e98e2ace787a90ea9ab9e0038b8ccba0">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_1_3_SET_MAX_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f97a0181a4148ac17936863ae68d1d27">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_1_3_SET_PC2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#10538678827f60b54c67df01da541a6e">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANE_1_3_SET_PC2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#0ed9a86e0162c3f4e9d21a87deeecb0d">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_MAX_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1c0eca9e8b1b681daf0615eb40f6fc91">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_MAX_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#19c5d300604717198b462dc3d1acbcb3">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_PE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0ba2991a049a91f4d157d6946df4f458">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_PE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#03b243263b770cdd3e1977fd854a02a2">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_LANEX_SET_VS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6fae9a2d6ba0529e37314e789178574">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#1112efd33c27fb573a7ace100c04dd65">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#538c4feddca2fdc5b6513b06962b1520">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#4fb8e8c64045a28330bcdbe25c5dfa6a">xdptx_hw.h</a><li>XDPTX_DPCD_TRAINING_SCORE_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#bb6d807aee4bdb7b424be7361a730378">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_FREQ_LOCK_DONE
|
||||
: <a class="el" href="xdptx__hw_8h.html#21aaf0546f8630de66c81f755ce8a01a">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_15_8
|
||||
: <a class="el" href="xdptx__hw_8h.html#92b734335222864a2f90a7dbf329459c">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_23_16
|
||||
: <a class="el" href="xdptx__hw_8h.html#82e8a15a7ec4e5289468d7f4bac37511">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_31_24
|
||||
: <a class="el" href="xdptx__hw_8h.html#2670c3f1bd7d688a91ab7bd5e71150d7">xdptx_hw.h</a><li>XDPTX_DPCD_TX_GTC_VALUE_7_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#0e162f94573d136c879cc09ebc0a5bd9">xdptx_hw.h</a><li>XDPTX_DPCD_UP_IS_SRC_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3df8cf3462ae768adf99be59621ee8e9">xdptx_hw.h</a><li>XDPTX_DPCD_UP_REP
|
||||
: <a class="el" href="xdptx__hw_8h.html#61f5fdf1e50ed917f94f6fe3fa63c7dc">xdptx_hw.h</a><li>XDPTX_DPCD_UP_REQ
|
||||
: <a class="el" href="xdptx__hw_8h.html#29760e54ce968788a6d08cb41442e4ff">xdptx_hw.h</a><li>XDPTX_DPCD_UP_REQ_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#905a796a81438eb2fd488ad0d981696f">xdptx_hw.h</a><li>XDPTX_DPCD_UPSTREAM_DEVICE_DP_PWR_NEED
|
||||
: <a class="el" href="xdptx__hw_8h.html#b45b21f5575c2e9b2589b012bd1090e0">xdptx_hw.h</a><li>XDPTX_DPCD_VC_PAYLOAD_ID_SLOT
|
||||
: <a class="el" href="xdptx__hw_8h.html#707e0cd8eec3bd399f47068ba3574ab1">xdptx_hw.h</a><li>XDPTX_DPCD_VID_INTER_LAT
|
||||
: <a class="el" href="xdptx__hw_8h.html#a876602b0c183b3b7bd4f33336039f33">xdptx_hw.h</a><li>XDPTX_DPCD_VID_PROG_LAT
|
||||
: <a class="el" href="xdptx__hw_8h.html#528f1e1dbc9da6582fdc9fb522b9c92a">xdptx_hw.h</a><li>XDPTX_EDID_ADDR
|
||||
: <a class="el" href="xdptx__hw_8h.html#98b209809956d19e99bfb5861320238e">xdptx_hw.h</a><li>XDPTX_EDID_BLOCK_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#54556e26556d589cc446da234160c53f">xdptx_hw.h</a><li>XDPTX_EDID_DTD_DD
|
||||
: <a class="el" href="xdptx__hw_8h.html#4c0444d71ec8519b4c14f956c6b49687">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HBLANK_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#204efcbde19099818449e4eeb4e0c018">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HBORDER
|
||||
: <a class="el" href="xdptx__hw_8h.html#0972838a0b3870271f9c0245379e538f">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HFPORCH_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#d2dc4d9a8b7f695e11bc8a975403eeb5">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HIMGSIZE_MM_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd4bd1b0cc8d5df015d593092adb953b">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HRES_HBLANK_U4
|
||||
: <a class="el" href="xdptx__hw_8h.html#15df90489da71349d9332cc45ca84088">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HRES_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#0532f5b0ae7791d365e3a7aa2ff9a5ac">xdptx_hw.h</a><li>XDPTX_EDID_DTD_HSPW_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#cedafc454b4ab8ccd8dc9053364c184c">xdptx_hw.h</a><li>XDPTX_EDID_DTD_PIXEL_CLK_KHZ_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#169ce642bc16fef5dd8acff402ea26a9">xdptx_hw.h</a><li>XDPTX_EDID_DTD_PIXEL_CLK_KHZ_MSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#2986d82e9dc105bab39beb211c331fb0">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#19a8e6f75438b41e384f54731dd5c681">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_HPOLARITY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1de303e3968172a23f1840b67992e734">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_HPOLARITY_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#090de354d74efc065058453646c6079c">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_VPOLARITY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#216d71a6c248d097c2ff283ab39c98e2">xdptx_hw.h</a><li>XDPTX_EDID_DTD_SIGNAL_VPOLARITY_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#af126efe1d8d171b17ef8873d05562b0">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VBLANK_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#47f428d78ea90fdb4f95f77dedfcc185">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VBORDER
|
||||
: <a class="el" href="xdptx__hw_8h.html#73fcab61b51e51c7dc10a65bfd906b50">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4
|
||||
: <a class="el" href="xdptx__hw_8h.html#49e4c184d05fb0792b97520b827e1d60">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#9706a7d08651c3e2fe9ba4043e7079e8">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#ccab1c4ece9b2682864d5fb8390ef9bd">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VSPW_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a172ef632aa8505875cf99ef598c4dad">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VIMGSIZE_MM_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#7fdd24dd20b3fbf3b6cbe69b8b2260f1">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VRES_LSB
|
||||
: <a class="el" href="xdptx__hw_8h.html#32bbfb939c0910c0f20a8cce327e3361">xdptx_hw.h</a><li>XDPTX_EDID_DTD_VRES_VBLANK_U4
|
||||
: <a class="el" href="xdptx__hw_8h.html#fcc1d4a9046cb26a8bb7bab868072186">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2
|
||||
: <a class="el" href="xdptx__hw_8h.html#53264c546eafcb03312bc7acb144f453">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff71b903b31c8f87a4897f689ee625ef">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#940b72476eda533d932c4f7c043ec140">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e32c993299a79d2352198df22aea63a2">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#15faa764b80423fac349428591197301">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#bc881ed0ae67854773ca546a4ac58d03">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#362a887c3c21aa19d7250f5b16cf3263">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VSPW_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6d036670b17a42942fe0d63a23d088e4">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4
|
||||
: <a class="el" href="xdptx__hw_8h.html#1fc98e98c756fe2195080ab6f9b0490a">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4_HIMGSIZE_MM_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#26b8c0b0310089d00a561ca8b05651b9">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4_HIMGSIZE_MM_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#77875ea1863c117ce2bc60c6c64e4dc9">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XIMGSIZE_MM_U4_VIMGSIZE_MM_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#764313a3588b9a493289d5f86928330d">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c816e23a48a1b873758469313ad7c1be">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3f336bc594d6a76296327801a4cbad7f">xdptx_hw.h</a><li>XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#5633e0393467c82897ffb3f3adc34dc2">xdptx_hw.h</a><li>XDPTX_EDID_EXT_BLOCK_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#63e9b871d9eadf5e3978309b001e7816">xdptx_hw.h</a><li>XDPTX_EDID_EXT_BLOCK_TAG
|
||||
: <a class="el" href="xdptx__hw_8h.html#274a555b9eee8b1005de4e5cac96df0e">xdptx_hw.h</a><li>XDPTX_EDID_EXT_BLOCK_TAG_DISPID
|
||||
: <a class="el" href="xdptx__hw_8h.html#f56421792a0232a615c2174f21928236">xdptx_hw.h</a><li>XDPTX_EDID_PTM
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd996c267b92b75bc15aa546f12bcbcd">xdptx_hw.h</a><li>XDPTX_ENABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#dccd2085ac011c3526c29b18af61b533">xdptx_hw.h</a><li>XDPTX_ENABLE_MAIN_STREAM
|
||||
: <a class="el" href="xdptx__hw_8h.html#6cf7e0bee90d891de9523a1404f4dfce">xdptx_hw.h</a><li>XDPTX_ENABLE_SEC_STREAM
|
||||
: <a class="el" href="xdptx__hw_8h.html#7173b48b94714a38346fd15d84e39721">xdptx_hw.h</a><li>XDPTX_ENHANCED_FRAME_EN
|
||||
: <a class="el" href="xdptx__hw_8h.html#b9585758f007170a13039bfb6669e154">xdptx_hw.h</a><li>XDPTX_FORCE_SCRAMBLER_RESET
|
||||
: <a class="el" href="xdptx__hw_8h.html#81b5d89e3211a268e40653378010603f">xdptx_hw.h</a><li>XDPTX_FRAC_BYTES_PER_TU
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6fb8fc7ffbc02a36aec3763720e5d51">xdptx_hw.h</a><li>XDptx_GetDispIdTdtHLoc
|
||||
: <a class="el" href="xdptx__hw_8h.html#84a759a7889374fc716f118b50919aeb">xdptx_hw.h</a><li>XDptx_GetDispIdTdtHTotal
|
||||
: <a class="el" href="xdptx__hw_8h.html#a7f8c59fb4ad94c697f8c1f0e2257730">xdptx_hw.h</a><li>XDptx_GetDispIdTdtNumTiles
|
||||
: <a class="el" href="xdptx__hw_8h.html#6f877f976ffd7c65c5aed39f1d3142af">xdptx_hw.h</a><li>XDptx_GetDispIdTdtTileOrder
|
||||
: <a class="el" href="xdptx__hw_8h.html#42df077ce7bbb9925d5479b23ca2893f">xdptx_hw.h</a><li>XDptx_GetDispIdTdtVLoc
|
||||
: <a class="el" href="xdptx__hw_8h.html#7bbf7813f06fb924f58a5a40832f563e">xdptx_hw.h</a><li>XDptx_GetDispIdTdtVTotal
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d905fbb657f9f2d0b64c71543acbc72">xdptx_hw.h</a><li>XDPTX_GT_DRP_CHANNEL_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#0a1019d380ca28371f114372f6078b83">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND
|
||||
: <a class="el" href="xdptx__hw_8h.html#1cc4c78c44c341a64cd5ce9eb6488733">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_ADDR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7d9d092698674c66fc88d4b2edec5da8">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_RW_CMD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8f0ec89901485a76219b83547ee1e032">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_W_DATA_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#db0c02371ab905c33d6dc38e41ac125a">xdptx_hw.h</a><li>XDPTX_GT_DRP_COMMAND_DRP_W_DATA_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#444041624084d4373266eb762c3afe18">xdptx_hw.h</a><li>XDPTX_GT_DRP_READ_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#1c299567502ff153b0e3ab3e04693a6b">xdptx_hw.h</a><li>XDPTX_HPD_DURATION
|
||||
: <a class="el" href="xdptx__hw_8h.html#79f1dd7d25b8299f9a5a82cc1401d463">xdptx_hw.h</a><li>XDptx_In32
|
||||
: <a class="el" href="xdptx__hw_8h.html#f11c526b53f6f8d5d397798df1c4703a">xdptx_hw.h</a><li>XDPTX_INIT_WAIT
|
||||
: <a class="el" href="xdptx__hw_8h.html#8e570f6926e0dc55c65a0c73dc0c7113">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#09f3eb73078b0ac57fa1a871e4503c84">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_EXT_PKT_TXD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d6b65ca1c4851291a64cf787d493eee4">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_HPD_EVENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7c0ab21d86f1f0ec70763c34e8f847e6">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_HPD_IRQ_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e264ca15d40e43986c6cc994b200a272">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#125bfbf273206044e940840632432855">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_REPLY_RECEIVED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ba5f4a2d11d1c16eb7ac42e46a66a1dd">xdptx_hw.h</a><li>XDPTX_INTERRUPT_MASK_REPLY_TIMEOUT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ff47f0199d49bf176dd0672a489feb21">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE
|
||||
: <a class="el" href="xdptx__hw_8h.html#2c90e9fd29a27b064ed90193af1803f5">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_HPD_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#86fe8f09022654d68f297159cdcd266a">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_REPLY_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#35c6c25b2cef95cd4978a40db8c3204e">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_REPLY_TIMEOUT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd17f7ce4457d50ead5cbd6dde2bf51e">xdptx_hw.h</a><li>XDPTX_INTERRUPT_SIG_STATE_REQUEST_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3c619f1dbed1c62873fd8fb2fe4f198e">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#37d4b7923f7251ad4350533aa6bb8ff9">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_EXT_PKT_TXD_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f553dc3dde408ced8895aef66587cf80">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#df451c8fc46142a74279cb1ff1c4d2ce">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_HPD_IRQ_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c43b1c32faaa60d3a91a9e06b0be7c2b">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3bbe32201efcb4b198f88732e472462b">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_REPLY_RECEIVED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#10599c8cf461799f0185d992375ed014">xdptx_hw.h</a><li>XDPTX_INTERRUPT_STATUS_REPLY_TIMEOUT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#cd3e791215a6e8664f9aa9d5a1411912">xdptx_hw.h</a><li>XDPTX_IS_CONNECTED_MAX_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#eda7b677ddf7bb1cbfbc00bdf1594158">xdptx.c</a><li>XDptx_IsEdidExtBlockDispId
|
||||
: <a class="el" href="xdptx__hw_8h.html#f9c078ce55f5c09971fcfa711296ab0e">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#60699d11e90355d8f5bcdd1a43ada31a">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f27f79722cbd8e05638a72c942261934">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#cbfb5d978ff4c2b5b8b77d3856e84fae">xdptx_hw.h</a><li>XDPTX_LANE_COUNT_SET_4
|
||||
: <a class="el" href="xdptx__hw_8h.html#2486d2d588da9d897323f23b0023ba09">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#615a5c215decf0d186dccec73e66a0a7">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#19befc790dbc6e839b45cdbdf06397c2">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#334765330e1d30a1df9f0b874373e119">xdptx_hw.h</a><li>XDPTX_LINK_BW_SET_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#0f60cc81b390dc621b5fcc49732a0d48">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#ef7d54d2e4ebee982c4e9efb022e108d">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_D102_TEST
|
||||
: <a class="el" href="xdptx__hw_8h.html#8cef3c82f7dc1969bd5ee1ccc65132c9">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#0fe4df9f2f0fd9d0073ba054ea105917">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_PRBS7
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e6568309f6688b98fa9d473cd72984c">xdptx_hw.h</a><li>XDPTX_LINK_QUAL_PATTERN_SET_SER_MES
|
||||
: <a class="el" href="xdptx__hw_8h.html#2238f7e9e5a1e11f947bee2446963bad">xdptx_hw.h</a><li>XDPTX_M_VID
|
||||
: <a class="el" href="xdptx__hw_8h.html#12525c000e5e27377091080aeb16f676">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HRES
|
||||
: <a class="el" href="xdptx__hw_8h.html#46f4a5ce423759c35bc5e033cc959065">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HSTART
|
||||
: <a class="el" href="xdptx__hw_8h.html#e9e74dfaeeef0afcab887f8c2d8e16c8">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HSWIDTH
|
||||
: <a class="el" href="xdptx__hw_8h.html#4f0cf03e1278c8fa08884e3684115c12">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_HTOTAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#abfdf1c8ce7c380c8e1a1e8f054f5120">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_INTERLACED
|
||||
: <a class="el" href="xdptx__hw_8h.html#369f88c7bed81fcc320ed60590ee198b">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_MISC0
|
||||
: <a class="el" href="xdptx__hw_8h.html#98a49091321fa30ac74a868dfdda94ea">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_MISC1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f8260d6919b171a531a5140e36b53d5f">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_POLARITY
|
||||
: <a class="el" href="xdptx__hw_8h.html#3191336d71991f45e685370166b75235">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VRES
|
||||
: <a class="el" href="xdptx__hw_8h.html#550fd6231df126304130eeddd06eecb4">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VSTART
|
||||
: <a class="el" href="xdptx__hw_8h.html#146ad1908ab33bcea4ff20864857fcda">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VSWIDTH
|
||||
: <a class="el" href="xdptx__hw_8h.html#b76db8018242c149a8f04425b96a0073">xdptx_hw.h</a><li>XDPTX_MAIN_STREAM_VTOTAL
|
||||
: <a class="el" href="xdptx__hw_8h.html#0106cb54397959b72820d01d2738e44f">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_10BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#817aef846203cb2353121b0d6ae72aa4">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_12BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#b8f14cc46979dd9cd1805194fc864e51">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_16BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#fbde22ffe7105d66d1ad969a7bda05b0">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_6BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#b51366f59b9f87a2af70e177aaf46ec5">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_8BPC
|
||||
: <a class="el" href="xdptx__hw_8h.html#91abe3ea71ac4c479e82039226669509">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#8b97cf8821d9d64b6373484c117649c5">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_BDC_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#b979cb6c78c5e4039c53ba8efe8a5583">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#53437c9a8d17203c20273fe49944ba21">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_RGB
|
||||
: <a class="el" href="xdptx__hw_8h.html#f190b9960cbbd0b31bc8d94c3583e177">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#8e4e1a7bc814fd235d8b5bd4241cf993">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422
|
||||
: <a class="el" href="xdptx__hw_8h.html#2656084077d48a700d0471ced29ec4f3">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR444
|
||||
: <a class="el" href="xdptx__hw_8h.html#f2f8028fef49ced94003eff4317761b9">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5709d35da2320d69216ef309bd920447">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1a4cdc6a7c8e535bc11d9aa1f01f4081">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_SYNC_CLK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#9d1375c1c5bef0030ee4803e4b5a3154">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5c8fb63a3f70f0237ff78744066a8821">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#383a99c5d27aa2a7f85880d0e8389d31">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC1_INTERLACED_VTOTAL_GIVEN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b56aa216312e71f1ec74fc5ada78df29">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC1_STEREO_VID_ATTR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#12d409bfe12707708286f1b2d9b9550c">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_MISC1_STEREO_VID_ATTR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#870bcaceda2377ffca92a46d251670ea">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_POLARITY_HSYNC_POL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4be382ffcb05750de249a696fd7bc88">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7ff368b199653120745d35dbbb8b6a67">xdptx_hw.h</a><li>XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#5265dee8063dd9c922eb91264fc96359">xdptx_hw.h</a><li>XDPTX_MAX_SBMSG_REPLY_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx__mst_8c.html#f5fc0e734c06a4ef2c7fdb2adb767296">xdptx_mst.c</a><li>XDPTX_MAXIMUM_PE_LEVEL
|
||||
: <a class="el" href="xdptx_8c.html#2e92b9e3582508165c54dd78dbedff7c">xdptx.c</a><li>XDPTX_MAXIMUM_VS_LEVEL
|
||||
: <a class="el" href="xdptx_8c.html#e6eee4e2ce424bf02c3d44751049dd11">xdptx.c</a><li>XDPTX_MIN_BYTES_PER_TU
|
||||
: <a class="el" href="xdptx__hw_8h.html#ef02dda0634e52791bb332de791a79c3">xdptx_hw.h</a><li>XDPTX_N_VID
|
||||
: <a class="el" href="xdptx__hw_8h.html#40b298687646706b016e22b7519d307d">xdptx_hw.h</a><li>XDptx_Out32
|
||||
: <a class="el" href="xdptx__hw_8h.html#39834ac0d826fdaa966446d39b1a97d0">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#909e1ad4d3ae849d78d331c471804d51">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#8ff3d019a3104dca0dfa45a0697270c0">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#f7dee42d77f428cec3989fc828b81ed3">xdptx_hw.h</a><li>XDPTX_PE_LEVEL_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#ec6b9d0b996375749169408532849bec">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT
|
||||
: <a class="el" href="xdptx__hw_8h.html#a7270cf68ce3b8f845ccf6b89c9135d7">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT_162GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#5622d06b48c3c4c96b25a21f424ae1c7">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT_270GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#584ab44ad86fd24b3981290ffa022199">xdptx_hw.h</a><li>XDPTX_PHY_CLOCK_SELECT_540GBPS
|
||||
: <a class="el" href="xdptx__hw_8h.html#f7b48bbf5ca5eb1c6ca2b523cf0c8b23">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG
|
||||
: <a class="el" href="xdptx__hw_8h.html#ee00fdff8d608902361ed005d801c701">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_GT_ALL_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ccf42d665ae494c6b7a6ededcaec80b2">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_GTTX_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#fa7579fc809a60ec3496f2c75e462525">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_PHY_RESET_ENABLE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#42d9dd623a58b4c7345c8c8bb23324ae">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_PHY_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ae0c20e361280cace984f7fff18271b6">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_LOOPBACK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#93d0e79c17341380bc09c89b316be10d">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_PCS_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b35e97c559c06d99ec74a66d3e7dfe2e">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_PMA_RESET_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e6c85c6919805d15697f133b970f6a0e">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_POLARITY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#024c99d0a0ffcb86dd4fe5c4e88ea540">xdptx_hw.h</a><li>XDPTX_PHY_CONFIG_TX_PHY_PRBSFORCEERR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#12873f8f39c55f2d48d95228ff37c685">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e5b81223eb667878b6151112f01e768">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3ccfdda68d33b153eefc850d9c49608d">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#9c1918c4cf09a2e7ad9838e0bb643907">xdptx_hw.h</a><li>XDPTX_PHY_POSTCURSOR_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#b4ed918656b38c2894d383fb1d772805">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#772b112773abd58fc447800c4633b218">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#d09fe9f8e8be3a0cee44b91b0757838d">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#97005b8c8e20a1217596d3c5f3f70861">xdptx_hw.h</a><li>XDPTX_PHY_PRECURSOR_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#0237557d5695285a1fffdc317e387727">xdptx_hw.h</a><li>XDPTX_PHY_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#fb3b0e07aab567eaecdcdb0eb03f7dda">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_ALL_LANES_READY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7af4dd4c3cef9ccfe2b2639aafb18dc3">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_LANES_0_1_READY_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e60d69bceb3c528d9c64ed41a3500f16">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_PLL_FABRIC_LOCK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f896d8991398a60dc53829f0c6b2bd16">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_PLL_LANE0_1_LOCK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0fc3cb0054f5da72ec8d48c37f1a98d7">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_PLL_LANE2_3_LOCK_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d3ebd8ed82e7a058fe9316d188a6ce5b">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_RESET_LANE_0_1_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a1952aa5d9dfa957d15d40ac4a85b529">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_RESET_LANE_2_3_DONE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#f84d3b4c7c14fb85fbc5c2c14bf84da7">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6ec37de0a0fae9a49eaf3de511f21291">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_0_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#5d7d100e512b2785c95904568279e629">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e493d23edd46802e827b1677f7ec8499">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_1_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1750bcb0b748cc4c109a34601ebf96bb">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a4f9c7c733040bdec4643394fbb60a54">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#96349a0e22577555da25a5297edfa434">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#47dc660534d5788f8927c45d106dde5c">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_BUFFER_STATUS_LANE_3_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#62ab17a9750b25a397998988ca4f55d4">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#232b7f7ea4e71966ab580de9cd3e7517">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_0_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#4f81065b3916c89ee929dce240f02d9b">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#0b8b858f3c7a7377835092630efa80db">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_1_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#b966164071f998546e576e3b6c486fc2">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#ea0427b430f68d914d9af7780fd950e0">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_2_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1f3029c28bfb8bc5988bd1289e72f576">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#75ecafb568607e2c9ca2650c9c6bff4a">xdptx_hw.h</a><li>XDPTX_PHY_STATUS_TX_ERROR_LANE_3_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#f854ad6f9cc39b4ab546b55da928df0a">xdptx_hw.h</a><li>XDPTX_PHY_TRANSMIT_PRBS7
|
||||
: <a class="el" href="xdptx__hw_8h.html#17591248b848e2189f6f6dc88c4552e3">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#8ec0c28f1bcbf7ae87a17250353d9dd4">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#5bc32f5c07c68da3d1881e75274e046b">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#bc51d2bd7578978c3013c52b7413f039">xdptx_hw.h</a><li>XDPTX_PHY_VOLTAGE_DIFF_LANE_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#0c4906f061a6e2ab671899c9988067dc">xdptx_hw.h</a><li>XDptx_ReadReg
|
||||
: <a class="el" href="xdptx__hw_8h.html#a1d3c151b7379c97992cdc746d3730f3">xdptx_hw.h</a><li>XDPTX_REPLY_DATA_COUNT
|
||||
: <a class="el" href="xdptx__hw_8h.html#00ed008e4e760a23ab3bb10fa663b5e4">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS
|
||||
: <a class="el" href="xdptx__hw_8h.html#696c23464136b2079a88bfdfddec4e2b">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_ERROR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b2578bc099e54c1739f06247a20c223d">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_IN_PROGRESS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#1efa31f973089cf945b12dafdcac231f">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_RECEIVED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5cdb033e7e35e695799d5e9891c5ae57">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_STATUS_STATE_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#68aa2b53fec77188e095759d63fe4e4f">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REPLY_STATUS_STATE_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#a197dff781bf4b692800ff4c98ef3d47">xdptx_hw.h</a><li>XDPTX_REPLY_STATUS_REQUEST_IN_PROGRESS_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#96428e20ecb1f0b2ea5627003e101237">xdptx_hw.h</a><li>XDPTX_SBMSG_ALLOCATE_PAYLOAD
|
||||
: <a class="el" href="xdptx__hw_8h.html#f1b9029d4b16aabd54f8d5b74b5eae46">xdptx_hw.h</a><li>XDPTX_SBMSG_CLEAR_PAYLOAD_ID_TABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#a7bcf7812e5f6d765d363b802fd8809b">xdptx_hw.h</a><li>XDPTX_SBMSG_ENUM_PATH_RESOURCES
|
||||
: <a class="el" href="xdptx__hw_8h.html#483a0a53c4f307ad5b6e47caf10c9178">xdptx_hw.h</a><li>XDPTX_SBMSG_LINK_ADDRESS
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4335170bc8750b83750203b0a87e5cd">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_DPCD_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#8b5315409c2d30abff7e3e322c9f570f">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_DPCD_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#ea8c4585545f2b51870ad7e9fcea5fa9">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_I2C_READ
|
||||
: <a class="el" href="xdptx__hw_8h.html#b04757d807314d13ba01ff38436bde7c">xdptx_hw.h</a><li>XDPTX_SBMSG_REMOTE_I2C_WRITE
|
||||
: <a class="el" href="xdptx__hw_8h.html#484ed7aefe5f42b0373137e45b9b0131">xdptx_hw.h</a><li>XDPTX_SCRAMBLING_DISABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#46b765f85cf9ffe068bb1d8b7aaa0d0d">xdptx_hw.h</a><li>XDPTX_SEGPTR_ADDR
|
||||
: <a class="el" href="xdptx__hw_8h.html#c542c7550b8e1eda4c0f55522ab0dc85">xdptx_hw.h</a><li>XDPTX_SOFT_RESET
|
||||
: <a class="el" href="xdptx__hw_8h.html#1642355960359ffea40e5478d0a6e206">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_AUX_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#eef2a4cf42a4d1d7408ce01ecefb94b1">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#e5442e6a414c29b253947f9514802712">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#d3a6ffdb2ad1e9ae8c38ab05c74af0df">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#c05636cb103256a31e4bfc1b3261d322">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a58d4d2106e80b56a81a90b3a7d45f82">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b146c86e6453f74674fdaf21d4b0c54c">xdptx_hw.h</a><li>XDPTX_STREAM1
|
||||
: <a class="el" href="xdptx__hw_8h.html#f4088488d81460880094e01800f07439">xdptx_hw.h</a><li>XDPTX_STREAM1_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#2b82e26783f47f29574117ea62c34f78">xdptx_hw.h</a><li>XDPTX_STREAM2
|
||||
: <a class="el" href="xdptx__hw_8h.html#9fbb68c3e0908297f948163be6885141">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#ecc95afdc6f83c73fc875db4befebd6d">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#cbd281b359e81aeb0061598c1e6b702a">xdptx_hw.h</a><li>XDPTX_STREAM3
|
||||
: <a class="el" href="xdptx__hw_8h.html#eeeab96e9257636758cdc0a39ff0cd98">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#84ff5adeaa0209c64054caeb10a6aeb7">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#db003520dc786be3da092a62c40469fb">xdptx_hw.h</a><li>XDPTX_STREAM4
|
||||
: <a class="el" href="xdptx__hw_8h.html#ca743990bdc34da02e9645c7a39368da">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#ae5d853532eb62707a2edd7ee4554b48">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#2b9f5cf2a4c0f2357e370ae7a81a647f">xdptx_hw.h</a><li>XDPTX_STREAM_ID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#136254a14cb3ffae2bdd65cea222dcc1">xdptx_hw.h</a><li>XDPTX_STREAM_ID2
|
||||
: <a class="el" href="xdptx__hw_8h.html#6bb82a4f4c217be4cd683765eb227b52">xdptx_hw.h</a><li>XDPTX_STREAM_ID3
|
||||
: <a class="el" href="xdptx__hw_8h.html#8c395648124690c2fabe7b3e71472c11">xdptx_hw.h</a><li>XDPTX_STREAM_ID4
|
||||
: <a class="el" href="xdptx__hw_8h.html#6d96f8584a1912b8d004580ec4ba3f3c">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#abf4477645c65c9cef415a7d8e660f37">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#43dbd071ae47dc1f9c497fd6fc567ed9">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#6ba7710636d2779f80b6d54acbe9816d">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP2
|
||||
: <a class="el" href="xdptx__hw_8h.html#ba7639f88df19838f71f0e0bd5e6724f">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP3
|
||||
: <a class="el" href="xdptx__hw_8h.html#6c7802b55671487663ec44628d423083">xdptx_hw.h</a><li>XDPTX_TU_SIZE
|
||||
: <a class="el" href="xdptx__hw_8h.html#636b945926097deba9547fe7b03523a6">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_CHANNELS
|
||||
: <a class="el" href="xdptx__hw_8h.html#c37ba2f83438eeaf5330caba081b6394">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_CONTROL
|
||||
: <a class="el" href="xdptx__hw_8h.html#e7e52836b88c1f705ff8841adffb51c5">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_EXT_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#c7f55a04726ce5ab66d997aa3d398e5e">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_INFO_DATA
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d4932d0e30b72d83325ed1f0eff1dc0">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_MAUD
|
||||
: <a class="el" href="xdptx__hw_8h.html#b733bc0cbec6dc730f6284e30840a3f8">xdptx_hw.h</a><li>XDPTX_TX_AUDIO_NAUD
|
||||
: <a class="el" href="xdptx__hw_8h.html#59f322babeebcbbcad569d2b383a7108">xdptx_hw.h</a><li>XDPTX_TX_MST_CONFIG
|
||||
: <a class="el" href="xdptx__hw_8h.html#5bf07ac629dc495d714ec07e9a4fc806">xdptx_hw.h</a><li>XDPTX_TX_MST_CONFIG_MST_EN_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b7902be94504708df920d36507121d1e">xdptx_hw.h</a><li>XDPTX_TX_MST_CONFIG_VCP_UPDATED_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#62e6792433828be3c4cd4a2077fe5326">xdptx_hw.h</a><li>XDPTX_TX_PHY_POWER_DOWN
|
||||
: <a class="el" href="xdptx__hw_8h.html#8881b088b8a5558394e6b87927c29cc5">xdptx_hw.h</a><li>XDPTX_TX_USER_FIFO_OVERFLOW
|
||||
: <a class="el" href="xdptx__hw_8h.html#87853c5f9b5899fef2ff4ab284bcfe97">xdptx_hw.h</a><li>XDPTX_USER_DATA_COUNT_PER_LANE
|
||||
: <a class="el" href="xdptx__hw_8h.html#878e506f4f5d3177baddd2c56b779b93">xdptx_hw.h</a><li>XDPTX_USER_PIXEL_WIDTH
|
||||
: <a class="el" href="xdptx__hw_8h.html#82d867d418c722d84dccf08c1c01cfb6">xdptx_hw.h</a><li>XDPTX_VC_PAYLOAD_BUFFER_ADDR
|
||||
: <a class="el" href="xdptx__hw_8h.html#7e6ace0b3fe51be13d0aeefaec243858">xdptx_hw.h</a><li>XDPTX_VCP_TABLE_MAX_TIMEOUT_COUNT
|
||||
: <a class="el" href="xdptx__mst_8c.html#b516e7ba6e3f491adc2e4d1ebf4ff523">xdptx_mst.c</a><li>XDPTX_VERSION
|
||||
: <a class="el" href="xdptx__hw_8h.html#6cdb6837074419af7219b993aafdd99c">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_PATCH_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#3a86f4228ec12b11d77c495357e525a4">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_PATCH_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#41b287e0186563f32e0eec73bbddb9e5">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MJR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#4155853cd5299448486c8af9c9e6b684">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MJR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#1ad5d795efdae37b737554923539777f">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MNR_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#2f996c450c159ac2d847ce2a2f6eaa0c">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_MNR_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#975cfa9b69ab4b8453c2893f14490fbf">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_REV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#62bf4dcfe2bde9aec0cbc48d2354c5c5">xdptx_hw.h</a><li>XDPTX_VERSION_CORE_VER_REV_SHIFT
|
||||
: <a class="el" href="xdptx__hw_8h.html#3f43cd7e650b361eb8fd770282986294">xdptx_hw.h</a><li>XDPTX_VERSION_INTER_REV_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#5ed072718def374278356cc09991040a">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_0
|
||||
: <a class="el" href="xdptx__hw_8h.html#89b7fb18ad910ec87a3cf22bc23cb330">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_1
|
||||
: <a class="el" href="xdptx__hw_8h.html#09abef92c48d26ec02ec8e2994261515">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_2
|
||||
: <a class="el" href="xdptx__hw_8h.html#914468805a969d87fbf657b43387a0be">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_3
|
||||
: <a class="el" href="xdptx__hw_8h.html#e12265176bac83d51fd9c59e24fec3d7">xdptx_hw.h</a><li>XDPTX_VS_LEVEL_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#f8505935c3db7e5bbe14b6fd706cfc11">xdptx_hw.h</a><li>XDptx_WriteReg
|
||||
: <a class="el" href="xdptx__hw_8h.html#44d7211deaaad4f7592a61adf0b4d3cd">xdptx_hw.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
40
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_enum.html
Executable file
40
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_enum.html
Executable file
|
|
@ -0,0 +1,40 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li id="current"><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>XDptx_TrainingState
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc">xdptx.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
45
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_eval.html
Executable file
45
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_eval.html
Executable file
|
|
@ -0,0 +1,45 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li id="current"><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>XDPTX_TS_ADJUST_LANE_COUNT
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc609bd01c745f033f32c82c0fb52a3c60">xdptx.c</a><li>XDPTX_TS_ADJUST_LINK_RATE
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc7200a113edaf8dfede43332ce872e9fa">xdptx.c</a><li>XDPTX_TS_CHANNEL_EQUALIZATION
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc4c50764533825a3e6e42e33367307f3f">xdptx.c</a><li>XDPTX_TS_CLOCK_RECOVERY
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcca132a70157b0136fc4a82cf6520fa078">xdptx.c</a><li>XDPTX_TS_FAILURE
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc892dc74b9b1182db65bee447b81a11be">xdptx.c</a><li>XDPTX_TS_SUCCESS
|
||||
: <a class="el" href="xdptx_8c.html#063e9684f0a5b42df444815565bf0dcc46d5b11d65003735591c8cd0ffb46c78">xdptx.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
124
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_func.html
Executable file
124
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_func.html
Executable file
|
|
@ -0,0 +1,124 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li id="current"><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_x">- x -</a></h3><ul>
|
||||
<li>XDptx_AllocatePayloadStreams()
|
||||
: <a class="el" href="xdptx__mst_8c.html#cd8369516355503303d1b82f3ffae846">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#cd8369516355503303d1b82f3ffae846">xdptx.h</a><li>XDptx_AllocatePayloadVcIdTable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#af814b5ceb3b267656ef120b55569d80">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#af814b5ceb3b267656ef120b55569d80">xdptx.h</a><li>XDptx_AuxRead()
|
||||
: <a class="el" href="xdptx_8h.html#b25ef45e949568bf5ae5623fb3303a31">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b25ef45e949568bf5ae5623fb3303a31">xdptx.c</a><li>XDptx_AuxWrite()
|
||||
: <a class="el" href="xdptx_8h.html#d24537a5bd001781f3ec2157e80438bd">xdptx.h</a>, <a class="el" href="xdptx_8c.html#d24537a5bd001781f3ec2157e80438bd">xdptx.c</a><li>XDptx_CfgInitialize()
|
||||
: <a class="el" href="xdptx_8h.html#9128bf8d6da59ba2b255197db5e621b6">xdptx.h</a>, <a class="el" href="xdptx_8c.html#9128bf8d6da59ba2b255197db5e621b6">xdptx.c</a><li>XDptx_CfgMainLinkMax()
|
||||
: <a class="el" href="xdptx_8h.html#7ef44713234442c3a6cf13e2fce70a4b">xdptx.h</a>, <a class="el" href="xdptx_8c.html#7ef44713234442c3a6cf13e2fce70a4b">xdptx.c</a><li>XDptx_CfgMsaEnSynchClkMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#9192eda72dd8e74339cca7de45383110">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#9192eda72dd8e74339cca7de45383110">xdptx.h</a><li>XDptx_CfgMsaRecalculate()
|
||||
: <a class="el" href="xdptx__spm_8c.html#99d8902337e7bb3f7c607568501e16a1">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#99d8902337e7bb3f7c607568501e16a1">xdptx.h</a><li>XDptx_CfgMsaSetBpc()
|
||||
: <a class="el" href="xdptx__spm_8c.html#5dba8599ab68d0766e120119a6c6b83a">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#5dba8599ab68d0766e120119a6c6b83a">xdptx.h</a><li>XDptx_CfgMsaUseCustom()
|
||||
: <a class="el" href="xdptx__spm_8c.html#b04d6d38ab65f7d6d5b4734eedf9b020">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#b04d6d38ab65f7d6d5b4734eedf9b020">xdptx.h</a><li>XDptx_CfgMsaUseEdidPreferredTiming()
|
||||
: <a class="el" href="xdptx__spm_8c.html#b4778897734128bf467047a90066c922">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#b4778897734128bf467047a90066c922">xdptx.h</a><li>XDptx_CfgMsaUseStandardVideoMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#8f5a8d3f316f519145ecd9a94bf27ce8">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#8f5a8d3f316f519145ecd9a94bf27ce8">xdptx.h</a><li>XDptx_CfgTxPeLevel()
|
||||
: <a class="el" href="xdptx_8h.html#eda4459fe23e2926575401293fa9ee75">xdptx.h</a>, <a class="el" href="xdptx_8c.html#eda4459fe23e2926575401293fa9ee75">xdptx.c</a><li>XDptx_CfgTxVsLevel()
|
||||
: <a class="el" href="xdptx_8h.html#1c2e557e06c47e2f6d3b6f072a462d03">xdptx.h</a>, <a class="el" href="xdptx_8c.html#1c2e557e06c47e2f6d3b6f072a462d03">xdptx.c</a><li>XDptx_CfgTxVsOffset()
|
||||
: <a class="el" href="xdptx_8h.html#74b044b7d09f44e887d9a5c61b6dfcdb">xdptx.h</a>, <a class="el" href="xdptx_8c.html#74b044b7d09f44e887d9a5c61b6dfcdb">xdptx.c</a><li>XDptx_CheckLinkStatus()
|
||||
: <a class="el" href="xdptx_8h.html#3cedae7883dc5cab5f15f8110805f2c6">xdptx.h</a>, <a class="el" href="xdptx_8c.html#3cedae7883dc5cab5f15f8110805f2c6">xdptx.c</a><li>XDptx_ClearMsaValues()
|
||||
: <a class="el" href="xdptx__spm_8c.html#b2120a4c08427e4e102efdfd17d65fac">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#b2120a4c08427e4e102efdfd17d65fac">xdptx.h</a><li>XDptx_ClearPayloadVcIdTable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#a023515f0fbe9fbfa26fb72ed5219579">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#a023515f0fbe9fbfa26fb72ed5219579">xdptx.h</a><li>XDptx_DisableMainLink()
|
||||
: <a class="el" href="xdptx_8h.html#c440c032b45acf3ae5be9eba37c9203e">xdptx.h</a>, <a class="el" href="xdptx_8c.html#c440c032b45acf3ae5be9eba37c9203e">xdptx.c</a><li>XDptx_DiscoverTopology()
|
||||
: <a class="el" href="xdptx__mst_8c.html#cb0e6bda66711f10a0ce352cbd61b0ab">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#cb0e6bda66711f10a0ce352cbd61b0ab">xdptx.h</a><li>XDptx_EnableMainLink()
|
||||
: <a class="el" href="xdptx_8h.html#7d10dab87f3f11b925e9780765c0ae08">xdptx.h</a>, <a class="el" href="xdptx_8c.html#7d10dab87f3f11b925e9780765c0ae08">xdptx.c</a><li>XDptx_EnableTrainAdaptive()
|
||||
: <a class="el" href="xdptx_8h.html#7d15cd84e2391c5d8f19c7fbeac1781a">xdptx.h</a>, <a class="el" href="xdptx_8c.html#7d15cd84e2391c5d8f19c7fbeac1781a">xdptx.c</a><li>XDptx_EstablishLink()
|
||||
: <a class="el" href="xdptx_8h.html#b567f6a342ca0e7c4ceef86ff1df87cf">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b567f6a342ca0e7c4ceef86ff1df87cf">xdptx.c</a><li>XDptx_FindAccessibleDpDevices()
|
||||
: <a class="el" href="xdptx__mst_8c.html#991faef9c1e7417849ee2c682a3033de">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#991faef9c1e7417849ee2c682a3033de">xdptx.h</a><li>XDptx_GetDispIdDataBlock()
|
||||
: <a class="el" href="xdptx__edid_8c.html#4ad4de26b5e25389163b42e50def32fb">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#4ad4de26b5e25389163b42e50def32fb">xdptx.h</a><li>XDptx_GetEdid()
|
||||
: <a class="el" href="xdptx__edid_8c.html#cdf3fcdd140ad27aacedc8852d43cdc5">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#cdf3fcdd140ad27aacedc8852d43cdc5">xdptx.h</a><li>XDptx_GetEdidBlock()
|
||||
: <a class="el" href="xdptx__edid_8c.html#f055e7ce4942e1bb7b0d20bc0d38d6c1">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#f055e7ce4942e1bb7b0d20bc0d38d6c1">xdptx.h</a><li>XDptx_GetGuid()
|
||||
: <a class="el" href="xdptx__mst_8c.html#f9dd742b76b327254d4e144ad015e261">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#f9dd742b76b327254d4e144ad015e261">xdptx.h</a><li>XDptx_GetRemoteEdid()
|
||||
: <a class="el" href="xdptx__edid_8c.html#504e1da83e392f0428ebf750f3fa5df5">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#504e1da83e392f0428ebf750f3fa5df5">xdptx.h</a><li>XDptx_GetRemoteEdidBlock()
|
||||
: <a class="el" href="xdptx__edid_8c.html#52517d09cc73a7e286d04790594a30c2">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#52517d09cc73a7e286d04790594a30c2">xdptx.h</a><li>XDptx_GetRemoteEdidDispIdExt()
|
||||
: <a class="el" href="xdptx__edid_8c.html#65c571add61a17c00ac380b24dbe9b98">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#65c571add61a17c00ac380b24dbe9b98">xdptx.h</a><li>XDptx_GetRemoteTiledDisplayDb()
|
||||
: <a class="el" href="xdptx__edid_8c.html#86ed8332a0bd5e0069132fe6bf945f21">xdptx_edid.c</a>, <a class="el" href="xdptx_8h.html#86ed8332a0bd5e0069132fe6bf945f21">xdptx.h</a><li>XDptx_GetRxCapabilities()
|
||||
: <a class="el" href="xdptx_8h.html#b8c55ba66858d6af8095f263ee308d2d">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b8c55ba66858d6af8095f263ee308d2d">xdptx.c</a><li>XDptx_HpdInterruptHandler()
|
||||
: <a class="el" href="xdptx__intr_8c.html#52950290a845ab93bac618ea8af9efc4">xdptx_intr.c</a>, <a class="el" href="xdptx_8h.html#52950290a845ab93bac618ea8af9efc4">xdptx.h</a><li>XDptx_IicRead()
|
||||
: <a class="el" href="xdptx_8h.html#c46b9e42cbf67c0f95fcbeb54b469839">xdptx.h</a>, <a class="el" href="xdptx_8c.html#c46b9e42cbf67c0f95fcbeb54b469839">xdptx.c</a><li>XDptx_IicWrite()
|
||||
: <a class="el" href="xdptx_8h.html#eaac8c34e7831b805916a05a8946fa29">xdptx.h</a>, <a class="el" href="xdptx_8c.html#eaac8c34e7831b805916a05a8946fa29">xdptx.c</a><li>XDptx_InitializeTx()
|
||||
: <a class="el" href="xdptx_8h.html#9ebb3ed7a51593c63fbd31ea14924a49">xdptx.h</a>, <a class="el" href="xdptx_8c.html#9ebb3ed7a51593c63fbd31ea14924a49">xdptx.c</a><li>XDptx_IsConnected()
|
||||
: <a class="el" href="xdptx_8h.html#6e793e6d9919548dc5396e7aba1cf77b">xdptx.h</a>, <a class="el" href="xdptx_8c.html#6e793e6d9919548dc5396e7aba1cf77b">xdptx.c</a><li>XDptx_LookupConfig()
|
||||
: <a class="el" href="xdptx__sinit_8c.html#696416992bebdddc0fad449fe7afe24f">xdptx_sinit.c</a>, <a class="el" href="xdptx_8h.html#696416992bebdddc0fad449fe7afe24f">xdptx.h</a><li>XDptx_MstCapable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#688ad3269be26bc021855c7f8353883e">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#688ad3269be26bc021855c7f8353883e">xdptx.h</a><li>XDptx_MstCfgModeDisable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#7615c8afb7181ef0857c8d2b6973499a">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#7615c8afb7181ef0857c8d2b6973499a">xdptx.h</a><li>XDptx_MstCfgModeEnable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d7e8bb68f2e7c81be8ffad72b57601ff">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d7e8bb68f2e7c81be8ffad72b57601ff">xdptx.h</a><li>XDptx_MstCfgStreamDisable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#026e20a4f7d12c3a0f6aa6b7ebcb9461">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#026e20a4f7d12c3a0f6aa6b7ebcb9461">xdptx.h</a><li>XDptx_MstCfgStreamEnable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#ac2290634f6866f2deb960f6714aff2e">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#ac2290634f6866f2deb960f6714aff2e">xdptx.h</a><li>XDptx_MstDisable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d743a4fa1c3ebd1170df1042339146b1">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d743a4fa1c3ebd1170df1042339146b1">xdptx.h</a><li>XDptx_MstEnable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#9e21cc5e80eee639bfcb6d86db3c63e2">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#9e21cc5e80eee639bfcb6d86db3c63e2">xdptx.h</a><li>XDptx_MstStreamIsEnabled()
|
||||
: <a class="el" href="xdptx__mst_8c.html#737c353ccd6a4700ac71cff76d28c8ce">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#737c353ccd6a4700ac71cff76d28c8ce">xdptx.h</a><li>XDptx_RemoteDpcdRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#333314b39c0f89f069e4af89b2f9bcb0">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#333314b39c0f89f069e4af89b2f9bcb0">xdptx.h</a><li>XDptx_RemoteDpcdWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#5497755a5ad4e92aeb4819804aebb336">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#5497755a5ad4e92aeb4819804aebb336">xdptx.h</a><li>XDptx_RemoteIicRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d33b578260cff02298873bb62a697876">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d33b578260cff02298873bb62a697876">xdptx.h</a><li>XDptx_RemoteIicWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#3926b013ecc4f15d82ef39d07447ae4a">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#3926b013ecc4f15d82ef39d07447ae4a">xdptx.h</a><li>XDptx_ResetPhy()
|
||||
: <a class="el" href="xdptx_8h.html#ebfd44b68145676eebcc0d463c9b4d6f">xdptx.h</a>, <a class="el" href="xdptx_8c.html#ebfd44b68145676eebcc0d463c9b4d6f">xdptx.c</a><li>XDptx_SelfTest()
|
||||
: <a class="el" href="xdptx__selftest_8c.html#0f3e36d00cbb3c9550cf880bb03cfea9">xdptx_selftest.c</a>, <a class="el" href="xdptx_8h.html#0f3e36d00cbb3c9550cf880bb03cfea9">xdptx.h</a><li>XDptx_SendSbMsgAllocatePayload()
|
||||
: <a class="el" href="xdptx__mst_8c.html#c8547de5fd9d0c04d024f8721f3ed8bb">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#c8547de5fd9d0c04d024f8721f3ed8bb">xdptx.h</a><li>XDptx_SendSbMsgClearPayloadIdTable()
|
||||
: <a class="el" href="xdptx__mst_8c.html#46bdd4a2732e25bc1faeb119b399dacf">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#46bdd4a2732e25bc1faeb119b399dacf">xdptx.h</a><li>XDptx_SendSbMsgEnumPathResources()
|
||||
: <a class="el" href="xdptx__mst_8c.html#3f5e598656e5badca2846be6c1b068a0">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#3f5e598656e5badca2846be6c1b068a0">xdptx.h</a><li>XDptx_SendSbMsgLinkAddress()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d8fc0c473eaa6ad66997bac406c664ba">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d8fc0c473eaa6ad66997bac406c664ba">xdptx.h</a><li>XDptx_SendSbMsgRemoteDpcdRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#0e865810199439fc345dd4858e0e077c">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#0e865810199439fc345dd4858e0e077c">xdptx.h</a><li>XDptx_SendSbMsgRemoteDpcdWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#22edd6fd3495a31fab9e0397161e76d3">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#22edd6fd3495a31fab9e0397161e76d3">xdptx.h</a><li>XDptx_SendSbMsgRemoteIicRead()
|
||||
: <a class="el" href="xdptx__mst_8c.html#d848e62d19c981547a4d301cee71c0ba">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#d848e62d19c981547a4d301cee71c0ba">xdptx.h</a><li>XDptx_SendSbMsgRemoteIicWrite()
|
||||
: <a class="el" href="xdptx__mst_8c.html#8c528a3f1c067232e9359f1006271c32">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#8c528a3f1c067232e9359f1006271c32">xdptx.h</a><li>XDptx_SetDownspread()
|
||||
: <a class="el" href="xdptx_8h.html#b030d699fd11a5691295ac4ab3c48c27">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b030d699fd11a5691295ac4ab3c48c27">xdptx.c</a><li>XDptx_SetEnhancedFrameMode()
|
||||
: <a class="el" href="xdptx_8h.html#92d90bd5e3b79ba1ba2da23815af3de9">xdptx.h</a>, <a class="el" href="xdptx_8c.html#92d90bd5e3b79ba1ba2da23815af3de9">xdptx.c</a><li>XDptx_SetHasRedriverInPath()
|
||||
: <a class="el" href="xdptx_8h.html#b93d01339bd8c577ea22804786ce3c28">xdptx.h</a>, <a class="el" href="xdptx_8c.html#b93d01339bd8c577ea22804786ce3c28">xdptx.c</a><li>XDptx_SetHpdEventHandler()
|
||||
: <a class="el" href="xdptx__intr_8c.html#af4bdfbe0785e1d0ec3d80edec1a86cb">xdptx_intr.c</a>, <a class="el" href="xdptx_8h.html#af4bdfbe0785e1d0ec3d80edec1a86cb">xdptx.h</a><li>XDptx_SetHpdPulseHandler()
|
||||
: <a class="el" href="xdptx__intr_8c.html#2ab1eec64ba571d155e56bb433fea5bf">xdptx_intr.c</a>, <a class="el" href="xdptx_8h.html#2ab1eec64ba571d155e56bb433fea5bf">xdptx.h</a><li>XDptx_SetLaneCount()
|
||||
: <a class="el" href="xdptx_8h.html#115ea420baf50627b248038ef176a068">xdptx.h</a>, <a class="el" href="xdptx_8c.html#115ea420baf50627b248038ef176a068">xdptx.c</a><li>XDptx_SetLinkRate()
|
||||
: <a class="el" href="xdptx_8h.html#83816bbeac40d06d6fc9e37e310b0fce">xdptx.h</a>, <a class="el" href="xdptx_8c.html#83816bbeac40d06d6fc9e37e310b0fce">xdptx.c</a><li>XDptx_SetMsaValues()
|
||||
: <a class="el" href="xdptx__spm_8c.html#93def464f8e63597dfde42ea658ec2a6">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#93def464f8e63597dfde42ea658ec2a6">xdptx.h</a><li>XDptx_SetScrambler()
|
||||
: <a class="el" href="xdptx_8h.html#2725860ddb4c74bf0abca8878dd987b3">xdptx.h</a>, <a class="el" href="xdptx_8c.html#2725860ddb4c74bf0abca8878dd987b3">xdptx.c</a><li>XDptx_SetStreamSelectFromSinkList()
|
||||
: <a class="el" href="xdptx__mst_8c.html#8363e32d51c93e25b85a802b70a3715c">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#8363e32d51c93e25b85a802b70a3715c">xdptx.h</a><li>XDptx_SetStreamSinkRad()
|
||||
: <a class="el" href="xdptx__mst_8c.html#f4716adc915bedad28b2bf0b1d7bd4fa">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#f4716adc915bedad28b2bf0b1d7bd4fa">xdptx.h</a><li>XDptx_SetUserTimerHandler()
|
||||
: <a class="el" href="xdptx_8h.html#2ccd64b33b2bd65423338312aa2977b5">xdptx.h</a>, <a class="el" href="xdptx_8c.html#2ccd64b33b2bd65423338312aa2977b5">xdptx.c</a><li>XDptx_SetVideoMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#1c1894cfa6ff7425bb8cdfa19847cd38">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#1c1894cfa6ff7425bb8cdfa19847cd38">xdptx.h</a><li>XDptx_TopologySortSinksByTiling()
|
||||
: <a class="el" href="xdptx__mst_8c.html#b6b286732cdad782f909c9461ea0f508">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#b6b286732cdad782f909c9461ea0f508">xdptx.h</a><li>XDptx_TopologySwapSinks()
|
||||
: <a class="el" href="xdptx__mst_8c.html#ec0c3b81cece2bd4e51188e2bb50f13b">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#ec0c3b81cece2bd4e51188e2bb50f13b">xdptx.h</a><li>XDptx_WaitUs()
|
||||
: <a class="el" href="xdptx_8h.html#6c460b31a3226815a96543e9c4c161fe">xdptx.h</a>, <a class="el" href="xdptx_8c.html#6c460b31a3226815a96543e9c4c161fe">xdptx.c</a><li>XDptx_WriteGuid()
|
||||
: <a class="el" href="xdptx__mst_8c.html#3db9ce86a190354ab3c671faf5991a8f">xdptx_mst.c</a>, <a class="el" href="xdptx_8h.html#3db9ce86a190354ab3c671faf5991a8f">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
42
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_type.html
Executable file
42
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_type.html
Executable file
|
|
@ -0,0 +1,42 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li id="current"><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>XDptx_HpdEventHandler
|
||||
: <a class="el" href="xdptx_8h.html#6f6cee9a7863df256adb35802fc65017">xdptx.h</a><li>XDptx_HpdPulseHandler
|
||||
: <a class="el" href="xdptx_8h.html#41e04c356fe95636134164b0f03bca9b">xdptx.h</a><li>XDptx_TimerHandler
|
||||
: <a class="el" href="xdptx_8h.html#1cc5fb6d828593d0e83a4fe44eb0d87d">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
43
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_vars.html
Executable file
43
XilinxProcessorIPLib/drivers/dp/doc/html/api/globals_vars.html
Executable file
|
|
@ -0,0 +1,43 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li id="current"><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_enum.html"><span>Enumerations</span></a></li>
|
||||
<li><a href="globals_eval.html"><span>Enumerator</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>GuidTable
|
||||
: <a class="el" href="xdptx__mst_8c.html#ebcfa89429e19f3b373bf81dd3f18740">xdptx_mst.c</a><li>ResetValues
|
||||
: <a class="el" href="xdptx__selftest_8c.html#65af729ef8da95153475f2224b4329c2">xdptx_selftest.c</a><li>ResetValuesMsa
|
||||
: <a class="el" href="xdptx__selftest_8c.html#7a190e8d88f6885fdd71e6bbda945c72">xdptx_selftest.c</a><li>XDptx_ConfigTable
|
||||
: <a class="el" href="xdptx__sinit_8c.html#277a1798d54193f6873982d7ca66ed39">xdptx_sinit.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
21
XilinxProcessorIPLib/drivers/dp/doc/html/api/index.html
Executable file
21
XilinxProcessorIPLib/drivers/dp/doc/html/api/index.html
Executable file
|
|
@ -0,0 +1,21 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Main Page
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<h1></h1>
|
||||
<p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
43
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx-members.html
Executable file
43
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx-members.html
Executable file
|
|
@ -0,0 +1,43 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx.html">XDptx</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#2fdb769ccb56ed1c526f6997e97018d4">AuxDelayUs</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#2e3feb5199d0d6af0831d8ecf48cff0d">BoardChar</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#e3324edbc15a89340bdee2bbf56244df">Config</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#71e5740080d8cced1992a1ab73ccc0f2">HpdEventCallbackRef</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#5db934dcfed963ee3fba51bfe087a1f7">HpdEventHandler</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#c07874d7442b5365af712ba8bd2f62cf">HpdPulseCallbackRef</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#45338386a1abde48a38eea87b0aaef7b">HpdPulseHandler</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#015d2c021b09d7574d280aa6ce4d9f80">IsReady</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#edc0f840ca6831c1a035724ed6cbe9b3">LinkConfig</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#7b242be9fdb9add31d4c9693365dc768">MsaConfig</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#a4c0fd5e83c23fd09c3c5a75cf76a7a9">MstEnable</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#6261b624a5d125375b764bf885c7f05d">MstStreamConfig</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#480b18d97985dd93a873f14bf27a8ea1">RxConfig</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#02d8905bbfcbc162babc2de8b5191d5d">SbMsgDelayUs</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#6af805e431d276c4a649c9fdc94ea2e7">Topology</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#ea0d9e963446066ccce156f4ca642408">TrainAdaptive</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#fd631f0f90f6cdbbba8848ca5a216ba8">UserTimerPtr</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#fd2cbc84e307d853f48f19d9d8aedc06">UserTimerWaitUs</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
342
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx.html
Executable file
342
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx.html
Executable file
|
|
@ -0,0 +1,342 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx Struct Reference</h1><!-- doxytag: class="XDptx" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
The <a class="el" href="struct_x_dptx.html">XDptx</a> driver instance data. The user is required to allocate a variable of this type for every <a class="el" href="struct_x_dptx.html">XDptx</a> device in the system. A pointer to a variable of this type is then passed to the driver API functions.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#a4c0fd5e83c23fd09c3c5a75cf76a7a9">MstEnable</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#015d2c021b09d7574d280aa6ce4d9f80">IsReady</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#ea0d9e963446066ccce156f4ca642408">TrainAdaptive</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#e3324edbc15a89340bdee2bbf56244df">Config</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___sink_config.html">XDptx_SinkConfig</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#480b18d97985dd93a873f14bf27a8ea1">RxConfig</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#edc0f840ca6831c1a035724ed6cbe9b3">LinkConfig</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#2e3feb5199d0d6af0831d8ecf48cff0d">BoardChar</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#7b242be9fdb9add31d4c9693365dc768">MsaConfig</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#6261b624a5d125375b764bf885c7f05d">MstStreamConfig</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#6af805e431d276c4a649c9fdc94ea2e7">Topology</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#2fdb769ccb56ed1c526f6997e97018d4">AuxDelayUs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#02d8905bbfcbc162babc2de8b5191d5d">SbMsgDelayUs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="xdptx_8h.html#1cc5fb6d828593d0e83a4fe44eb0d87d">XDptx_TimerHandler</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#fd2cbc84e307d853f48f19d9d8aedc06">UserTimerWaitUs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#fd631f0f90f6cdbbba8848ca5a216ba8">UserTimerPtr</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="xdptx_8h.html#6f6cee9a7863df256adb35802fc65017">XDptx_HpdEventHandler</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#5db934dcfed963ee3fba51bfe087a1f7">HpdEventHandler</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#71e5740080d8cced1992a1ab73ccc0f2">HpdEventCallbackRef</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="xdptx_8h.html#41e04c356fe95636134164b0f03bca9b">XDptx_HpdPulseHandler</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#45338386a1abde48a38eea87b0aaef7b">HpdPulseHandler</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#c07874d7442b5365af712ba8bd2f62cf">HpdPulseCallbackRef</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="2fdb769ccb56ed1c526f6997e97018d4"></a><!-- doxytag: member="XDptx::AuxDelayUs" ref="2fdb769ccb56ed1c526f6997e97018d4" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx.html#2fdb769ccb56ed1c526f6997e97018d4">XDptx::AuxDelayUs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Amount of latency in micro- seconds to use between AUX transactions.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2e3feb5199d0d6af0831d8ecf48cff0d"></a><!-- doxytag: member="XDptx::BoardChar" ref="2e3feb5199d0d6af0831d8ecf48cff0d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a> <a class="el" href="struct_x_dptx.html#2e3feb5199d0d6af0831d8ecf48cff0d">XDptx::BoardChar</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Some board characteristics information that affects link training.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="e3324edbc15a89340bdee2bbf56244df"></a><!-- doxytag: member="XDptx::Config" ref="e3324edbc15a89340bdee2bbf56244df" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a> <a class="el" href="struct_x_dptx.html#e3324edbc15a89340bdee2bbf56244df">XDptx::Config</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configuration structure for the DisplayPort TX core.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="71e5740080d8cced1992a1ab73ccc0f2"></a><!-- doxytag: member="XDptx::HpdEventCallbackRef" ref="71e5740080d8cced1992a1ab73ccc0f2" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void* <a class="el" href="struct_x_dptx.html#71e5740080d8cced1992a1ab73ccc0f2">XDptx::HpdEventCallbackRef</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
A pointer to the user data passed to the HPD event callback function.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5db934dcfed963ee3fba51bfe087a1f7"></a><!-- doxytag: member="XDptx::HpdEventHandler" ref="5db934dcfed963ee3fba51bfe087a1f7" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="xdptx_8h.html#6f6cee9a7863df256adb35802fc65017">XDptx_HpdEventHandler</a> <a class="el" href="struct_x_dptx.html#5db934dcfed963ee3fba51bfe087a1f7">XDptx::HpdEventHandler</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Callback function for Hot- Plug-Detect (HPD) event interrupts.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="c07874d7442b5365af712ba8bd2f62cf"></a><!-- doxytag: member="XDptx::HpdPulseCallbackRef" ref="c07874d7442b5365af712ba8bd2f62cf" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void* <a class="el" href="struct_x_dptx.html#c07874d7442b5365af712ba8bd2f62cf">XDptx::HpdPulseCallbackRef</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
A pointer to the user data passed to the HPD pulse callback function.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="45338386a1abde48a38eea87b0aaef7b"></a><!-- doxytag: member="XDptx::HpdPulseHandler" ref="45338386a1abde48a38eea87b0aaef7b" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="xdptx_8h.html#41e04c356fe95636134164b0f03bca9b">XDptx_HpdPulseHandler</a> <a class="el" href="struct_x_dptx.html#45338386a1abde48a38eea87b0aaef7b">XDptx::HpdPulseHandler</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Callback function for Hot- Plug-Detect (HPD) pulse interrupts.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="015d2c021b09d7574d280aa6ce4d9f80"></a><!-- doxytag: member="XDptx::IsReady" ref="015d2c021b09d7574d280aa6ce4d9f80" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx.html#015d2c021b09d7574d280aa6ce4d9f80">XDptx::IsReady</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Device is initialized and ready.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="edc0f840ca6831c1a035724ed6cbe9b3"></a><!-- doxytag: member="XDptx::LinkConfig" ref="edc0f840ca6831c1a035724ed6cbe9b3" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a> <a class="el" href="struct_x_dptx.html#edc0f840ca6831c1a035724ed6cbe9b3">XDptx::LinkConfig</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configuration structure for the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7b242be9fdb9add31d4c9693365dc768"></a><!-- doxytag: member="XDptx::MsaConfig" ref="7b242be9fdb9add31d4c9693365dc768" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a> <a class="el" href="struct_x_dptx.html#7b242be9fdb9add31d4c9693365dc768">XDptx::MsaConfig</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configuration structure for the main stream attributes (MSA). Each stream has its own set of attributes. When MST mode is disabled, only MsaConfig[0] is used.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="a4c0fd5e83c23fd09c3c5a75cf76a7a9"></a><!-- doxytag: member="XDptx::MstEnable" ref="a4c0fd5e83c23fd09c3c5a75cf76a7a9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx.html#a4c0fd5e83c23fd09c3c5a75cf76a7a9">XDptx::MstEnable</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Multi-stream transport (MST) mode. Enables functionality, allowing multiple streams to be sent over the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6261b624a5d125375b764bf885c7f05d"></a><!-- doxytag: member="XDptx::MstStreamConfig" ref="6261b624a5d125375b764bf885c7f05d" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a> <a class="el" href="struct_x_dptx.html#6261b624a5d125375b764bf885c7f05d">XDptx::MstStreamConfig</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configuration structure for a multi-stream transport (MST) stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="480b18d97985dd93a873f14bf27a8ea1"></a><!-- doxytag: member="XDptx::RxConfig" ref="480b18d97985dd93a873f14bf27a8ea1" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___sink_config.html">XDptx_SinkConfig</a> <a class="el" href="struct_x_dptx.html#480b18d97985dd93a873f14bf27a8ea1">XDptx::RxConfig</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configuration structure for the RX device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="02d8905bbfcbc162babc2de8b5191d5d"></a><!-- doxytag: member="XDptx::SbMsgDelayUs" ref="02d8905bbfcbc162babc2de8b5191d5d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx.html#02d8905bbfcbc162babc2de8b5191d5d">XDptx::SbMsgDelayUs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Amount of latency in micro- seconds to use between sideband messages for multi-stream transport (MST) mode.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6af805e431d276c4a649c9fdc94ea2e7"></a><!-- doxytag: member="XDptx::Topology" ref="6af805e431d276c4a649c9fdc94ea2e7" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a> <a class="el" href="struct_x_dptx.html#6af805e431d276c4a649c9fdc94ea2e7">XDptx::Topology</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The topology of connected downstream DisplayPort devices when the driver is running in MST mode.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="ea0d9e963446066ccce156f4ca642408"></a><!-- doxytag: member="XDptx::TrainAdaptive" ref="ea0d9e963446066ccce156f4ca642408" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx.html#ea0d9e963446066ccce156f4ca642408">XDptx::TrainAdaptive</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Downshift lane count and link rate if necessary during training.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fd631f0f90f6cdbbba8848ca5a216ba8"></a><!-- doxytag: member="XDptx::UserTimerPtr" ref="fd631f0f90f6cdbbba8848ca5a216ba8" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void* <a class="el" href="struct_x_dptx.html#fd631f0f90f6cdbbba8848ca5a216ba8">XDptx::UserTimerPtr</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Pointer to a timer instance used by the custom user delay/sleep function.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fd2cbc84e307d853f48f19d9d8aedc06"></a><!-- doxytag: member="XDptx::UserTimerWaitUs" ref="fd2cbc84e307d853f48f19d9d8aedc06" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="xdptx_8h.html#1cc5fb6d828593d0e83a4fe44eb0d87d">XDptx_TimerHandler</a> <a class="el" href="struct_x_dptx.html#fd2cbc84e307d853f48f19d9d8aedc06">XDptx::UserTimerWaitUs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Custom user function for delay/sleep.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_AuxTransaction Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___aux_transaction.html">XDptx_AuxTransaction</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___aux_transaction.html#070f26779477d477d9f2cc4429b483e8">Address</a></td><td><a class="el" href="struct_x_dptx___aux_transaction.html">XDptx_AuxTransaction</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___aux_transaction.html#d2a8df61186824f7dd4c5beabf80506d">CmdCode</a></td><td><a class="el" href="struct_x_dptx___aux_transaction.html">XDptx_AuxTransaction</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___aux_transaction.html#7da0bfdcb3040c60f229626e088d3628">Data</a></td><td><a class="el" href="struct_x_dptx___aux_transaction.html">XDptx_AuxTransaction</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___aux_transaction.html#07719007eb2231016d5dfb1bffd1f35f">NumBytes</a></td><td><a class="el" href="struct_x_dptx___aux_transaction.html">XDptx_AuxTransaction</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,102 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_AuxTransaction Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_AuxTransaction Struct Reference</h1><!-- doxytag: class="XDptx_AuxTransaction" --><a href="struct_x_dptx___aux_transaction-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes an AUX transaction.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___aux_transaction.html#d2a8df61186824f7dd4c5beabf80506d">CmdCode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___aux_transaction.html#07719007eb2231016d5dfb1bffd1f35f">NumBytes</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___aux_transaction.html#070f26779477d477d9f2cc4429b483e8">Address</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___aux_transaction.html#7da0bfdcb3040c60f229626e088d3628">Data</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="070f26779477d477d9f2cc4429b483e8"></a><!-- doxytag: member="XDptx_AuxTransaction::Address" ref="070f26779477d477d9f2cc4429b483e8" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___aux_transaction.html#070f26779477d477d9f2cc4429b483e8">XDptx_AuxTransaction::Address</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The AUX or I2C start address that the AUX transaction will perform work on.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d2a8df61186824f7dd4c5beabf80506d"></a><!-- doxytag: member="XDptx_AuxTransaction::CmdCode" ref="d2a8df61186824f7dd4c5beabf80506d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u16 <a class="el" href="struct_x_dptx___aux_transaction.html#d2a8df61186824f7dd4c5beabf80506d">XDptx_AuxTransaction::CmdCode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The AUX command code that specifies what type of AUX transaction is taking place.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7da0bfdcb3040c60f229626e088d3628"></a><!-- doxytag: member="XDptx_AuxTransaction::Data" ref="7da0bfdcb3040c60f229626e088d3628" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8* <a class="el" href="struct_x_dptx___aux_transaction.html#7da0bfdcb3040c60f229626e088d3628">XDptx_AuxTransaction::Data</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The data buffer that will store the data read from AUX read transactions or the data to write for AUX write transactions.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="07719007eb2231016d5dfb1bffd1f35f"></a><!-- doxytag: member="XDptx_AuxTransaction::NumBytes" ref="07719007eb2231016d5dfb1bffd1f35f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___aux_transaction.html#07719007eb2231016d5dfb1bffd1f35f">XDptx_AuxTransaction::NumBytes</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of bytes that the AUX transaction will perform work on.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8c.html">xdptx.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_BoardChar Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___board_char.html#f0c1cc4e8db9d5eea7d122ae97d72898">HasRedriverInPath</a></td><td><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___board_char.html#64d00c6039ca8bee1786aa5400d801c0">TxPeLevels</a></td><td><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___board_char.html#20b791eed1817bed0e9b1903843971c4">TxVsLevels</a></td><td><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___board_char.html#98dcfd0a58c03facb5e27533fb093673">TxVsOffset</a></td><td><a class="el" href="struct_x_dptx___board_char.html">XDptx_BoardChar</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
104
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___board_char.html
Executable file
104
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___board_char.html
Executable file
|
|
@ -0,0 +1,104 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_BoardChar Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_BoardChar Struct Reference</h1><!-- doxytag: class="XDptx_BoardChar" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___board_char-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes some board characteristics information that affects link training.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___board_char.html#f0c1cc4e8db9d5eea7d122ae97d72898">HasRedriverInPath</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___board_char.html#20b791eed1817bed0e9b1903843971c4">TxVsLevels</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___board_char.html#64d00c6039ca8bee1786aa5400d801c0">TxPeLevels</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___board_char.html#98dcfd0a58c03facb5e27533fb093673">TxVsOffset</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="f0c1cc4e8db9d5eea7d122ae97d72898"></a><!-- doxytag: member="XDptx_BoardChar::HasRedriverInPath" ref="f0c1cc4e8db9d5eea7d122ae97d72898" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___board_char.html#f0c1cc4e8db9d5eea7d122ae97d72898">XDptx_BoardChar::HasRedriverInPath</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Redriver in path requires different voltage swing and pre-emphasis.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="64d00c6039ca8bee1786aa5400d801c0"></a><!-- doxytag: member="XDptx_BoardChar::TxPeLevels" ref="64d00c6039ca8bee1786aa5400d801c0" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___board_char.html#64d00c6039ca8bee1786aa5400d801c0">XDptx_BoardChar::TxPeLevels</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The pre-emphasis/cursor level to be used by the DisplayPort TX.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="20b791eed1817bed0e9b1903843971c4"></a><!-- doxytag: member="XDptx_BoardChar::TxVsLevels" ref="20b791eed1817bed0e9b1903843971c4" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___board_char.html#20b791eed1817bed0e9b1903843971c4">XDptx_BoardChar::TxVsLevels</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The voltage swing levels to be used by the DisplayPort TX.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="98dcfd0a58c03facb5e27533fb093673"></a><!-- doxytag: member="XDptx_BoardChar::TxVsOffset" ref="98dcfd0a58c03facb5e27533fb093673" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___board_char.html#98dcfd0a58c03facb5e27533fb093673">XDptx_BoardChar::TxVsOffset</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Voltage swing compensation offset used when pre-emphasis is used.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_Config Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___config.html">XDptx_Config</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#46946d5bdc36055fa2459fd4d8e1c11d">BaseAddr</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#e2afeef00c31ea626b874e45fb2d2680">DeviceId</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#2043b0951fa248834d4306f20c9dc356">DpProtocol</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#1a6f1f6a21a776b98d1f260cbaa036e6">DualPixelEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#144510f23c003b3ee2c4e566a7e5c6b1">MaxBitsPerColor</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#fe5e452f3a20a37cbc5a38da108e733f">MaxLaneCount</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#5d9e90fba3360ed16662e4fd4f3db21c">MaxLinkRate</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#b2f1632d02f494b95062941bcd286d00">MstSupport</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#7713a1d6ad88e93ad7a41036f7e41052">NumAudioChs</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#12d443c35685ba9d24dd788a51dfffc8">NumMstStreams</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#929b4359944d85d520b4c14634ae392a">PayloadDataWidth</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#61967a7b8aa8a673c6f1cf4785d50b30">QuadPixelEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#fc601e4130de1b72955b9443ea3c3442">SAxiClkHz</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#efdd88941a72cdf752e1d6bed8e8a753">SecondaryChEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#c8a1e41054c82ae7665abbc840a46a23">YCrCbEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#614ad0c0300186a61fddacb0422bc3cf">YOnlyEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
308
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___config.html
Executable file
308
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___config.html
Executable file
|
|
@ -0,0 +1,308 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_Config Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_Config Struct Reference</h1><!-- doxytag: class="XDptx_Config" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___config-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains configuration information for the DisplayPort TX core.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#e2afeef00c31ea626b874e45fb2d2680">DeviceId</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#46946d5bdc36055fa2459fd4d8e1c11d">BaseAddr</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#fc601e4130de1b72955b9443ea3c3442">SAxiClkHz</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#fe5e452f3a20a37cbc5a38da108e733f">MaxLaneCount</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#5d9e90fba3360ed16662e4fd4f3db21c">MaxLinkRate</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#144510f23c003b3ee2c4e566a7e5c6b1">MaxBitsPerColor</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#61967a7b8aa8a673c6f1cf4785d50b30">QuadPixelEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#1a6f1f6a21a776b98d1f260cbaa036e6">DualPixelEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#c8a1e41054c82ae7665abbc840a46a23">YCrCbEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#614ad0c0300186a61fddacb0422bc3cf">YOnlyEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#929b4359944d85d520b4c14634ae392a">PayloadDataWidth</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#efdd88941a72cdf752e1d6bed8e8a753">SecondaryChEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#7713a1d6ad88e93ad7a41036f7e41052">NumAudioChs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#b2f1632d02f494b95062941bcd286d00">MstSupport</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#12d443c35685ba9d24dd788a51dfffc8">NumMstStreams</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#2043b0951fa248834d4306f20c9dc356">DpProtocol</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="46946d5bdc36055fa2459fd4d8e1c11d"></a><!-- doxytag: member="XDptx_Config::BaseAddr" ref="46946d5bdc36055fa2459fd4d8e1c11d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___config.html#46946d5bdc36055fa2459fd4d8e1c11d">XDptx_Config::BaseAddr</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The base address of the core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="e2afeef00c31ea626b874e45fb2d2680"></a><!-- doxytag: member="XDptx_Config::DeviceId" ref="e2afeef00c31ea626b874e45fb2d2680" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u16 <a class="el" href="struct_x_dptx___config.html#e2afeef00c31ea626b874e45fb2d2680">XDptx_Config::DeviceId</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Device instance ID.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2043b0951fa248834d4306f20c9dc356"></a><!-- doxytag: member="XDptx_Config::DpProtocol" ref="2043b0951fa248834d4306f20c9dc356" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#2043b0951fa248834d4306f20c9dc356">XDptx_Config::DpProtocol</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The DisplayPort protocol version that this core instance is configured for. 0 = v1.1a, 1 = v1.2.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="1a6f1f6a21a776b98d1f260cbaa036e6"></a><!-- doxytag: member="XDptx_Config::DualPixelEn" ref="1a6f1f6a21a776b98d1f260cbaa036e6" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#1a6f1f6a21a776b98d1f260cbaa036e6">XDptx_Config::DualPixelEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Dual pixel support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="144510f23c003b3ee2c4e566a7e5c6b1"></a><!-- doxytag: member="XDptx_Config::MaxBitsPerColor" ref="144510f23c003b3ee2c4e566a7e5c6b1" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#144510f23c003b3ee2c4e566a7e5c6b1">XDptx_Config::MaxBitsPerColor</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum bits/color supported by this core instance
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fe5e452f3a20a37cbc5a38da108e733f"></a><!-- doxytag: member="XDptx_Config::MaxLaneCount" ref="fe5e452f3a20a37cbc5a38da108e733f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#fe5e452f3a20a37cbc5a38da108e733f">XDptx_Config::MaxLaneCount</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum lane count supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5d9e90fba3360ed16662e4fd4f3db21c"></a><!-- doxytag: member="XDptx_Config::MaxLinkRate" ref="5d9e90fba3360ed16662e4fd4f3db21c" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#5d9e90fba3360ed16662e4fd4f3db21c">XDptx_Config::MaxLinkRate</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum link rate supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b2f1632d02f494b95062941bcd286d00"></a><!-- doxytag: member="XDptx_Config::MstSupport" ref="b2f1632d02f494b95062941bcd286d00" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#b2f1632d02f494b95062941bcd286d00">XDptx_Config::MstSupport</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Multi-stream transport (MST) mode is enabled by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7713a1d6ad88e93ad7a41036f7e41052"></a><!-- doxytag: member="XDptx_Config::NumAudioChs" ref="7713a1d6ad88e93ad7a41036f7e41052" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#7713a1d6ad88e93ad7a41036f7e41052">XDptx_Config::NumAudioChs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of audio channels supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="12d443c35685ba9d24dd788a51dfffc8"></a><!-- doxytag: member="XDptx_Config::NumMstStreams" ref="12d443c35685ba9d24dd788a51dfffc8" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#12d443c35685ba9d24dd788a51dfffc8">XDptx_Config::NumMstStreams</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of MST streams supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="929b4359944d85d520b4c14634ae392a"></a><!-- doxytag: member="XDptx_Config::PayloadDataWidth" ref="929b4359944d85d520b4c14634ae392a" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#929b4359944d85d520b4c14634ae392a">XDptx_Config::PayloadDataWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The payload data width used by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="61967a7b8aa8a673c6f1cf4785d50b30"></a><!-- doxytag: member="XDptx_Config::QuadPixelEn" ref="61967a7b8aa8a673c6f1cf4785d50b30" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#61967a7b8aa8a673c6f1cf4785d50b30">XDptx_Config::QuadPixelEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Quad pixel support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fc601e4130de1b72955b9443ea3c3442"></a><!-- doxytag: member="XDptx_Config::SAxiClkHz" ref="fc601e4130de1b72955b9443ea3c3442" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___config.html#fc601e4130de1b72955b9443ea3c3442">XDptx_Config::SAxiClkHz</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The clock frequency of the core instance's S_AXI_ACLK port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="efdd88941a72cdf752e1d6bed8e8a753"></a><!-- doxytag: member="XDptx_Config::SecondaryChEn" ref="efdd88941a72cdf752e1d6bed8e8a753" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#efdd88941a72cdf752e1d6bed8e8a753">XDptx_Config::SecondaryChEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This core instance supports audio packets being sent by the secondary channel.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="c8a1e41054c82ae7665abbc840a46a23"></a><!-- doxytag: member="XDptx_Config::YCrCbEn" ref="c8a1e41054c82ae7665abbc840a46a23" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#c8a1e41054c82ae7665abbc840a46a23">XDptx_Config::YCrCbEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
YCrCb format support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="614ad0c0300186a61fddacb0422bc3cf"></a><!-- doxytag: member="XDptx_Config::YOnlyEn" ref="614ad0c0300186a61fddacb0422bc3cf" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#614ad0c0300186a61fddacb0422bc3cf">XDptx_Config::YOnlyEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
YOnly format support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_DmtMode Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#c0776945da3c122eb57e1229b17ccaed">DmtId</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#e3f057b9bc6677641440e51d37370426">HBackPorch</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#5c42fec92a1182944a61fddd5e16a95e">HFrontPorch</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#1529828ed4ab61fa0a8f73a3ef58ebad">HResolution</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#f792ca11331a8f6f97db131a66b1afa9">HSyncPolarity</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#8f34bec755f4274423a826d141619e48">HSyncPulseWidth</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#d565a82d3eddd1ea741edad99c1e7361">Interlaced</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#a8befc410e54eb85edb49f4712a667c9">PixelClkKhz</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#7da956a69abe62b28dffae47b6962ec3">VBackPorch</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#23865e6f7e3265af6b75d2dcd0144a60">VFrontPorch</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#8b968433d15f6bb03512ee597ebef0d5">VideoMode</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#6adcccc2989a52ded87b891dbc0b3269">VResolution</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#78ca69a627d19d1053438e5b33f016eb">VSyncPolarity</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___dmt_mode.html#4bcfd12f87dbbdd45c73e7bfe97f7237">VSyncPulseWidth</a></td><td><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
274
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___dmt_mode.html
Executable file
274
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___dmt_mode.html
Executable file
|
|
@ -0,0 +1,274 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_DmtMode Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_DmtMode Struct Reference</h1><!-- doxytag: class="XDptx_DmtMode" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___dmt_mode-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains the display monitor timing attributes for a video mode.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="xdptx_8h.html#af8a64fd1433b74b07e2b2081a9c2fa6">XDptx_VideoMode</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#8b968433d15f6bb03512ee597ebef0d5">VideoMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#c0776945da3c122eb57e1229b17ccaed">DmtId</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#1529828ed4ab61fa0a8f73a3ef58ebad">HResolution</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#6adcccc2989a52ded87b891dbc0b3269">VResolution</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#a8befc410e54eb85edb49f4712a667c9">PixelClkKhz</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#d565a82d3eddd1ea741edad99c1e7361">Interlaced</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#f792ca11331a8f6f97db131a66b1afa9">HSyncPolarity</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#78ca69a627d19d1053438e5b33f016eb">VSyncPolarity</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#5c42fec92a1182944a61fddd5e16a95e">HFrontPorch</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#8f34bec755f4274423a826d141619e48">HSyncPulseWidth</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#e3f057b9bc6677641440e51d37370426">HBackPorch</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#23865e6f7e3265af6b75d2dcd0144a60">VFrontPorch</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#4bcfd12f87dbbdd45c73e7bfe97f7237">VSyncPulseWidth</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___dmt_mode.html#7da956a69abe62b28dffae47b6962ec3">VBackPorch</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="c0776945da3c122eb57e1229b17ccaed"></a><!-- doxytag: member="XDptx_DmtMode::DmtId" ref="c0776945da3c122eb57e1229b17ccaed" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___dmt_mode.html#c0776945da3c122eb57e1229b17ccaed">XDptx_DmtMode::DmtId</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Standard Display Monitor Timing (DMT) ID number.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="e3f057b9bc6677641440e51d37370426"></a><!-- doxytag: member="XDptx_DmtMode::HBackPorch" ref="e3f057b9bc6677641440e51d37370426" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#e3f057b9bc6677641440e51d37370426">XDptx_DmtMode::HBackPorch</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal back porch (in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5c42fec92a1182944a61fddd5e16a95e"></a><!-- doxytag: member="XDptx_DmtMode::HFrontPorch" ref="5c42fec92a1182944a61fddd5e16a95e" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#5c42fec92a1182944a61fddd5e16a95e">XDptx_DmtMode::HFrontPorch</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal front porch (in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="1529828ed4ab61fa0a8f73a3ef58ebad"></a><!-- doxytag: member="XDptx_DmtMode::HResolution" ref="1529828ed4ab61fa0a8f73a3ef58ebad" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u16 <a class="el" href="struct_x_dptx___dmt_mode.html#1529828ed4ab61fa0a8f73a3ef58ebad">XDptx_DmtMode::HResolution</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal resolution (in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="f792ca11331a8f6f97db131a66b1afa9"></a><!-- doxytag: member="XDptx_DmtMode::HSyncPolarity" ref="f792ca11331a8f6f97db131a66b1afa9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___dmt_mode.html#f792ca11331a8f6f97db131a66b1afa9">XDptx_DmtMode::HSyncPolarity</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal synchronization polarity (0=positive/1=negative).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8f34bec755f4274423a826d141619e48"></a><!-- doxytag: member="XDptx_DmtMode::HSyncPulseWidth" ref="8f34bec755f4274423a826d141619e48" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#8f34bec755f4274423a826d141619e48">XDptx_DmtMode::HSyncPulseWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal synchronization time (pulse width in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d565a82d3eddd1ea741edad99c1e7361"></a><!-- doxytag: member="XDptx_DmtMode::Interlaced" ref="d565a82d3eddd1ea741edad99c1e7361" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___dmt_mode.html#d565a82d3eddd1ea741edad99c1e7361">XDptx_DmtMode::Interlaced</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Input stream interlaced scan (0=non-interlaced/ 1=interlaced).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="a8befc410e54eb85edb49f4712a667c9"></a><!-- doxytag: member="XDptx_DmtMode::PixelClkKhz" ref="a8befc410e54eb85edb49f4712a667c9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#a8befc410e54eb85edb49f4712a667c9">XDptx_DmtMode::PixelClkKhz</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Pixel frequency (in KHz). This is also the M value for the video stream (MVid).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7da956a69abe62b28dffae47b6962ec3"></a><!-- doxytag: member="XDptx_DmtMode::VBackPorch" ref="7da956a69abe62b28dffae47b6962ec3" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#7da956a69abe62b28dffae47b6962ec3">XDptx_DmtMode::VBackPorch</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical back porch (in lines).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="23865e6f7e3265af6b75d2dcd0144a60"></a><!-- doxytag: member="XDptx_DmtMode::VFrontPorch" ref="23865e6f7e3265af6b75d2dcd0144a60" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#23865e6f7e3265af6b75d2dcd0144a60">XDptx_DmtMode::VFrontPorch</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical front porch (in lines).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8b968433d15f6bb03512ee597ebef0d5"></a><!-- doxytag: member="XDptx_DmtMode::VideoMode" ref="8b968433d15f6bb03512ee597ebef0d5" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="xdptx_8h.html#af8a64fd1433b74b07e2b2081a9c2fa6">XDptx_VideoMode</a> <a class="el" href="struct_x_dptx___dmt_mode.html#8b968433d15f6bb03512ee597ebef0d5">XDptx_DmtMode::VideoMode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Enumerated key.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6adcccc2989a52ded87b891dbc0b3269"></a><!-- doxytag: member="XDptx_DmtMode::VResolution" ref="6adcccc2989a52ded87b891dbc0b3269" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u16 <a class="el" href="struct_x_dptx___dmt_mode.html#6adcccc2989a52ded87b891dbc0b3269">XDptx_DmtMode::VResolution</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical resolution (in lines).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="78ca69a627d19d1053438e5b33f016eb"></a><!-- doxytag: member="XDptx_DmtMode::VSyncPolarity" ref="78ca69a627d19d1053438e5b33f016eb" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___dmt_mode.html#78ca69a627d19d1053438e5b33f016eb">XDptx_DmtMode::VSyncPolarity</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical synchronization polarity (0=positive/1=negative).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="4bcfd12f87dbbdd45c73e7bfe97f7237"></a><!-- doxytag: member="XDptx_DmtMode::VSyncPulseWidth" ref="4bcfd12f87dbbdd45c73e7bfe97f7237" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___dmt_mode.html#4bcfd12f87dbbdd45c73e7bfe97f7237">XDptx_DmtMode::VSyncPulseWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical synchronization time (pulse width in lines).
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_LinkConfig Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#f2887aa9ccb9d5b1813f935c544e462c">DownspreadControl</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#ff465864665a1355a64b09dd53a59393">EnhancedFramingMode</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#5fd3e8be169ccbc7c35a1d1d5965fb71">LaneCount</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#10e477559691bd1c87526131f2470228">LinkRate</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#aa0a00f750ae7a77d726b4e3f4d88179">MaxLaneCount</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#25ad708afc7452a98787b8237b364768">MaxLinkRate</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#234eff85460c7b422e117549f9121da7">Pattern</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#b7eb55816a62936fdbe42a8ea8a0ae79">PeLevel</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#f61e06566b46f064cff02c3a5b391d84">ScramblerEn</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#d61b965f2a46bda06461febe6eeabc08">SupportDownspreadControl</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#911713583f48685e17fedaeadd791fcf">SupportEnhancedFramingMode</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___link_config.html#bb910ca8ad553f5c6d80071265fb3584">VsLevel</a></td><td><a class="el" href="struct_x_dptx___link_config.html">XDptx_LinkConfig</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
240
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___link_config.html
Executable file
240
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___link_config.html
Executable file
|
|
@ -0,0 +1,240 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_LinkConfig Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_LinkConfig Struct Reference</h1><!-- doxytag: class="XDptx_LinkConfig" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___link_config-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains configuration information about the main link settings.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#5fd3e8be169ccbc7c35a1d1d5965fb71">LaneCount</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#10e477559691bd1c87526131f2470228">LinkRate</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#f61e06566b46f064cff02c3a5b391d84">ScramblerEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#ff465864665a1355a64b09dd53a59393">EnhancedFramingMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#f2887aa9ccb9d5b1813f935c544e462c">DownspreadControl</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#aa0a00f750ae7a77d726b4e3f4d88179">MaxLaneCount</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#25ad708afc7452a98787b8237b364768">MaxLinkRate</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#911713583f48685e17fedaeadd791fcf">SupportEnhancedFramingMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#d61b965f2a46bda06461febe6eeabc08">SupportDownspreadControl</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#bb910ca8ad553f5c6d80071265fb3584">VsLevel</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#b7eb55816a62936fdbe42a8ea8a0ae79">PeLevel</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___link_config.html#234eff85460c7b422e117549f9121da7">Pattern</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="f2887aa9ccb9d5b1813f935c544e462c"></a><!-- doxytag: member="XDptx_LinkConfig::DownspreadControl" ref="f2887aa9ccb9d5b1813f935c544e462c" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#f2887aa9ccb9d5b1813f935c544e462c">XDptx_LinkConfig::DownspreadControl</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Downspread control is currently in use over the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="ff465864665a1355a64b09dd53a59393"></a><!-- doxytag: member="XDptx_LinkConfig::EnhancedFramingMode" ref="ff465864665a1355a64b09dd53a59393" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#ff465864665a1355a64b09dd53a59393">XDptx_LinkConfig::EnhancedFramingMode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Enhanced frame mode is currently in use over the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5fd3e8be169ccbc7c35a1d1d5965fb71"></a><!-- doxytag: member="XDptx_LinkConfig::LaneCount" ref="5fd3e8be169ccbc7c35a1d1d5965fb71" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#5fd3e8be169ccbc7c35a1d1d5965fb71">XDptx_LinkConfig::LaneCount</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The current lane count of the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="10e477559691bd1c87526131f2470228"></a><!-- doxytag: member="XDptx_LinkConfig::LinkRate" ref="10e477559691bd1c87526131f2470228" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#10e477559691bd1c87526131f2470228">XDptx_LinkConfig::LinkRate</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The current link rate of the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="aa0a00f750ae7a77d726b4e3f4d88179"></a><!-- doxytag: member="XDptx_LinkConfig::MaxLaneCount" ref="aa0a00f750ae7a77d726b4e3f4d88179" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#aa0a00f750ae7a77d726b4e3f4d88179">XDptx_LinkConfig::MaxLaneCount</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum lane count of the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="25ad708afc7452a98787b8237b364768"></a><!-- doxytag: member="XDptx_LinkConfig::MaxLinkRate" ref="25ad708afc7452a98787b8237b364768" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#25ad708afc7452a98787b8237b364768">XDptx_LinkConfig::MaxLinkRate</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum link rate of the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="234eff85460c7b422e117549f9121da7"></a><!-- doxytag: member="XDptx_LinkConfig::Pattern" ref="234eff85460c7b422e117549f9121da7" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#234eff85460c7b422e117549f9121da7">XDptx_LinkConfig::Pattern</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The current pattern currently in use over the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b7eb55816a62936fdbe42a8ea8a0ae79"></a><!-- doxytag: member="XDptx_LinkConfig::PeLevel" ref="b7eb55816a62936fdbe42a8ea8a0ae79" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#b7eb55816a62936fdbe42a8ea8a0ae79">XDptx_LinkConfig::PeLevel</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The current pre-emphasis/cursor level for each lane.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="f61e06566b46f064cff02c3a5b391d84"></a><!-- doxytag: member="XDptx_LinkConfig::ScramblerEn" ref="f61e06566b46f064cff02c3a5b391d84" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#f61e06566b46f064cff02c3a5b391d84">XDptx_LinkConfig::ScramblerEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Symbol scrambling is currently in use over the main link.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d61b965f2a46bda06461febe6eeabc08"></a><!-- doxytag: member="XDptx_LinkConfig::SupportDownspreadControl" ref="d61b965f2a46bda06461febe6eeabc08" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#d61b965f2a46bda06461febe6eeabc08">XDptx_LinkConfig::SupportDownspreadControl</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Downspread control is supported by the RX device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="911713583f48685e17fedaeadd791fcf"></a><!-- doxytag: member="XDptx_LinkConfig::SupportEnhancedFramingMode" ref="911713583f48685e17fedaeadd791fcf" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#911713583f48685e17fedaeadd791fcf">XDptx_LinkConfig::SupportEnhancedFramingMode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Enhanced frame mode is supported by the RX device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="bb910ca8ad553f5c6d80071265fb3584"></a><!-- doxytag: member="XDptx_LinkConfig::VsLevel" ref="bb910ca8ad553f5c6d80071265fb3584" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___link_config.html#bb910ca8ad553f5c6d80071265fb3584">XDptx_LinkConfig::VsLevel</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The current voltage swing level for each lane.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_MainStreamAttributes Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#4ada79460ac8ec93764b7cf6ef6a03e0">AvgBytesPerTU</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#b2771987aba38d35ecb12fe068522779">BitsPerColor</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#5aae7d62087f1d2d732e026fc4a27405">ComponentFormat</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#d9cb9ca501e27d8ac67d2cdefddb0869">DataPerLane</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#38d56ea36d19b0a19372cd0ab1e46368">DynamicRange</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#6dd2f67ac69e011b4aca69e5c8993c96">HClkTotal</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#8a71abcd837672ebc8786afeec2a85d3">HStart</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#e5baab206041cf94ed952f2260b03a79">InitWait</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#e38c5264a92f1f3da62ee8ab04fdc768">Misc0</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#b2156fd70d080aff62bc0ce32e0c9228">Misc1</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#90edcc6fa8254a65a8e0c6fdd2cae1a1">NVid</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#577be212fb5a000069331993bd6b90b9">OverrideUserPixelWidth</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#fcdf2d723786ffe2c7153a61fdea2966">SynchronousClockMode</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#ffba3d4fddc885d2db008c9e0643df28">TransferUnitSize</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#9c1460f55c4a8cad813aa8942aa48027">UserPixelWidth</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#862e898079c25c530cc796330de0ba1a">VClkTotal</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#b37f3817a1bda33892d2dd8a2a6bcc23">VStart</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#2e5f919bab78b5937a78d9855b545a24">Vtm</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#3ec3d85682eb90198377b0fbd92d4df2">YCbCrColorimetry</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,359 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_MainStreamAttributes Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_MainStreamAttributes Struct Reference</h1><!-- doxytag: class="XDptx_MainStreamAttributes" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___main_stream_attributes-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains the main stream attributes which determine how the video will be displayed.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">XVid_VideoTimingMode </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#2e5f919bab78b5937a78d9855b545a24">Vtm</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#6dd2f67ac69e011b4aca69e5c8993c96">HClkTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#862e898079c25c530cc796330de0ba1a">VClkTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#8a71abcd837672ebc8786afeec2a85d3">HStart</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#b37f3817a1bda33892d2dd8a2a6bcc23">VStart</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#e38c5264a92f1f3da62ee8ab04fdc768">Misc0</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#b2156fd70d080aff62bc0ce32e0c9228">Misc1</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#90edcc6fa8254a65a8e0c6fdd2cae1a1">NVid</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#9c1460f55c4a8cad813aa8942aa48027">UserPixelWidth</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#d9cb9ca501e27d8ac67d2cdefddb0869">DataPerLane</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#4ada79460ac8ec93764b7cf6ef6a03e0">AvgBytesPerTU</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#ffba3d4fddc885d2db008c9e0643df28">TransferUnitSize</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#e5baab206041cf94ed952f2260b03a79">InitWait</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#b2771987aba38d35ecb12fe068522779">BitsPerColor</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#5aae7d62087f1d2d732e026fc4a27405">ComponentFormat</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#38d56ea36d19b0a19372cd0ab1e46368">DynamicRange</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#3ec3d85682eb90198377b0fbd92d4df2">YCbCrColorimetry</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#fcdf2d723786ffe2c7153a61fdea2966">SynchronousClockMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#577be212fb5a000069331993bd6b90b9">OverrideUserPixelWidth</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="4ada79460ac8ec93764b7cf6ef6a03e0"></a><!-- doxytag: member="XDptx_MainStreamAttributes::AvgBytesPerTU" ref="4ada79460ac8ec93764b7cf6ef6a03e0" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#4ada79460ac8ec93764b7cf6ef6a03e0">XDptx_MainStreamAttributes::AvgBytesPerTU</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Average number of bytes per transfer unit, scaled up by a factor of 1000.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b2771987aba38d35ecb12fe068522779"></a><!-- doxytag: member="XDptx_MainStreamAttributes::BitsPerColor" ref="b2771987aba38d35ecb12fe068522779" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#b2771987aba38d35ecb12fe068522779">XDptx_MainStreamAttributes::BitsPerColor</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Number of bits per color component.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5aae7d62087f1d2d732e026fc4a27405"></a><!-- doxytag: member="XDptx_MainStreamAttributes::ComponentFormat" ref="5aae7d62087f1d2d732e026fc4a27405" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___main_stream_attributes.html#5aae7d62087f1d2d732e026fc4a27405">XDptx_MainStreamAttributes::ComponentFormat</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The component format currently in use by the video stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d9cb9ca501e27d8ac67d2cdefddb0869"></a><!-- doxytag: member="XDptx_MainStreamAttributes::DataPerLane" ref="d9cb9ca501e27d8ac67d2cdefddb0869" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#d9cb9ca501e27d8ac67d2cdefddb0869">XDptx_MainStreamAttributes::DataPerLane</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Used to translate the number of pixels per line to the native internal 16-bit datapath.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="38d56ea36d19b0a19372cd0ab1e46368"></a><!-- doxytag: member="XDptx_MainStreamAttributes::DynamicRange" ref="38d56ea36d19b0a19372cd0ab1e46368" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___main_stream_attributes.html#38d56ea36d19b0a19372cd0ab1e46368">XDptx_MainStreamAttributes::DynamicRange</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The dynamic range currently in use by the video stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6dd2f67ac69e011b4aca69e5c8993c96"></a><!-- doxytag: member="XDptx_MainStreamAttributes::HClkTotal" ref="6dd2f67ac69e011b4aca69e5c8993c96" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#6dd2f67ac69e011b4aca69e5c8993c96">XDptx_MainStreamAttributes::HClkTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal total time (in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8a71abcd837672ebc8786afeec2a85d3"></a><!-- doxytag: member="XDptx_MainStreamAttributes::HStart" ref="8a71abcd837672ebc8786afeec2a85d3" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#8a71abcd837672ebc8786afeec2a85d3">XDptx_MainStreamAttributes::HStart</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Horizontal blank start (in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="e5baab206041cf94ed952f2260b03a79"></a><!-- doxytag: member="XDptx_MainStreamAttributes::InitWait" ref="e5baab206041cf94ed952f2260b03a79" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#e5baab206041cf94ed952f2260b03a79">XDptx_MainStreamAttributes::InitWait</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Number of initial wait cycles at the start of a new line by the framing logic.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="e38c5264a92f1f3da62ee8ab04fdc768"></a><!-- doxytag: member="XDptx_MainStreamAttributes::Misc0" ref="e38c5264a92f1f3da62ee8ab04fdc768" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#e38c5264a92f1f3da62ee8ab04fdc768">XDptx_MainStreamAttributes::Misc0</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Miscellaneous stream attributes 0 as specified by the DisplayPort 1.2 specification.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b2156fd70d080aff62bc0ce32e0c9228"></a><!-- doxytag: member="XDptx_MainStreamAttributes::Misc1" ref="b2156fd70d080aff62bc0ce32e0c9228" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#b2156fd70d080aff62bc0ce32e0c9228">XDptx_MainStreamAttributes::Misc1</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Miscellaneous stream attributes 1 as specified by the DisplayPort 1.2 specification.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="90edcc6fa8254a65a8e0c6fdd2cae1a1"></a><!-- doxytag: member="XDptx_MainStreamAttributes::NVid" ref="90edcc6fa8254a65a8e0c6fdd2cae1a1" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#90edcc6fa8254a65a8e0c6fdd2cae1a1">XDptx_MainStreamAttributes::NVid</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
N value for the video stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="577be212fb5a000069331993bd6b90b9"></a><!-- doxytag: member="XDptx_MainStreamAttributes::OverrideUserPixelWidth" ref="577be212fb5a000069331993bd6b90b9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___main_stream_attributes.html#577be212fb5a000069331993bd6b90b9">XDptx_MainStreamAttributes::OverrideUserPixelWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
If set to 1, the value stored for UserPixelWidth will be used as the pixel width.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fcdf2d723786ffe2c7153a61fdea2966"></a><!-- doxytag: member="XDptx_MainStreamAttributes::SynchronousClockMode" ref="fcdf2d723786ffe2c7153a61fdea2966" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___main_stream_attributes.html#fcdf2d723786ffe2c7153a61fdea2966">XDptx_MainStreamAttributes::SynchronousClockMode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Synchronous clock mode is currently in use by the video stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="ffba3d4fddc885d2db008c9e0643df28"></a><!-- doxytag: member="XDptx_MainStreamAttributes::TransferUnitSize" ref="ffba3d4fddc885d2db008c9e0643df28" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#ffba3d4fddc885d2db008c9e0643df28">XDptx_MainStreamAttributes::TransferUnitSize</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Size of the transfer unit in the framing logic. In MST mode, this is also the number of time slots that are alloted in the payload ID table.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="9c1460f55c4a8cad813aa8942aa48027"></a><!-- doxytag: member="XDptx_MainStreamAttributes::UserPixelWidth" ref="9c1460f55c4a8cad813aa8942aa48027" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#9c1460f55c4a8cad813aa8942aa48027">XDptx_MainStreamAttributes::UserPixelWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The width of the user data input port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="862e898079c25c530cc796330de0ba1a"></a><!-- doxytag: member="XDptx_MainStreamAttributes::VClkTotal" ref="862e898079c25c530cc796330de0ba1a" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#862e898079c25c530cc796330de0ba1a">XDptx_MainStreamAttributes::VClkTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical total time (in pixels).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b37f3817a1bda33892d2dd8a2a6bcc23"></a><!-- doxytag: member="XDptx_MainStreamAttributes::VStart" ref="b37f3817a1bda33892d2dd8a2a6bcc23" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___main_stream_attributes.html#b37f3817a1bda33892d2dd8a2a6bcc23">XDptx_MainStreamAttributes::VStart</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Vertical blank start (in lines).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2e5f919bab78b5937a78d9855b545a24"></a><!-- doxytag: member="XDptx_MainStreamAttributes::Vtm" ref="2e5f919bab78b5937a78d9855b545a24" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">XVid_VideoTimingMode <a class="el" href="struct_x_dptx___main_stream_attributes.html#2e5f919bab78b5937a78d9855b545a24">XDptx_MainStreamAttributes::Vtm</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The video timing.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="3ec3d85682eb90198377b0fbd92d4df2"></a><!-- doxytag: member="XDptx_MainStreamAttributes::YCbCrColorimetry" ref="3ec3d85682eb90198377b0fbd92d4df2" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___main_stream_attributes.html#3ec3d85682eb90198377b0fbd92d4df2">XDptx_MainStreamAttributes::YCbCrColorimetry</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The YCbCr colorimetry currently in use by the video stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_MstStream Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___mst_stream.html#a40175bf863e3635cb571e4dc237094f">LinkCountTotal</a></td><td><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___mst_stream.html#bdf7ac405c9581934d5c93214ced134c">MstPbn</a></td><td><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___mst_stream.html#cc3b7a3b3de5c3fc6fdfa4e07e8950ec">MstStreamEnable</a></td><td><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___mst_stream.html#7b22f20753c9f4094538489822b5f609">RelativeAddress</a></td><td><a class="el" href="struct_x_dptx___mst_stream.html">XDptx_MstStream</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
104
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___mst_stream.html
Executable file
104
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___mst_stream.html
Executable file
|
|
@ -0,0 +1,104 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_MstStream Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_MstStream Struct Reference</h1><!-- doxytag: class="XDptx_MstStream" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___mst_stream-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes a stream when the driver is running in multi-stream transport (MST) mode.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___mst_stream.html#a40175bf863e3635cb571e4dc237094f">LinkCountTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___mst_stream.html#7b22f20753c9f4094538489822b5f609">RelativeAddress</a> [15]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___mst_stream.html#bdf7ac405c9581934d5c93214ced134c">MstPbn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___mst_stream.html#cc3b7a3b3de5c3fc6fdfa4e07e8950ec">MstStreamEnable</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="a40175bf863e3635cb571e4dc237094f"></a><!-- doxytag: member="XDptx_MstStream::LinkCountTotal" ref="a40175bf863e3635cb571e4dc237094f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___mst_stream.html#a40175bf863e3635cb571e4dc237094f">XDptx_MstStream::LinkCountTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="bdf7ac405c9581934d5c93214ced134c"></a><!-- doxytag: member="XDptx_MstStream::MstPbn" ref="bdf7ac405c9581934d5c93214ced134c" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u16 <a class="el" href="struct_x_dptx___mst_stream.html#bdf7ac405c9581934d5c93214ced134c">XDptx_MstStream::MstPbn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The relative address from the DisplayPort TX to the sink device that this MST stream is targeting. Payload bandwidth number used to allocate bandwidth for the MST stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="cc3b7a3b3de5c3fc6fdfa4e07e8950ec"></a><!-- doxytag: member="XDptx_MstStream::MstStreamEnable" ref="cc3b7a3b3de5c3fc6fdfa4e07e8950ec" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___mst_stream.html#cc3b7a3b3de5c3fc6fdfa4e07e8950ec">XDptx_MstStream::MstStreamEnable</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
In MST mode, enables the corresponding stream for this MSA configuration.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7b22f20753c9f4094538489822b5f609"></a><!-- doxytag: member="XDptx_MstStream::RelativeAddress" ref="7b22f20753c9f4094538489822b5f609" args="[15]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___mst_stream.html#7b22f20753c9f4094538489822b5f609">XDptx_MstStream::RelativeAddress</a>[15] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of DisplayPort links from the DisplayPort TX to the sink device that this MST stream is targeting.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SbMsgLinkAddressReplyDeviceInfo Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#34af1751495e24548fc7b5af4c6255f4">Guid</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#fd111357e61fc8315c01c796b2911b3b">NumPorts</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#2fc2252e0e60c4635f548b986759429a">PortDetails</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#07cdd19e809c39a2ab778d806ac2caf5">ReplyType</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#ccebabbc6590e534019113d8f5d87198">RequestId</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html">XDptx_SbMsgLinkAddressReplyDeviceInfo</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,121 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SbMsgLinkAddressReplyDeviceInfo Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SbMsgLinkAddressReplyDeviceInfo Struct Reference</h1><!-- doxytag: class="XDptx_SbMsgLinkAddressReplyDeviceInfo" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___sb_msg_link_address_reply_device_info-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes a DisplayPort branch device. This structure is used when the driver is operating in multi-stream transport (MST) mode.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#07cdd19e809c39a2ab778d806ac2caf5">ReplyType</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#ccebabbc6590e534019113d8f5d87198">RequestId</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#34af1751495e24548fc7b5af4c6255f4">Guid</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#fd111357e61fc8315c01c796b2911b3b">NumPorts</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#2fc2252e0e60c4635f548b986759429a">PortDetails</a> [16]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="34af1751495e24548fc7b5af4c6255f4"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyDeviceInfo::Guid" ref="34af1751495e24548fc7b5af4c6255f4" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#34af1751495e24548fc7b5af4c6255f4">XDptx_SbMsgLinkAddressReplyDeviceInfo::Guid</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The global unique identifier (GUID) of the branch device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fd111357e61fc8315c01c796b2911b3b"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyDeviceInfo::NumPorts" ref="fd111357e61fc8315c01c796b2911b3b" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#fd111357e61fc8315c01c796b2911b3b">XDptx_SbMsgLinkAddressReplyDeviceInfo::NumPorts</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of ports associated with this branch device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2fc2252e0e60c4635f548b986759429a"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyDeviceInfo::PortDetails" ref="2fc2252e0e60c4635f548b986759429a" args="[16]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a> <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#2fc2252e0e60c4635f548b986759429a">XDptx_SbMsgLinkAddressReplyDeviceInfo::PortDetails</a>[16] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
An array describing all ports attached to this branch device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="07cdd19e809c39a2ab778d806ac2caf5"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyDeviceInfo::ReplyType" ref="07cdd19e809c39a2ab778d806ac2caf5" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#07cdd19e809c39a2ab778d806ac2caf5">XDptx_SbMsgLinkAddressReplyDeviceInfo::ReplyType</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The reply type of the sideband message. A value of 1 indicates that the request wasn't successful and the return data will give the reason for a negative-acknowledge (NACK).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="ccebabbc6590e534019113d8f5d87198"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyDeviceInfo::RequestId" ref="ccebabbc6590e534019113d8f5d87198" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#ccebabbc6590e534019113d8f5d87198">XDptx_SbMsgLinkAddressReplyDeviceInfo::RequestId</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The request identifier of the reply. This should correspond to the request identifier for the LINK_ADDRESS sideband message request.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SbMsgLinkAddressReplyPortDetail Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#ae474930457d5513237b372d35091b03">DpcdRev</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#6925e9c4a34296ea6bbb7f043a187ce2">DpDevPlugStatus</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#b080e020948e5ebe9180c89b761c34fd">Guid</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#eb197110cc31e2bae441202d6ba96054">InputPort</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#95a12d0b4384367b4df42383ae6cc12a">LegacyDevPlugStatus</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#1adb3b0ebe9a304558f63dc5a7212967">MsgCapStatus</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#fd93f2c7da62c15190efbc139ac5ae23">NumSdpStreams</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#18c49014ab2a87dcaa83e5e2c9379046">NumSdpStreamSinks</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#7246cd0cdf0c7c33cf1904aebb6da8dc">PeerDeviceType</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#be3cce0570a9d5f0424196c2233c136d">PortNum</a></td><td><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html">XDptx_SbMsgLinkAddressReplyPortDetail</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,206 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SbMsgLinkAddressReplyPortDetail Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SbMsgLinkAddressReplyPortDetail Struct Reference</h1><!-- doxytag: class="XDptx_SbMsgLinkAddressReplyPortDetail" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___sb_msg_link_address_reply_port_detail-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes a port that is connected to a DisplayPort branch device. This structure is used when the driver is operating in multi-stream transport (MST) mode.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#eb197110cc31e2bae441202d6ba96054">InputPort</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#7246cd0cdf0c7c33cf1904aebb6da8dc">PeerDeviceType</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#be3cce0570a9d5f0424196c2233c136d">PortNum</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#1adb3b0ebe9a304558f63dc5a7212967">MsgCapStatus</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#6925e9c4a34296ea6bbb7f043a187ce2">DpDevPlugStatus</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#95a12d0b4384367b4df42383ae6cc12a">LegacyDevPlugStatus</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#ae474930457d5513237b372d35091b03">DpcdRev</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#b080e020948e5ebe9180c89b761c34fd">Guid</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#fd93f2c7da62c15190efbc139ac5ae23">NumSdpStreams</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#18c49014ab2a87dcaa83e5e2c9379046">NumSdpStreamSinks</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="ae474930457d5513237b372d35091b03"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::DpcdRev" ref="ae474930457d5513237b372d35091b03" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#ae474930457d5513237b372d35091b03">XDptx_SbMsgLinkAddressReplyPortDetail::DpcdRev</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The DisplayPort Configuration Data (DPCD) revision of the device connected to this port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6925e9c4a34296ea6bbb7f043a187ce2"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::DpDevPlugStatus" ref="6925e9c4a34296ea6bbb7f043a187ce2" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#6925e9c4a34296ea6bbb7f043a187ce2">XDptx_SbMsgLinkAddressReplyPortDetail::DpDevPlugStatus</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
There is a device connected to this port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b080e020948e5ebe9180c89b761c34fd"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::Guid" ref="b080e020948e5ebe9180c89b761c34fd" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#b080e020948e5ebe9180c89b761c34fd">XDptx_SbMsgLinkAddressReplyPortDetail::Guid</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The global unique identifier (GUID) of the device connected to this port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="eb197110cc31e2bae441202d6ba96054"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::InputPort" ref="eb197110cc31e2bae441202d6ba96054" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#eb197110cc31e2bae441202d6ba96054">XDptx_SbMsgLinkAddressReplyPortDetail::InputPort</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Specifies that this port is an input port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="95a12d0b4384367b4df42383ae6cc12a"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::LegacyDevPlugStatus" ref="95a12d0b4384367b4df42383ae6cc12a" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#95a12d0b4384367b4df42383ae6cc12a">XDptx_SbMsgLinkAddressReplyPortDetail::LegacyDevPlugStatus</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This port is connected to a legacy device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="1adb3b0ebe9a304558f63dc5a7212967"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::MsgCapStatus" ref="1adb3b0ebe9a304558f63dc5a7212967" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#1adb3b0ebe9a304558f63dc5a7212967">XDptx_SbMsgLinkAddressReplyPortDetail::MsgCapStatus</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This port or the device at this port can send and receive MST messages.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fd93f2c7da62c15190efbc139ac5ae23"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreams" ref="fd93f2c7da62c15190efbc139ac5ae23" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#fd93f2c7da62c15190efbc139ac5ae23">XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreams</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of Secondary-Data Packet (SDP) streams that this port can handle.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="18c49014ab2a87dcaa83e5e2c9379046"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreamSinks" ref="18c49014ab2a87dcaa83e5e2c9379046" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#18c49014ab2a87dcaa83e5e2c9379046">XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreamSinks</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of SDP streams associated with this port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7246cd0cdf0c7c33cf1904aebb6da8dc"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::PeerDeviceType" ref="7246cd0cdf0c7c33cf1904aebb6da8dc" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#7246cd0cdf0c7c33cf1904aebb6da8dc">XDptx_SbMsgLinkAddressReplyPortDetail::PeerDeviceType</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Specifies the device type connected to this port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="be3cce0570a9d5f0424196c2233c136d"></a><!-- doxytag: member="XDptx_SbMsgLinkAddressReplyPortDetail::PortNum" ref="be3cce0570a9d5f0424196c2233c136d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#be3cce0570a9d5f0424196c2233c136d">XDptx_SbMsgLinkAddressReplyPortDetail::PortNum</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The port number of this port.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandMsg Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sideband_msg.html">XDptx_SidebandMsg</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg.html#9a14fd013ddc3647fb2bcc78b8dc94e4">Body</a></td><td><a class="el" href="struct_x_dptx___sideband_msg.html">XDptx_SidebandMsg</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg.html#8b8fb5d20e109c82daf16a8ea2bcb4bd">Header</a></td><td><a class="el" href="struct_x_dptx___sideband_msg.html">XDptx_SidebandMsg</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SidebandMsg Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandMsg Struct Reference</h1><!-- doxytag: class="XDptx_SidebandMsg" --><a href="struct_x_dptx___sideband_msg-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef stores the entire sideband message.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg.html#8b8fb5d20e109c82daf16a8ea2bcb4bd">Header</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg.html#9a14fd013ddc3647fb2bcc78b8dc94e4">Body</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="9a14fd013ddc3647fb2bcc78b8dc94e4"></a><!-- doxytag: member="XDptx_SidebandMsg::Body" ref="9a14fd013ddc3647fb2bcc78b8dc94e4" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a> <a class="el" href="struct_x_dptx___sideband_msg.html#9a14fd013ddc3647fb2bcc78b8dc94e4">XDptx_SidebandMsg::Body</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The body segment of the sideband message.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8b8fb5d20e109c82daf16a8ea2bcb4bd"></a><!-- doxytag: member="XDptx_SidebandMsg::Header" ref="8b8fb5d20e109c82daf16a8ea2bcb4bd" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a> <a class="el" href="struct_x_dptx___sideband_msg.html#8b8fb5d20e109c82daf16a8ea2bcb4bd">XDptx_SidebandMsg::Header</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The header segment of the sideband message.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx__mst_8c.html">xdptx_mst.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandMsgBody Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_body.html#181f9d362b18752ad169ef782b192e32">Crc</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_body.html#ea560deb8a9d20e8d55cda0612666a8e">MsgData</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_body.html#0cfc624b39f0c0327b7b7fe667bd3463">MsgDataLength</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_body.html">XDptx_SidebandMsgBody</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SidebandMsgBody Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandMsgBody Struct Reference</h1><!-- doxytag: class="XDptx_SidebandMsgBody" --><a href="struct_x_dptx___sideband_msg_body-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef stores the sideband message body.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_body.html#ea560deb8a9d20e8d55cda0612666a8e">MsgData</a> [62]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_body.html#0cfc624b39f0c0327b7b7fe667bd3463">MsgDataLength</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_body.html#181f9d362b18752ad169ef782b192e32">Crc</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="181f9d362b18752ad169ef782b192e32"></a><!-- doxytag: member="XDptx_SidebandMsgBody::Crc" ref="181f9d362b18752ad169ef782b192e32" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_body.html#181f9d362b18752ad169ef782b192e32">XDptx_SidebandMsgBody::Crc</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The cyclic-redundancy check (CRC) value of the body data.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="ea560deb8a9d20e8d55cda0612666a8e"></a><!-- doxytag: member="XDptx_SidebandMsgBody::MsgData" ref="ea560deb8a9d20e8d55cda0612666a8e" args="[62]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_body.html#ea560deb8a9d20e8d55cda0612666a8e">XDptx_SidebandMsgBody::MsgData</a>[62] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The raw body data of the sideband message.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="0cfc624b39f0c0327b7b7fe667bd3463"></a><!-- doxytag: member="XDptx_SidebandMsgBody::MsgDataLength" ref="0cfc624b39f0c0327b7b7fe667bd3463" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_body.html#0cfc624b39f0c0327b7b7fe667bd3463">XDptx_SidebandMsgBody::MsgDataLength</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of data bytes stored as part of the sideband message body.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx__mst_8c.html">xdptx_mst.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandMsgHeader Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#81ce1b3145e6af1535a9b36f472d2abc">BroadcastMsg</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#c071b683dae18c20e3bc98a9aaac828f">Crc</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#3fa0eaf17023613f4a52764655bec992">EndOfMsgTransaction</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#58f94d860d878f7d5cde18d36c802cf9">LinkCountRemaining</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#c0653445a9e55279aed47a90c3fc17ee">LinkCountTotal</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#de4041a35b21b47d6290628c19564e80">MsgBodyLength</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#92e5b63cdfcc2a7a20934a053aa25f93">MsgHeaderLength</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#5f8b98bf6ee140c4731d7126446d7651">MsgSequenceNum</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#04cf484cdd01dc208ccdb289520dcb6c">PathMsg</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#2edf685cb155f78eaed2e510f6c0e3dd">RelativeAddress</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_msg_header.html#d7767d83c449e53007dd245bb61dd847">StartOfMsgTransaction</a></td><td><a class="el" href="struct_x_dptx___sideband_msg_header.html">XDptx_SidebandMsgHeader</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,221 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SidebandMsgHeader Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandMsgHeader Struct Reference</h1><!-- doxytag: class="XDptx_SidebandMsgHeader" --><a href="struct_x_dptx___sideband_msg_header-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef stores the sideband message header.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#c0653445a9e55279aed47a90c3fc17ee">LinkCountTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#58f94d860d878f7d5cde18d36c802cf9">LinkCountRemaining</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#2edf685cb155f78eaed2e510f6c0e3dd">RelativeAddress</a> [15]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#81ce1b3145e6af1535a9b36f472d2abc">BroadcastMsg</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#04cf484cdd01dc208ccdb289520dcb6c">PathMsg</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#de4041a35b21b47d6290628c19564e80">MsgBodyLength</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#d7767d83c449e53007dd245bb61dd847">StartOfMsgTransaction</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#3fa0eaf17023613f4a52764655bec992">EndOfMsgTransaction</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#5f8b98bf6ee140c4731d7126446d7651">MsgSequenceNum</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#c071b683dae18c20e3bc98a9aaac828f">Crc</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_msg_header.html#92e5b63cdfcc2a7a20934a053aa25f93">MsgHeaderLength</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="81ce1b3145e6af1535a9b36f472d2abc"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::BroadcastMsg" ref="81ce1b3145e6af1535a9b36f472d2abc" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#81ce1b3145e6af1535a9b36f472d2abc">XDptx_SidebandMsgHeader::BroadcastMsg</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Specifies that this message is a broadcast message, to be handled by all downstream devices.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="c071b683dae18c20e3bc98a9aaac828f"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::Crc" ref="c071b683dae18c20e3bc98a9aaac828f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#c071b683dae18c20e3bc98a9aaac828f">XDptx_SidebandMsgHeader::Crc</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The cyclic-redundancy check (CRC) value of the header data.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="3fa0eaf17023613f4a52764655bec992"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::EndOfMsgTransaction" ref="3fa0eaf17023613f4a52764655bec992" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#3fa0eaf17023613f4a52764655bec992">XDptx_SidebandMsgHeader::EndOfMsgTransaction</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This message is the last sideband message in the transaction.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="58f94d860d878f7d5cde18d36c802cf9"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::LinkCountRemaining" ref="58f94d860d878f7d5cde18d36c802cf9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#58f94d860d878f7d5cde18d36c802cf9">XDptx_SidebandMsgHeader::LinkCountRemaining</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The remaining link count until the sideband message reaches the target device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="c0653445a9e55279aed47a90c3fc17ee"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::LinkCountTotal" ref="c0653445a9e55279aed47a90c3fc17ee" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#c0653445a9e55279aed47a90c3fc17ee">XDptx_SidebandMsgHeader::LinkCountTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of DisplayPort links connecting the device device that this sideband message is targeted from the DisplayPort TX.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="de4041a35b21b47d6290628c19564e80"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::MsgBodyLength" ref="de4041a35b21b47d6290628c19564e80" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#de4041a35b21b47d6290628c19564e80">XDptx_SidebandMsgHeader::MsgBodyLength</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of data bytes that are stored in the sideband message body.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="92e5b63cdfcc2a7a20934a053aa25f93"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::MsgHeaderLength" ref="92e5b63cdfcc2a7a20934a053aa25f93" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#92e5b63cdfcc2a7a20934a053aa25f93">XDptx_SidebandMsgHeader::MsgHeaderLength</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of data bytes stored as part of the sideband message header.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5f8b98bf6ee140c4731d7126446d7651"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::MsgSequenceNum" ref="5f8b98bf6ee140c4731d7126446d7651" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#5f8b98bf6ee140c4731d7126446d7651">XDptx_SidebandMsgHeader::MsgSequenceNum</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Identifies invidiual message transactions to a given DisplayPort device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="04cf484cdd01dc208ccdb289520dcb6c"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::PathMsg" ref="04cf484cdd01dc208ccdb289520dcb6c" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#04cf484cdd01dc208ccdb289520dcb6c">XDptx_SidebandMsgHeader::PathMsg</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Specifies that this message is a path message, to be handled by all the devices between the origin and the target device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2edf685cb155f78eaed2e510f6c0e3dd"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::RelativeAddress" ref="2edf685cb155f78eaed2e510f6c0e3dd" args="[15]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#2edf685cb155f78eaed2e510f6c0e3dd">XDptx_SidebandMsgHeader::RelativeAddress</a>[15] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The relative address from the DisplayPort TX to the target device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d7767d83c449e53007dd245bb61dd847"></a><!-- doxytag: member="XDptx_SidebandMsgHeader::StartOfMsgTransaction" ref="d7767d83c449e53007dd245bb61dd847" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_msg_header.html#d7767d83c449e53007dd245bb61dd847">XDptx_SidebandMsgHeader::StartOfMsgTransaction</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This message is the first sideband message in the transaction.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx__mst_8c.html">xdptx_mst.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandReply Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sideband_reply.html">XDptx_SidebandReply</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_reply.html#5d91abfc59ffb351b17a00bf160d67ba">Data</a></td><td><a class="el" href="struct_x_dptx___sideband_reply.html">XDptx_SidebandReply</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sideband_reply.html#53ccde4b28338d067e1e2731d06a94df">Length</a></td><td><a class="el" href="struct_x_dptx___sideband_reply.html">XDptx_SidebandReply</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SidebandReply Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SidebandReply Struct Reference</h1><!-- doxytag: class="XDptx_SidebandReply" --><a href="struct_x_dptx___sideband_reply-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes a sideband message reply.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_reply.html#53ccde4b28338d067e1e2731d06a94df">Length</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sideband_reply.html#5d91abfc59ffb351b17a00bf160d67ba">Data</a> [256]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="5d91abfc59ffb351b17a00bf160d67ba"></a><!-- doxytag: member="XDptx_SidebandReply::Data" ref="5d91abfc59ffb351b17a00bf160d67ba" args="[256]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_reply.html#5d91abfc59ffb351b17a00bf160d67ba">XDptx_SidebandReply::Data</a>[256] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The raw reply data.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="53ccde4b28338d067e1e2731d06a94df"></a><!-- doxytag: member="XDptx_SidebandReply::Length" ref="53ccde4b28338d067e1e2731d06a94df" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sideband_reply.html#53ccde4b28338d067e1e2731d06a94df">XDptx_SidebandReply::Length</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of bytes of reply data.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx__mst_8c.html">xdptx_mst.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SinkConfig Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___sink_config.html">XDptx_SinkConfig</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sink_config.html#f7b46d2ac8b400d853382160782173bd">DpcdRxCapsField</a></td><td><a class="el" href="struct_x_dptx___sink_config.html">XDptx_SinkConfig</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___sink_config.html#75bf05accd81b8d83f5a409ee5f8975c">LaneStatusAdjReqs</a></td><td><a class="el" href="struct_x_dptx___sink_config.html">XDptx_SinkConfig</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_SinkConfig Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_SinkConfig Struct Reference</h1><!-- doxytag: class="XDptx_SinkConfig" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___sink_config-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains configuration information about the RX device.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sink_config.html#f7b46d2ac8b400d853382160782173bd">DpcdRxCapsField</a> [16]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___sink_config.html#75bf05accd81b8d83f5a409ee5f8975c">LaneStatusAdjReqs</a> [6]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="f7b46d2ac8b400d853382160782173bd"></a><!-- doxytag: member="XDptx_SinkConfig::DpcdRxCapsField" ref="f7b46d2ac8b400d853382160782173bd" args="[16]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sink_config.html#f7b46d2ac8b400d853382160782173bd">XDptx_SinkConfig::DpcdRxCapsField</a>[16] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The first 16 bytes of the raw capabilities field of the RX device's DisplayPort Configuration Data (DPCD).
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="75bf05accd81b8d83f5a409ee5f8975c"></a><!-- doxytag: member="XDptx_SinkConfig::LaneStatusAdjReqs" ref="75bf05accd81b8d83f5a409ee5f8975c" args="[6]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___sink_config.html#75bf05accd81b8d83f5a409ee5f8975c">XDptx_SinkConfig::LaneStatusAdjReqs</a>[6] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This is a raw read of the RX device's status registers. The first 4 bytes correspond to the lane status associated with clock recovery, channel equalization, symbol lock, and interlane alignment. The remaining 2 bytes represent the pre-emphasis and voltage swing level adjustments requested by the RX device.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_Topology Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology.html#741d70ec6f24bcb7cae5cbe72cf7db21">NodeTable</a></td><td><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology.html#f1ed741fb1e449500103ce6bb5f079e5">NodeTotal</a></td><td><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology.html#b6c0116c9897379543dd213162cadc7d">SinkList</a></td><td><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology.html#b7fe845c1a540d412756100ad1ab77d4">SinkTotal</a></td><td><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
104
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___topology.html
Executable file
104
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___topology.html
Executable file
|
|
@ -0,0 +1,104 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_Topology Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_Topology Struct Reference</h1><!-- doxytag: class="XDptx_Topology" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___topology-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes a the entire topology of connected downstream DisplayPort devices (from the DisplayPort TX) when the driver is operating in multi-stream transport (MST) mode.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology.html#f1ed741fb1e449500103ce6bb5f079e5">NodeTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology.html#741d70ec6f24bcb7cae5cbe72cf7db21">NodeTable</a> [63]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology.html#b7fe845c1a540d412756100ad1ab77d4">SinkTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology.html#b6c0116c9897379543dd213162cadc7d">SinkList</a> [63]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="741d70ec6f24bcb7cae5cbe72cf7db21"></a><!-- doxytag: member="XDptx_Topology::NodeTable" ref="741d70ec6f24bcb7cae5cbe72cf7db21" args="[63]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a> <a class="el" href="struct_x_dptx___topology.html#741d70ec6f24bcb7cae5cbe72cf7db21">XDptx_Topology::NodeTable</a>[63] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
A table listing all the nodes in the MST topology.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="f1ed741fb1e449500103ce6bb5f079e5"></a><!-- doxytag: member="XDptx_Topology::NodeTotal" ref="f1ed741fb1e449500103ce6bb5f079e5" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology.html#f1ed741fb1e449500103ce6bb5f079e5">XDptx_Topology::NodeTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of nodes that were found in the MST topology.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b6c0116c9897379543dd213162cadc7d"></a><!-- doxytag: member="XDptx_Topology::SinkList" ref="b6c0116c9897379543dd213162cadc7d" args="[63]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a>* <a class="el" href="struct_x_dptx___topology.html#b6c0116c9897379543dd213162cadc7d">XDptx_Topology::SinkList</a>[63] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
A pointer list of sinks in the MST topology. The entries will point to the sinks in the NodeTable.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b7fe845c1a540d412756100ad1ab77d4"></a><!-- doxytag: member="XDptx_Topology::SinkTotal" ref="b7fe845c1a540d412756100ad1ab77d4" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology.html#b7fe845c1a540d412756100ad1ab77d4">XDptx_Topology::SinkTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of sinks in the MST topology.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_TopologyNode Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology_node.html#3527cc83675cc55b3ab3feaeeafbca3d">DeviceType</a></td><td><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology_node.html#a477c863dbf616294b63b4fc4f61d338">DpcdRev</a></td><td><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology_node.html#31f91fdac9d2223df8dabb36cd3d47dc">Guid</a></td><td><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology_node.html#6d0f7bee5c754021229d2aae559dc87e">LinkCountTotal</a></td><td><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology_node.html#79367001f80ea1724f1cff524f0d8f4c">MsgCapStatus</a></td><td><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___topology_node.html#0627b064137f9cbd0398e6f05aab53d3">RelativeAddress</a></td><td><a class="el" href="struct_x_dptx___topology_node.html">XDptx_TopologyNode</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
138
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___topology_node.html
Executable file
138
XilinxProcessorIPLib/drivers/dp/doc/html/api/struct_x_dptx___topology_node.html
Executable file
|
|
@ -0,0 +1,138 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XDptx_TopologyNode Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx_TopologyNode Struct Reference</h1><!-- doxytag: class="XDptx_TopologyNode" --><code>#include <xdptx.h></code>
|
||||
<p>
|
||||
<a href="struct_x_dptx___topology_node-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef describes a downstream DisplayPort device when the driver is running in multi-stream transport (MST) mode.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology_node.html#31f91fdac9d2223df8dabb36cd3d47dc">Guid</a> [4]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology_node.html#0627b064137f9cbd0398e6f05aab53d3">RelativeAddress</a> [15]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology_node.html#3527cc83675cc55b3ab3feaeeafbca3d">DeviceType</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology_node.html#6d0f7bee5c754021229d2aae559dc87e">LinkCountTotal</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology_node.html#a477c863dbf616294b63b4fc4f61d338">DpcdRev</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___topology_node.html#79367001f80ea1724f1cff524f0d8f4c">MsgCapStatus</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="3527cc83675cc55b3ab3feaeeafbca3d"></a><!-- doxytag: member="XDptx_TopologyNode::DeviceType" ref="3527cc83675cc55b3ab3feaeeafbca3d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology_node.html#3527cc83675cc55b3ab3feaeeafbca3d">XDptx_TopologyNode::DeviceType</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The type of DisplayPort device. Either a branch or sink.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="a477c863dbf616294b63b4fc4f61d338"></a><!-- doxytag: member="XDptx_TopologyNode::DpcdRev" ref="a477c863dbf616294b63b4fc4f61d338" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology_node.html#a477c863dbf616294b63b4fc4f61d338">XDptx_TopologyNode::DpcdRev</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The revision of the device's DisplayPort Configuration Data (DPCD). For this device to support MST features, this value must represent a protocl version greater or equal to 1.2.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="31f91fdac9d2223df8dabb36cd3d47dc"></a><!-- doxytag: member="XDptx_TopologyNode::Guid" ref="31f91fdac9d2223df8dabb36cd3d47dc" args="[4]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx___topology_node.html#31f91fdac9d2223df8dabb36cd3d47dc">XDptx_TopologyNode::Guid</a>[4] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The global unique identifier (GUID) of the device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6d0f7bee5c754021229d2aae559dc87e"></a><!-- doxytag: member="XDptx_TopologyNode::LinkCountTotal" ref="6d0f7bee5c754021229d2aae559dc87e" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology_node.html#6d0f7bee5c754021229d2aae559dc87e">XDptx_TopologyNode::LinkCountTotal</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of DisplayPort links connecting this device to the DisplayPort TX.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="79367001f80ea1724f1cff524f0d8f4c"></a><!-- doxytag: member="XDptx_TopologyNode::MsgCapStatus" ref="79367001f80ea1724f1cff524f0d8f4c" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology_node.html#79367001f80ea1724f1cff524f0d8f4c">XDptx_TopologyNode::MsgCapStatus</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This device is capable of sending and receiving sideband messages.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="0627b064137f9cbd0398e6f05aab53d3"></a><!-- doxytag: member="XDptx_TopologyNode::RelativeAddress" ref="0627b064137f9cbd0398e6f05aab53d3" args="[15]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___topology_node.html#0627b064137f9cbd0398e6f05aab53d3">XDptx_TopologyNode::RelativeAddress</a>[15] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The relative address from the DisplayPort TX to this device.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xdptx_8h.html">xdptx.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/tab_b.gif
Executable file
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/tab_b.gif
Executable file
Binary file not shown.
|
After Width: | Height: | Size: 35 B |
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/tab_l.gif
Executable file
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/tab_l.gif
Executable file
Binary file not shown.
|
After Width: | Height: | Size: 706 B |
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/tab_r.gif
Executable file
BIN
XilinxProcessorIPLib/drivers/dp/doc/html/api/tab_r.gif
Executable file
Binary file not shown.
|
After Width: | Height: | Size: 2.5 KiB |
102
XilinxProcessorIPLib/drivers/dp/doc/html/api/tabs.css
Executable file
102
XilinxProcessorIPLib/drivers/dp/doc/html/api/tabs.css
Executable file
|
|
@ -0,0 +1,102 @@
|
|||
/* tabs styles, based on http://www.alistapart.com/articles/slidingdoors */
|
||||
|
||||
DIV.tabs
|
||||
{
|
||||
float : left;
|
||||
width : 100%;
|
||||
background : url("tab_b.gif") repeat-x bottom;
|
||||
margin-bottom : 4px;
|
||||
}
|
||||
|
||||
DIV.tabs UL
|
||||
{
|
||||
margin : 0px;
|
||||
padding-left : 10px;
|
||||
list-style : none;
|
||||
}
|
||||
|
||||
DIV.tabs LI, DIV.tabs FORM
|
||||
{
|
||||
display : inline;
|
||||
margin : 0px;
|
||||
padding : 0px;
|
||||
}
|
||||
|
||||
DIV.tabs FORM
|
||||
{
|
||||
float : right;
|
||||
}
|
||||
|
||||
DIV.tabs A
|
||||
{
|
||||
float : left;
|
||||
background : url("tab_r.gif") no-repeat right top;
|
||||
border-bottom : 1px solid #84B0C7;
|
||||
font-size : x-small;
|
||||
font-weight : bold;
|
||||
text-decoration : none;
|
||||
}
|
||||
|
||||
DIV.tabs A:hover
|
||||
{
|
||||
background-position: 100% -150px;
|
||||
}
|
||||
|
||||
DIV.tabs A:link, DIV.tabs A:visited,
|
||||
DIV.tabs A:active, DIV.tabs A:hover
|
||||
{
|
||||
color: #1A419D;
|
||||
}
|
||||
|
||||
DIV.tabs SPAN
|
||||
{
|
||||
float : left;
|
||||
display : block;
|
||||
background : url("tab_l.gif") no-repeat left top;
|
||||
padding : 5px 9px;
|
||||
white-space : nowrap;
|
||||
}
|
||||
|
||||
DIV.tabs INPUT
|
||||
{
|
||||
float : right;
|
||||
display : inline;
|
||||
font-size : 1em;
|
||||
}
|
||||
|
||||
DIV.tabs TD
|
||||
{
|
||||
font-size : x-small;
|
||||
font-weight : bold;
|
||||
text-decoration : none;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Commented Backslash Hack hides rule from IE5-Mac \*/
|
||||
DIV.tabs SPAN {float : none;}
|
||||
/* End IE5-Mac hack */
|
||||
|
||||
DIV.tabs A:hover SPAN
|
||||
{
|
||||
background-position: 0% -150px;
|
||||
}
|
||||
|
||||
DIV.tabs LI#current A
|
||||
{
|
||||
background-position: 100% -150px;
|
||||
border-width : 0px;
|
||||
}
|
||||
|
||||
DIV.tabs LI#current SPAN
|
||||
{
|
||||
background-position: 0% -150px;
|
||||
padding-bottom : 6px;
|
||||
}
|
||||
|
||||
DIV.nav
|
||||
{
|
||||
background : none;
|
||||
border : none;
|
||||
border-bottom : 1px solid #84B0C7;
|
||||
}
|
||||
1275
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx_8c.html
Executable file
1275
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx_8c.html
Executable file
File diff suppressed because it is too large
Load diff
3865
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx_8h.html
Executable file
3865
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx_8h.html
Executable file
File diff suppressed because it is too large
Load diff
419
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__edid_8c.html
Normal file
419
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__edid_8c.html
Normal file
|
|
@ -0,0 +1,419 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xdptx_edid.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xdptx_edid.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file contains functions related to accessing the Extended Display Identification Data (EDID) of a specified sink using the <a class="el" href="struct_x_dptx.html">XDptx</a> driver.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None.</dd></dl>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- ---- -------- -----------------------------------------------
|
||||
3.0 als 11/04/14 Initial release.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<code>#include "xstatus.h"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#cdf3fcdd140ad27aacedc8852d43cdc5">XDptx_GetEdid</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 *Edid)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#504e1da83e392f0428ebf750f3fa5df5">XDptx_GetRemoteEdid</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 *Edid)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#f055e7ce4942e1bb7b0d20bc0d38d6c1">XDptx_GetEdidBlock</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 *Data, u8 BlockNum)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#52517d09cc73a7e286d04790594a30c2">XDptx_GetRemoteEdidBlock</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 *Data, u8 BlockNum, u8 LinkCountTotal, u8 *RelativeAddress)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#65c571add61a17c00ac380b24dbe9b98">XDptx_GetRemoteEdidDispIdExt</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 *Data, u8 LinkCountTotal, u8 *RelativeAddress)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#4ad4de26b5e25389163b42e50def32fb">XDptx_GetDispIdDataBlock</a> (u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__edid_8c.html#86ed8332a0bd5e0069132fe6bf945f21">XDptx_GetRemoteTiledDisplayDb</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 *EdidExt, u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr)</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="4ad4de26b5e25389163b42e50def32fb"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetDispIdDataBlock" ref="4ad4de26b5e25389163b42e50def32fb" args="(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetDispIdDataBlock </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>DisplayIdRaw</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>SectionTag</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 ** </td>
|
||||
<td class="paramname"> <em>DataBlockPtr</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Given a section tag, search for and retrieve the appropriate section data block that is part of the specified DisplayID structure.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>DisplayIdRaw</em> </td><td>is a pointer to the DisplayID data. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>SectionTag</em> </td><td>is the tag to search for that represents the desired section data block. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>DataBlockPtr</em> </td><td>will be set by this function to point to the appropriate section data block that is part of the DisplayIdRaw.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if the section data block with the specified tag was found.</li><li>XST_FAILURE otherwise.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The DataBlockPtr argument is modified to point to the entry in DisplayIdRaw that represents the beginning of the desired section data block. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="cdf3fcdd140ad27aacedc8852d43cdc5"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetEdid" ref="cdf3fcdd140ad27aacedc8852d43cdc5" args="(XDptx *InstancePtr, u8 *Edid)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetEdid </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>Edid</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function retrieves an immediately connected RX device's Extended Display Identification Data (EDID) structure.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Edid</em> </td><td>is a pointer to the Edid buffer to save to.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if the I2C transactions to read the EDID were successful.</li><li>XST_ERROR_COUNT_MAX if the EDID read request timed out.</li><li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li><li>XST_FAILURE otherwise.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="f055e7ce4942e1bb7b0d20bc0d38d6c1"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetEdidBlock" ref="f055e7ce4942e1bb7b0d20bc0d38d6c1" args="(XDptx *InstancePtr, u8 *Data, u8 BlockNum)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetEdidBlock </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>Data</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>BlockNum</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Retrieve an immediately connected RX device's Extended Display Identification Data (EDID) block given the block number. A block number of 0 represents the base EDID and subsequent block numbers represent EDID extension blocks.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Data</em> </td><td>is a pointer to the data buffer to save the block data to. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>BlockNum</em> </td><td>is the EDID block number to retrieve.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if the block read has successfully completed with no errors.</li><li>XST_ERROR_COUNT_MAX if a time out occurred while attempting to read the requested block.</li><li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li><li>XST_FAILURE otherwise.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="504e1da83e392f0428ebf750f3fa5df5"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetRemoteEdid" ref="504e1da83e392f0428ebf750f3fa5df5" args="(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 *Edid)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetRemoteEdid </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>LinkCountTotal</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>RelativeAddress</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>Edid</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function retrieves a remote RX device's Extended Display Identification Data (EDID) structure.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>LinkCountTotal</em> </td><td>is the number of DisplayPort links from the DisplayPort source to the target DisplayPort device. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>RelativeAddress</em> </td><td>is the relative address from the DisplayPort source to the target DisplayPort device. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Edid</em> </td><td>is a pointer to the Edid buffer to save to.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if the I2C transactions to read the EDID were successful.</li><li>XST_ERROR_COUNT_MAX if the EDID read request timed out.</li><li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li><li>XST_FAILURE otherwise.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="52517d09cc73a7e286d04790594a30c2"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetRemoteEdidBlock" ref="52517d09cc73a7e286d04790594a30c2" args="(XDptx *InstancePtr, u8 *Data, u8 BlockNum, u8 LinkCountTotal, u8 *RelativeAddress)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetRemoteEdidBlock </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>Data</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>BlockNum</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>LinkCountTotal</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>RelativeAddress</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Retrieve a downstream DisplayPort device's Extended Display Identification Data (EDID) block given the block number. A block number of 0 represents the base EDID and subsequent block numbers represent EDID extension blocks.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Data</em> </td><td>is a pointer to the data buffer to save the block data to. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>BlockNum</em> </td><td>is the EDID block number to retrieve. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>LinkCountTotal</em> </td><td>is the total DisplayPort links connecting the DisplayPort TX to the targeted downstream device. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>RelativeAddress</em> </td><td>is the relative address from the DisplayPort source to the targeted DisplayPort device.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if the block read has successfully completed with no errors.</li><li>XST_ERROR_COUNT_MAX if a time out occurred while attempting to read the requested block.</li><li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li><li>XST_FAILURE otherwise.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="65c571add61a17c00ac380b24dbe9b98"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetRemoteEdidDispIdExt" ref="65c571add61a17c00ac380b24dbe9b98" args="(XDptx *InstancePtr, u8 *Data, u8 LinkCountTotal, u8 *RelativeAddress)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetRemoteEdidDispIdExt </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>Data</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>LinkCountTotal</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>RelativeAddress</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Search for and retrieve a downstream DisplayPort device's Extended Display Identification Data (EDID) extension block of type DisplayID.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Data</em> </td><td>is a pointer to the data buffer to save the DisplayID to. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>LinkCountTotal</em> </td><td>is the total DisplayPort links connecting the DisplayPort TX to the targeted downstream device. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>RelativeAddress</em> </td><td>is the relative address from the DisplayPort source to the targeted DisplayPort device.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS a DisplayID extension block was found.</li><li>XST_ERROR_COUNT_MAX if a time out occurred while attempting to read an extension block.</li><li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li><li>XST_FAILURE if no DisplayID extension block was found or some error occurred in the search.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="86ed8332a0bd5e0069132fe6bf945f21"></a><!-- doxytag: member="xdptx_edid.c::XDptx_GetRemoteTiledDisplayDb" ref="86ed8332a0bd5e0069132fe6bf945f21" args="(XDptx *InstancePtr, u8 *EdidExt, u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_GetRemoteTiledDisplayDb </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>EdidExt</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>LinkCountTotal</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>RelativeAddress</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 ** </td>
|
||||
<td class="paramname"> <em>DataBlockPtr</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Search for and retrieve a downstream DisplayPort device's Tiled Display Topology (TDT) section data block that is part of the downstream device's DisplayID structure. The DisplayID structure is part of the Extended Display Identification Data (EDID) in the form of an extension block.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>EdidExt</em> </td><td>is a pointer to the data area that will be filled by the retrieved DisplayID extension block. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>LinkCountTotal</em> </td><td>is the total DisplayPort links connecting the DisplayPort TX to the targeted downstream device. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>RelativeAddress</em> </td><td>is the relative address from the DisplayPort source to the targeted DisplayPort device. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>DataBlockPtr</em> </td><td>will be set by this function to point to the TDT data block that is part of the EdidExt extension block.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS a DisplayID extension block was found.</li><li>XST_ERROR_COUNT_MAX if a time out occurred while attempting to read an extension block.</li><li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li><li>XST_FAILURE if no DisplayID extension block was found or some error occurred in the search.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The EdidExt will be filled with the DisplayID EDID extension block and the DataBlockPtr argument is modified to point to the EdidExt entry representing the TDT section data block. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
10648
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__hw_8h.html
Executable file
10648
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__hw_8h.html
Executable file
File diff suppressed because it is too large
Load diff
167
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__intr_8c.html
Executable file
167
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__intr_8c.html
Executable file
|
|
@ -0,0 +1,167 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xdptx_intr.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xdptx_intr.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file contains functions related to <a class="el" href="struct_x_dptx.html">XDptx</a> interrupt handling.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None.</dd></dl>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- ---- -------- -----------------------------------------------
|
||||
1.0 als 05/17/14 Initial release.
|
||||
3.0 als 12/16/14 Increased debounce duration for HPD to 0.500ms.
|
||||
Added masking of interrupts during servicing.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__intr_8c.html#af4bdfbe0785e1d0ec3d80edec1a86cb">XDptx_SetHpdEventHandler</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, <a class="el" href="xdptx_8h.html#6f6cee9a7863df256adb35802fc65017">XDptx_HpdEventHandler</a> CallbackFunc, void *CallbackRef)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__intr_8c.html#2ab1eec64ba571d155e56bb433fea5bf">XDptx_SetHpdPulseHandler</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, <a class="el" href="xdptx_8h.html#41e04c356fe95636134164b0f03bca9b">XDptx_HpdPulseHandler</a> CallbackFunc, void *CallbackRef)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__intr_8c.html#52950290a845ab93bac618ea8af9efc4">XDptx_HpdInterruptHandler</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr)</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="52950290a845ab93bac618ea8af9efc4"></a><!-- doxytag: member="xdptx_intr.c::XDptx_HpdInterruptHandler" ref="52950290a845ab93bac618ea8af9efc4" args="(XDptx *InstancePtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_HpdInterruptHandler </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function is the interrupt handler for the <a class="el" href="struct_x_dptx.html">XDptx</a> driver.<p>
|
||||
When an interrupt happens, it first detects what kind of interrupt happened, then decides which callback function to invoke.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="af4bdfbe0785e1d0ec3d80edec1a86cb"></a><!-- doxytag: member="xdptx_intr.c::XDptx_SetHpdEventHandler" ref="af4bdfbe0785e1d0ec3d80edec1a86cb" args="(XDptx *InstancePtr, XDptx_HpdEventHandler CallbackFunc, void *CallbackRef)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_SetHpdEventHandler </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="xdptx_8h.html#6f6cee9a7863df256adb35802fc65017">XDptx_HpdEventHandler</a> </td>
|
||||
<td class="paramname"> <em>CallbackFunc</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">void * </td>
|
||||
<td class="paramname"> <em>CallbackRef</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function installs a callback function for when a hot-plug-detect event interrupt occurs.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>CallbackFunc</em> </td><td>is the address to the callback function. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>CallbackRef</em> </td><td>is the user data item that will be passed to the callback function when it is invoked.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2ab1eec64ba571d155e56bb433fea5bf"></a><!-- doxytag: member="xdptx_intr.c::XDptx_SetHpdPulseHandler" ref="2ab1eec64ba571d155e56bb433fea5bf" args="(XDptx *InstancePtr, XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_SetHpdPulseHandler </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="xdptx_8h.html#41e04c356fe95636134164b0f03bca9b">XDptx_HpdPulseHandler</a> </td>
|
||||
<td class="paramname"> <em>CallbackFunc</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">void * </td>
|
||||
<td class="paramname"> <em>CallbackRef</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function installs a callback function for when a hot-plug-detect pulse interrupt occurs.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>CallbackFunc</em> </td><td>is the address to the callback function. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>CallbackRef</em> </td><td>is the user data item that will be passed to the callback function when it is invoked.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
1732
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__mst_8c.html
Executable file
1732
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__mst_8c.html
Executable file
File diff suppressed because it is too large
Load diff
133
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__selftest_8c.html
Executable file
133
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__selftest_8c.html
Executable file
|
|
@ -0,0 +1,133 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xdptx_selftest.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xdptx_selftest.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file contains a diagnostic self-test function for the <a class="el" href="struct_x_dptx.html">XDptx</a> driver. It will check many of the DisplayPort TX's register values against the default reset values as a sanity-check that the core is ready to be used.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None.</dd></dl>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- ---- -------- -----------------------------------------------
|
||||
1.0 als 05/17/14 Initial release.
|
||||
3.0 als 12/16/14 Stream naming now starts at 1 to follow IP.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<code>#include "xstatus.h"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__selftest_8c.html#0f3e36d00cbb3c9550cf880bb03cfea9">XDptx_SelfTest</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr)</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Variables</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__selftest_8c.html#65af729ef8da95153475f2224b4329c2">ResetValues</a> [53][2]</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__selftest_8c.html#7a190e8d88f6885fdd71e6bbda945c72">ResetValuesMsa</a> [20][2]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="0f3e36d00cbb3c9550cf880bb03cfea9"></a><!-- doxytag: member="xdptx_selftest.c::XDptx_SelfTest" ref="0f3e36d00cbb3c9550cf880bb03cfea9" args="(XDptx *InstancePtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XDptx_SelfTest </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function runs a self-test on the <a class="el" href="struct_x_dptx.html">XDptx</a> driver/device. The sanity test checks whether or not all tested registers hold their default reset values.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if the self-test passed - all tested registers hold their default reset values.</li><li>XST_FAILURE otherwise.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<hr><h2>Variable Documentation</h2>
|
||||
<a class="anchor" name="65af729ef8da95153475f2224b4329c2"></a><!-- doxytag: member="xdptx_selftest.c::ResetValues" ref="65af729ef8da95153475f2224b4329c2" args="[53][2]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="xdptx__selftest_8c.html#65af729ef8da95153475f2224b4329c2">ResetValues</a>[53][2] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This table contains the default values for the DisplayPort TX core's general usage registers.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7a190e8d88f6885fdd71e6bbda945c72"></a><!-- doxytag: member="xdptx_selftest.c::ResetValuesMsa" ref="7a190e8d88f6885fdd71e6bbda945c72" args="[20][2]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="xdptx__selftest_8c.html#7a190e8d88f6885fdd71e6bbda945c72">ResetValuesMsa</a>[20][2] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
<b>Initial value:</b><div class="fragment"><pre class="fragment">
|
||||
{
|
||||
{<a class="code" href="xdptx__hw_8h.html#abfdf1c8ce7c380c8e1a1e8f054f5120">XDPTX_MAIN_STREAM_HTOTAL</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#0106cb54397959b72820d01d2738e44f">XDPTX_MAIN_STREAM_VTOTAL</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#3191336d71991f45e685370166b75235">XDPTX_MAIN_STREAM_POLARITY</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#4f0cf03e1278c8fa08884e3684115c12">XDPTX_MAIN_STREAM_HSWIDTH</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#b76db8018242c149a8f04425b96a0073">XDPTX_MAIN_STREAM_VSWIDTH</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#46f4a5ce423759c35bc5e033cc959065">XDPTX_MAIN_STREAM_HRES</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#550fd6231df126304130eeddd06eecb4">XDPTX_MAIN_STREAM_VRES</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#e9e74dfaeeef0afcab887f8c2d8e16c8">XDPTX_MAIN_STREAM_HSTART</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#146ad1908ab33bcea4ff20864857fcda">XDPTX_MAIN_STREAM_VSTART</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#98a49091321fa30ac74a868dfdda94ea">XDPTX_MAIN_STREAM_MISC0</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#f8260d6919b171a531a5140e36b53d5f">XDPTX_MAIN_STREAM_MISC1</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#12525c000e5e27377091080aeb16f676">XDPTX_M_VID</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#636b945926097deba9547fe7b03523a6">XDPTX_TU_SIZE</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#40b298687646706b016e22b7519d307d">XDPTX_N_VID</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#82d867d418c722d84dccf08c1c01cfb6">XDPTX_USER_PIXEL_WIDTH</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#878e506f4f5d3177baddd2c56b779b93">XDPTX_USER_DATA_COUNT_PER_LANE</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#369f88c7bed81fcc320ed60590ee198b">XDPTX_MAIN_STREAM_INTERLACED</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#ef02dda0634e52791bb332de791a79c3">XDPTX_MIN_BYTES_PER_TU</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#d6fb8fc7ffbc02a36aec3763720e5d51">XDPTX_FRAC_BYTES_PER_TU</a>, 0},
|
||||
{<a class="code" href="xdptx__hw_8h.html#8e570f6926e0dc55c65a0c73dc0c7113">XDPTX_INIT_WAIT</a>, 32}
|
||||
}
|
||||
</pre></div>This table contains the default values for the DisplayPort TX core's main stream attribute (MSA) registers.
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
90
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__sinit_8c.html
Executable file
90
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__sinit_8c.html
Executable file
|
|
@ -0,0 +1,90 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xdptx_sinit.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xdptx_sinit.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file contains static initialization methods for the <a class="el" href="struct_x_dptx.html">XDptx</a> driver.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None.</dd></dl>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- ---- -------- -----------------------------------------------
|
||||
1.0 als 05/17/14 Initial release.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<code>#include "xparameters.h"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__sinit_8c.html#696416992bebdddc0fad449fe7afe24f">XDptx_LookupConfig</a> (u16 DeviceId)</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Variables</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__sinit_8c.html#277a1798d54193f6873982d7ca66ed39">XDptx_ConfigTable</a> [XPAR_XDPTX_NUM_INSTANCES]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="696416992bebdddc0fad449fe7afe24f"></a><!-- doxytag: member="xdptx_sinit.c::XDptx_LookupConfig" ref="696416992bebdddc0fad449fe7afe24f" args="(u16 DeviceId)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a>* XDptx_LookupConfig </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype">u16 </td>
|
||||
<td class="paramname"> <em>DeviceId</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function looks for the device configuration based on the unique device ID. The table XDptx_ConfigTable[] contains the configuration information for each device in the system.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>DeviceId</em> </td><td>is the unique device ID of the device being looked up.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<hr><h2>Variable Documentation</h2>
|
||||
<a class="anchor" name="277a1798d54193f6873982d7ca66ed39"></a><!-- doxytag: member="xdptx_sinit.c::XDptx_ConfigTable" ref="277a1798d54193f6873982d7ca66ed39" args="[XPAR_XDPTX_NUM_INSTANCES]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a> <a class="el" href="xdptx__sinit_8c.html#277a1798d54193f6873982d7ca66ed39">XDptx_ConfigTable</a>[XPAR_XDPTX_NUM_INSTANCES] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
A table of configuration structures containing the configuration information for each DisplayPort TX core in the system.
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
451
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__spm_8c.html
Executable file
451
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__spm_8c.html
Executable file
|
|
@ -0,0 +1,451 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xdptx_spm.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xdptx_spm.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file contains the stream policy maker functions for the <a class="el" href="struct_x_dptx.html">XDptx</a> driver. These functions set up the DisplayPort TX core's main stream attributes that determine how a video stream will be displayed.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None.</dd></dl>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- ---- -------- -----------------------------------------------
|
||||
1.0 als 05/17/14 Initial release.
|
||||
als 08/03/14 Initial MST addition.
|
||||
3.0 als 12/16/14 Updated to use common video library.
|
||||
Stream naming now starts at 1 to follow IP.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<code>#include "<a class="el" href="xdptx__hw_8h.html">xdptx_hw.h</a>"</code><br>
|
||||
<code>#include "xstatus.h"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#99d8902337e7bb3f7c607568501e16a1">XDptx_CfgMsaRecalculate</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#8f5a8d3f316f519145ecd9a94bf27ce8">XDptx_CfgMsaUseStandardVideoMode</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream, XVid_VideoMode VideoMode)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#b4778897734128bf467047a90066c922">XDptx_CfgMsaUseEdidPreferredTiming</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream, u8 *Edid)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#b04d6d38ab65f7d6d5b4734eedf9b020">XDptx_CfgMsaUseCustom</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream, <a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a> *MsaConfigCustom, u8 Recalculate)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#5dba8599ab68d0766e120119a6c6b83a">XDptx_CfgMsaSetBpc</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream, u8 BitsPerColor)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#9192eda72dd8e74339cca7de45383110">XDptx_CfgMsaEnSynchClkMode</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream, u8 Enable)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#1c1894cfa6ff7425bb8cdfa19847cd38">XDptx_SetVideoMode</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#b2120a4c08427e4e102efdfd17d65fac">XDptx_ClearMsaValues</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__spm_8c.html#93def464f8e63597dfde42ea658ec2a6">XDptx_SetMsaValues</a> (<a class="el" href="struct_x_dptx.html">XDptx</a> *InstancePtr, u8 Stream)</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="9192eda72dd8e74339cca7de45383110"></a><!-- doxytag: member="xdptx_spm.c::XDptx_CfgMsaEnSynchClkMode" ref="9192eda72dd8e74339cca7de45383110" args="(XDptx *InstancePtr, u8 Stream, u8 Enable)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_CfgMsaEnSynchClkMode </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Enable</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function enables or disables synchronous clock mode for a video stream.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which to enable or disable synchronous clock mode. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Enable</em> </td><td>if set to 1, will enable synchronous clock mode. Otherwise, if set to 0, synchronous clock mode will be disabled.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="99d8902337e7bb3f7c607568501e16a1"></a><!-- doxytag: member="xdptx_spm.c::XDptx_CfgMsaRecalculate" ref="99d8902337e7bb3f7c607568501e16a1" args="(XDptx *InstancePtr, u8 Stream)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_CfgMsaRecalculate </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function calculates the following Main Stream Attributes (MSA):<ul>
|
||||
<li>Transfer unit size</li><li>User pixel width</li><li>Horizontal start</li><li>Vertical start</li><li>Horizontal total clock</li><li>Vertical total clock</li><li>Misc0</li><li>Misc1</li><li>Data per lane</li><li>Average number of bytes per transfer unit</li><li>Number of initial wait cycles These values are derived from:</li><li>Bits per color</li><li>Horizontal resolution</li><li>Vertical resolution</li><li>Pixel clock (in KHz)</li><li>Horizontal sync polarity</li><li>Vertical sync polarity</li><li>Horizontal front porch</li><li>Horizontal sync pulse width</li><li>Horizontal back porch</li><li>Vertical front porch</li><li>Vertical sync pulse width</li><li>Vertical back porch</li></ul>
|
||||
<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which to calculate the MSA values.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The MsaConfig structure is modified with the new, calculated values. The main stream attributes that were used to derive the calculated values are untouched in the MsaConfig structure. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5dba8599ab68d0766e120119a6c6b83a"></a><!-- doxytag: member="xdptx_spm.c::XDptx_CfgMsaSetBpc" ref="5dba8599ab68d0766e120119a6c6b83a" args="(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_CfgMsaSetBpc </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>BitsPerColor</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function sets the bits per color value of the video stream.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which to set the color depth. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>BitsPerColor</em> </td><td>is the new number of bits per color to use.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The InstancePtr->MsaConfig structure is modified to reflect the new main stream attributes associated with a new bits per color value. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b04d6d38ab65f7d6d5b4734eedf9b020"></a><!-- doxytag: member="xdptx_spm.c::XDptx_CfgMsaUseCustom" ref="b04d6d38ab65f7d6d5b4734eedf9b020" args="(XDptx *InstancePtr, u8 Stream, XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_CfgMsaUseCustom </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a> * </td>
|
||||
<td class="paramname"> <em>MsaConfigCustom</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Recalculate</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function takes a the main stream attributes from MsaConfigCustom and copies them into InstancePtr->MsaConfig. If desired, given a base set of attributes, the rest of the attributes may be derived. The minimal required main stream attributes (MSA) that must be contained in the MsaConfigCustom structure are:<ul>
|
||||
<li>Pixel clock (in KHz)</li><li>Horizontal sync polarity</li><li>Vertical sync polarity</li><li>Horizontal sync pulse width</li><li>Vertical sync pulse width</li><li>Horizontal resolution</li><li>Vertical resolution</li><li>Vertical back porch</li><li>Vertical front porch</li><li>Horizontal back porch</li><li>Horizontal front porch</li></ul>
|
||||
<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which the MSA values will be used for. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>MsaConfigCustom</em> </td><td>is the structure that will be used to copy the main stream attributes from (into InstancePtr->MsaConfig). </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Recalculate</em> </td><td>is a boolean enable that determines whether or not the main stream attributes should be recalculated.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The InstancePtr->MsaConfig structure is modified with the new values. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b4778897734128bf467047a90066c922"></a><!-- doxytag: member="xdptx_spm.c::XDptx_CfgMsaUseEdidPreferredTiming" ref="b4778897734128bf467047a90066c922" args="(XDptx *InstancePtr, u8 Stream, u8 *Edid)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_CfgMsaUseEdidPreferredTiming </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 * </td>
|
||||
<td class="paramname"> <em>Edid</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function sets the main stream attribute values in the configuration structure to match the preferred timing of the sink monitor. This Preferred Timing Mode (PTM) information is stored in the sink's Extended Display Identification Data (EDID).<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which the MSA values will be used for. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Edid</em> </td><td>is a pointer to the Edid to use for the specified stream.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The InstancePtr->MsaConfig structure is modified to reflect the main stream attribute values associated to the preferred timing of the sink monitor. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8f5a8d3f316f519145ecd9a94bf27ce8"></a><!-- doxytag: member="xdptx_spm.c::XDptx_CfgMsaUseStandardVideoMode" ref="8f5a8d3f316f519145ecd9a94bf27ce8" args="(XDptx *InstancePtr, u8 Stream, XVid_VideoMode VideoMode)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_CfgMsaUseStandardVideoMode </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">XVid_VideoMode </td>
|
||||
<td class="paramname"> <em>VideoMode</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function sets the Main Stream Attribute (MSA) values in the configuration structure to match one of the standard display mode timings from the XDptx_DmtModes[] standard Display Monitor Timing (DMT) table. The XDptx_VideoMode enumeration in <a class="el" href="xdptx_8h.html">xdptx.h</a> lists the available video modes.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which the MSA values will be used for. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>VideoMode</em> </td><td>is one of the enumerated standard video modes that is used to determine the MSA values to be used.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>The InstancePtr->MsaConfig structure is modified to reflect the MSA values associated to the specified video mode. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b2120a4c08427e4e102efdfd17d65fac"></a><!-- doxytag: member="xdptx_spm.c::XDptx_ClearMsaValues" ref="b2120a4c08427e4e102efdfd17d65fac" args="(XDptx *InstancePtr, u8 Stream)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_ClearMsaValues </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function clears the main stream attributes registers of the DisplayPort TX core.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which to clear the MSA values.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="93def464f8e63597dfde42ea658ec2a6"></a><!-- doxytag: member="xdptx_spm.c::XDptx_SetMsaValues" ref="93def464f8e63597dfde42ea658ec2a6" args="(XDptx *InstancePtr, u8 Stream)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_SetMsaValues </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function sets the main stream attributes registers of the DisplayPort TX core with the values specified in the main stream attributes configuration structure.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which to set the MSA values for.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="1c1894cfa6ff7425bb8cdfa19847cd38"></a><!-- doxytag: member="xdptx_spm.c::XDptx_SetVideoMode" ref="1c1894cfa6ff7425bb8cdfa19847cd38" args="(XDptx *InstancePtr, u8 Stream)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XDptx_SetVideoMode </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_dptx.html">XDptx</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Stream</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function clears the main stream attributes registers of the DisplayPort TX core and sets them to the values specified in the main stream attributes configuration structure.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_dptx.html">XDptx</a> instance </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Stream</em> </td><td>is the stream number for which to set the MSA values for.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
58
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__vidmodetable_8c.html
Executable file
58
XilinxProcessorIPLib/drivers/dp/doc/html/api/xdptx__vidmodetable_8c.html
Executable file
|
|
@ -0,0 +1,58 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xdptx_vidmodetable.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xdptx_vidmodetable.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
Contains display monitor timing (DMT) modes for various standard resolutions.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None.</dd></dl>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- ---- -------- -----------------------------------------------
|
||||
1.0 als 05/17/14 Initial release.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "xil_types.h"</code><br>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Variables</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__vidmodetable_8c.html#35408b37824862d172606842e26e66e0">XDptx_DmtModes</a> []</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Variable Documentation</h2>
|
||||
<a class="anchor" name="35408b37824862d172606842e26e66e0"></a><!-- doxytag: member="xdptx_vidmodetable.c::XDptx_DmtModes" ref="35408b37824862d172606842e26e66e0" args="[]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_dptx___dmt_mode.html">XDptx_DmtMode</a> <a class="el" href="xdptx__vidmodetable_8c.html#35408b37824862d172606842e26e66e0">XDptx_DmtModes</a>[] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This table contains the main stream attributes for various standard resolutions. Each entry is of the format: 1) XDPTX_VM_<HRES>x<VRES>_<REFRESH (HZ)>_P(_RB = Reduced Blanking) 2) Display Monitor Timing (DMT) ID 3) Horizontal resolution (pixels) 4) Vertical resolution (lines) 5) Pixel clock (KHz) 6) Interlaced (0=non-interlaced|1=interlaced) 7) Horizontal sync polarity (0=positive|1=negative) 8) Vertical sync polarity (0=positive|1=negative) 9) Horizontal front porch (pixels) 10) Horizontal sync time (pixels) 11) Horizontal back porch (pixels) 12) Vertical front porch (lines) 13) Vertical sync time (lines) 14) Vertical back porch (lines)
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
22
XilinxProcessorIPLib/drivers/dp/examples/index.html
Executable file
22
XilinxProcessorIPLib/drivers/dp/examples/index.html
Executable file
|
|
@ -0,0 +1,22 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
|
||||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Language" content="en-us">
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||
<title>Driver example applications</title>
|
||||
<link rel="stylesheet" type="text/css" href="../help.css">
|
||||
</head>
|
||||
<body bgcolor="#FFFFFF">
|
||||
<h1> Example applications for the dptx driver. </h1>
|
||||
<HR>
|
||||
<ul>
|
||||
<li>xdptx_audio_example.c <a href="xdptx_audio_example.c">(source)</a> </li>
|
||||
<li>xdptx_intr_example.c <a href="xdptx_intr_example.c">(source)</a> </li>
|
||||
<li>xdptx_mst_example.c <a href="xdptx_mst_example.c">(source)</a> </li>
|
||||
<li>xdptx_poll_example.c <a href="xdptx_poll_example.c">(source)</a> </li>
|
||||
<li>xdptx_selftest_example.c <a href="xdptx_selftest_example.c">(source)</a> </li>
|
||||
<li>xdptx_timer_example.c <a href="xdptx_timer_example.c">(source)</a> </li>
|
||||
</ul>
|
||||
<p><font face="Times New Roman" color="#800000">Copyright © 1995-2014 Xilinx, Inc. All rights reserved.</font></p>
|
||||
</body>
|
||||
</html>
|
||||
62
XilinxProcessorIPLib/drivers/dp/examples/readme.txt
Normal file
62
XilinxProcessorIPLib/drivers/dp/examples/readme.txt
Normal file
|
|
@ -0,0 +1,62 @@
|
|||
There are 6 examples included in this directory:
|
||||
1) xdptx_audio_example.c : This audio example, apart from training the main link
|
||||
and outputting video, illustrates the sequence required for setting up audio
|
||||
in the DisplayPort TX. This example requires that an audio source, such as a
|
||||
S/PDIF instance be present and connected to the DisplayPort TX in the
|
||||
hardware system, and for the audio enable configuration parameter to be set
|
||||
for the instantiated DisplayPort TX. For audio to output, the user will need
|
||||
to implement the following functions:
|
||||
a) Dptx_ConfigureAudioSrc : This function needs to configure the audio source
|
||||
to output to the DisplayPort TX.
|
||||
b) Dptx_AudioSendInfoFrame : This function needs to set up and write an audio
|
||||
info frame as per user requirements.
|
||||
|
||||
2) xdptx_intr_example.c : This interrupt example shows how to set up the
|
||||
interrupt system and specify the interrupt handlers for when a DisplayPort
|
||||
interrupt event occurs. An interrupt controller with a connection to the
|
||||
DisplayPort interrupt signal needs to exist in the hardware system.
|
||||
|
||||
3) xdptx_mst_example.c : This multi-stream transport (MST) example shows how to
|
||||
use the driver's MST capabilities. Streams can be directed at sinks using two
|
||||
methods:
|
||||
a) After topology discover has created a sink list, streams may be assigned
|
||||
to sinks using the index in the sink list.
|
||||
b) The streams may be assigned to sinks directly without using topology
|
||||
discovery if their relative addresses (and total number of DisplayPort
|
||||
links) from the DisplayPort source is known beforehand.
|
||||
|
||||
4) xdptx_poll_example.c : This interrupt example shows how to poll the
|
||||
DisplayPort TX instance's registers for DisplayPort interrupt events.
|
||||
|
||||
5) xdptx_timer_example.c : This timer example shows how to override the default
|
||||
sleep/delay functionality for MicroBlaze. A timer needs to exist in the
|
||||
hardware system and will be used for sleep/delay functionality inside of a
|
||||
callback function. The default behavior in MicroBlaze for sleep/delay is to
|
||||
call MB_Sleep from microblaze_sleep.h, which has only millisecond accuracy.
|
||||
For ARM/Zynq SoC systems, the supplied callback function will be ignored -
|
||||
the usleep function will be called since the SoC has a timer built-in.
|
||||
|
||||
6) xdptx_selftest_example.c : This self test example will perform a sanity check
|
||||
on the state of the DisplayPort TX instance. It may be called prior to usage
|
||||
of the core or after a reset to ensure that (a subset of) the registers hold
|
||||
their default values.
|
||||
|
||||
Each of these examples are meant to be used in conjunction with
|
||||
xdptx_example_common.[ch] which holds common functionality for all examples.
|
||||
After importing the examples, these files will need to be manually copied into
|
||||
the example src/ directory.
|
||||
This code shows how to train the main link and set up a video stream.
|
||||
|
||||
Additionally, in order to be able to use the interrupt, polling, and timer
|
||||
examples, the user will need to implement and link the following functions:
|
||||
1) Dptx_InitPlatform : This function needs to do all hardware system
|
||||
initialization.
|
||||
2) Dptx_StreamSrc* : These function need to configure the source of the stream
|
||||
(pattern generators, video input, etc.) such that a video stream, with
|
||||
timings and video attributes that correspond to the main stream attributes
|
||||
(MSA) configuration, is received by the DisplayPort Tx. The examples call
|
||||
this function from the Dptx_Run->Dptx_StartVideoStream functions in
|
||||
xdptx_example_common.c.
|
||||
|
||||
Note: All example functions start with Dptx_*, while all driver functions start
|
||||
with XDptx_*.
|
||||
268
XilinxProcessorIPLib/drivers/dp/examples/xdptx_audio_example.c
Normal file
268
XilinxProcessorIPLib/drivers/dp/examples/xdptx_audio_example.c
Normal file
|
|
@ -0,0 +1,268 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_audio_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver to train the main link and
|
||||
* to display video. In this example application, the sequence to enable audio
|
||||
* is illustrated.
|
||||
*
|
||||
* @note This example requires an audio source such as an S/PDIF instance
|
||||
* to be part of the hardware system. See XAPP1178 for reference.
|
||||
* @note This example requires that the audio enable configuration
|
||||
* parameter for DisplayPort be turned on when creating the
|
||||
* hardware design.
|
||||
* @note For this example to output audio, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit),
|
||||
* configuration of the audio source (Dptx_ConfigureAudioSrc) and,
|
||||
* depending on the hardware system, will need to implement sending
|
||||
* of an info frame (Dptx_AudioSendInfoFrame). See XAPP1178 and the
|
||||
* IP documentation for reference.
|
||||
* @note For this example to display output, after training is complete,
|
||||
* the user will need to implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* implement. The functions Dptx_ConfigureAudioSrc and
|
||||
* Dptx_AudioSendInfoFrame are present in this file and are also
|
||||
* left for the user to implement.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 07/29/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
static void Dptx_AudioInit(XDptx *InstancePtr);
|
||||
static void Dptx_ConfigureAudioSrc(XDptx *InstancePtr);
|
||||
static void Dptx_AudioSendInfoFrame(XDptx *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx audio example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the audio example finished successfully.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Run the XDptx audio example. */
|
||||
Status = Dptx_AudioExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the audio example using the XDptx driver. This
|
||||
* function will set up audio, initiate link training, and a video stream will
|
||||
* start being sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the system was set up correctly and link
|
||||
* training was successful.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Use single-stream transport (SST) mode for this example. Audio is
|
||||
* not supported in multi-stream transport (MST) mode. */
|
||||
XDptx_MstCfgModeDisable(InstancePtr);
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
Dptx_PlatformInit();
|
||||
/*******************/
|
||||
|
||||
Status = Dptx_SetupExample(InstancePtr, DeviceId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/* Initialize DisplayPort audio. */
|
||||
Dptx_AudioInit(InstancePtr);
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* A sink monitor must be connected at this point. See the polling or
|
||||
* interrupt examples for how to wait for a connection event. */
|
||||
Status = Dptx_Run(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will set up audio in the DisplayPort TX. The user will need
|
||||
* to implement configuration of the audio stream and, if needed, sending of
|
||||
* the info frame.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The user needs to implement the Dptx_ConfigureAudioSrc and
|
||||
* the Dptx_AudioSendInfoFrame functions to fulfill audio
|
||||
* initialization.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_AudioInit(XDptx *InstancePtr)
|
||||
{
|
||||
u32 Fs;
|
||||
u32 MAud;
|
||||
u32 NAud;
|
||||
u32 NumChs;
|
||||
|
||||
/* Disable audio in the DisplayPort TX. This will also flush the buffers
|
||||
* in the DisplayPort TX and set MUTE bit in VB-ID. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_CONTROL,
|
||||
0x0);
|
||||
|
||||
/* Configure the audio source (the S/PDIF controller). It is up to the
|
||||
* user to implement this function. */
|
||||
Dptx_ConfigureAudioSrc(InstancePtr);
|
||||
/*******************/
|
||||
|
||||
/* Write audio info frame as per user requirements. This may be optional
|
||||
* for some systems. 8 writes are required to register
|
||||
* XDPTX_TX_AUDIO_INFO_DATA. It is up to the user to implement this
|
||||
* function. */
|
||||
Dptx_AudioSendInfoFrame(InstancePtr);
|
||||
/*******************/
|
||||
|
||||
Fs = 48; /* KHz (32 | 44.1 | 48) */
|
||||
if (InstancePtr->LinkConfig.LinkRate == XDPTX_LINK_BW_SET_540GBPS) {
|
||||
MAud = 512 * Fs;
|
||||
}
|
||||
else if (InstancePtr->LinkConfig.LinkRate ==
|
||||
XDPTX_LINK_BW_SET_270GBPS) {
|
||||
MAud = 512 * Fs;
|
||||
}
|
||||
else if (InstancePtr->LinkConfig.LinkRate ==
|
||||
XDPTX_LINK_BW_SET_162GBPS) {
|
||||
MAud = 512 * Fs;
|
||||
}
|
||||
|
||||
/* Write the channel count. The value is (actual count - 1). */
|
||||
NumChs = 2;
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_CHANNELS,
|
||||
NumChs - 1);
|
||||
|
||||
/* NAud = 540000 | 270000 | 162000 */
|
||||
NAud = 27 * InstancePtr->LinkConfig.LinkRate * 1000;
|
||||
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_MAUD, MAud);
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_NAUD, NAud);
|
||||
|
||||
/* Enable audio in the DisplayPort TX. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_CONTROL,
|
||||
0x1);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function needs to configure the audio source.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The user needs to implement this. See XAPP1178 and the IP
|
||||
* documentation for reference.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_ConfigureAudioSrc(XDptx *InstancePtr)
|
||||
{
|
||||
xil_printf("Dptx_ConfigureAudioSrc: User defined function here.\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function needs to send an info frame as per user requirements.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The user needs to implement this. See XAPP1178 and the IP
|
||||
* documentation for reference.
|
||||
* @note This may be optional for some systems.
|
||||
* @note A sequence of 8 writes are required to register
|
||||
* XDPTX_TX_AUDIO_INFO_DATA. See XAPP1178 and the IP documentation
|
||||
* for reference.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_AudioSendInfoFrame(XDptx *InstancePtr)
|
||||
{
|
||||
xil_printf("Dptx_AudioSendInfoFrame: User defined function here.\n");
|
||||
}
|
||||
347
XilinxProcessorIPLib/drivers/dp/examples/xdptx_example_common.c
Normal file
347
XilinxProcessorIPLib/drivers/dp/examples/xdptx_example_common.c
Normal file
|
|
@ -0,0 +1,347 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_example_common.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver. It performs a self test on
|
||||
* the DisplayPort TX core by training the main link at the maximum common
|
||||
* capabilities between the TX and RX and checking the lane status.
|
||||
*
|
||||
* @note The DisplayPort TX core does not work alone - video/audio
|
||||
* sources need to be set up in the system correctly, as well as
|
||||
* setting up the output path (for example, configuring the
|
||||
* hardware system with the DisplayPort TX core output to an FMC
|
||||
* card with DisplayPort output capabilities. Some platform
|
||||
* initialization will need to happen prior to calling XDptx driver
|
||||
* functions. See XAPP1178 as a reference.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static void Dptx_StartVideoStream(XDptx *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will configure and establish a link with the receiver device,
|
||||
* afterwards, a video stream will start to be sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param LaneCount is the number of lanes to use over the main link.
|
||||
* @param LinkRate is the link rate to use over the main link.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if main link was successfully established.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_Run(XDptx *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Configure and establish a link. */
|
||||
Status = Dptx_StartLink(InstancePtr);
|
||||
if (Status == XST_SUCCESS) {
|
||||
/* Start the video stream. */
|
||||
Dptx_StartVideoStream(InstancePtr);
|
||||
} else {
|
||||
xil_printf("<-- Failed to establish/train the link.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will setup and initialize the DisplayPort TX core. The core's
|
||||
* configuration parameters will be retrieved based on the configuration
|
||||
* to the DisplayPort TX core instance with the specified device ID.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the device configuration was found and obtained
|
||||
* and if the main link was successfully established.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
XDptx_Config *ConfigPtr;
|
||||
u32 Status;
|
||||
|
||||
/* Obtain the device configuration for the DisplayPort TX core. */
|
||||
ConfigPtr = XDptx_LookupConfig(DeviceId);
|
||||
if (!ConfigPtr) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
/* Copy the device configuration into the InstancePtr's Config
|
||||
* structure. */
|
||||
XDptx_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
|
||||
/* Initialize the DisplayPort TX core. */
|
||||
Status = XDptx_InitializeTx(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will configure and establish a link with the receiver device.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS the if main link was successfully established.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_StartLink(XDptx *InstancePtr)
|
||||
{
|
||||
u32 VsLevelTx;
|
||||
u32 PeLevelTx;
|
||||
u32 Status;
|
||||
u8 LaneCount;
|
||||
u8 LinkRate;
|
||||
|
||||
/* Obtain the capabilities of the RX device by reading the monitor's
|
||||
* DPCD. */
|
||||
Status = XDptx_GetRxCapabilities(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
#if (TRAIN_USE_MAX_LINK == 1)
|
||||
LaneCount = InstancePtr->LinkConfig.MaxLaneCount;
|
||||
LinkRate = InstancePtr->LinkConfig.MaxLinkRate;
|
||||
#else
|
||||
LaneCount = TRAIN_USE_LANE_COUNT;
|
||||
LinkRate = TRAIN_USE_LINK_RATE;
|
||||
#endif
|
||||
|
||||
/* Check if the link is already trained */
|
||||
Status = XDptx_CheckLinkStatus(InstancePtr, LaneCount);
|
||||
if (Status == XST_SUCCESS) {
|
||||
xil_printf("-> Link is already trained on %d lanes.\n",
|
||||
LaneCount);
|
||||
if (XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_LINK_BW_SET) == LinkRate) {
|
||||
xil_printf("-> Link needs to be re-trained %d Mbps.\n",
|
||||
(270 * LinkRate));
|
||||
}
|
||||
else {
|
||||
xil_printf("-> Link is already trained at %d Mbps.\n",
|
||||
(270 * LinkRate));
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
}
|
||||
else if (Status == XST_FAILURE) {
|
||||
xil_printf("-> Needs training.\n");
|
||||
}
|
||||
else {
|
||||
/* Either a connection does not exist or the supplied lane count
|
||||
* is invalid. */
|
||||
xil_printf("-> Error checking link status.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_SetEnhancedFrameMode(InstancePtr, 1);
|
||||
XDptx_SetDownspread(InstancePtr, 0);
|
||||
|
||||
#if (TRAIN_USE_MAX_LINK == 1)
|
||||
/* Configure the main link based on the maximum common capabilities of
|
||||
* the DisplayPort TX core and the receiver device. */
|
||||
Status = XDptx_CfgMainLinkMax(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
#else
|
||||
XDptx_SetLinkRate(InstancePtr, LinkRate);
|
||||
XDptx_SetLaneCount(InstancePtr, LaneCount);
|
||||
#endif
|
||||
|
||||
/* Train the link. */
|
||||
xil_printf("******************************************\n");
|
||||
Status = XDptx_EstablishLink(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("!!! Training failed !!!\n");
|
||||
xil_printf("******************************************\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
VsLevelTx = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_PHY_VOLTAGE_DIFF_LANE_0);
|
||||
PeLevelTx = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_PHY_POSTCURSOR_LANE_0);
|
||||
xil_printf("!!! Training passed at LR:0x%02lx LC:%d !!!\n",
|
||||
InstancePtr->LinkConfig.LinkRate,
|
||||
InstancePtr->LinkConfig.LaneCount);
|
||||
xil_printf("VS:%d (TX:%d) PE:%d (TX:%d)\n",
|
||||
InstancePtr->LinkConfig.VsLevel, VsLevelTx,
|
||||
InstancePtr->LinkConfig.PeLevel, PeLevelTx);
|
||||
xil_printf("******************************************\n");
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will start sending a video stream over the main link. The
|
||||
* settings to be used are as follows:
|
||||
* - 8 bits per color.
|
||||
* - Video timing and screen resolution used:
|
||||
* - The connected monitor's preferred timing is used to determine the
|
||||
* video resolution (and associated timings) for the stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The Dptx_StreamSrc* are intentionally left for the user to
|
||||
* implement since configuration of the stream source is
|
||||
* application-specific.
|
||||
* @note The Extended Display Identification Data (EDID) is read in order
|
||||
* to obtain the video resolution and timings. If this read fails,
|
||||
* a resolution of 640x480 is used at a refresh rate of 60Hz.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_StartVideoStream(XDptx *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
u8 Edid[XDPTX_EDID_SIZE];
|
||||
|
||||
/* Set the bits per color. If not set, the default is 6. */
|
||||
XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID0, 8);
|
||||
|
||||
/* Set synchronous clock mode. */
|
||||
XDptx_CfgMsaEnSynchClkMode(InstancePtr, XDPTX_STREAM_ID0, 1);
|
||||
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID0);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID1);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID2);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID3);
|
||||
|
||||
/* Choose a method for selecting the video mode. There are 3 ways to do this:
|
||||
* 1) Use the preferred timing from the monitor's EDID:
|
||||
* u8 Edid[XDPTX_EDID_SIZE];
|
||||
* XDptx_GetEdid(InstancePtr, Edid);
|
||||
* XDptx_CfgMsaUseEdidPreferredTiming(InstancePtr, XDPTX_STREAM_ID0, Edid);
|
||||
*
|
||||
* 2) Use a standard video timing mode (see mode_table.h):
|
||||
* XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID0,
|
||||
XDPTX_VM_640x480_60_P);
|
||||
*
|
||||
* 3) Use a custom configuration for the main stream attributes (MSA):
|
||||
* XDptx_MainStreamAttributes MsaConfigCustom;
|
||||
* MsaConfigCustom.Dmt.HResolution = 1280;
|
||||
* MsaConfigCustom.Dmt.VResolution = 1024;
|
||||
* MsaConfigCustom.Dmt.PixelClkKhz = 108000;
|
||||
* MsaConfigCustom.Dmt.HSyncPolarity = 0;
|
||||
* MsaConfigCustom.Dmt.VSyncPolarity = 0;
|
||||
* MsaConfigCustom.Dmt.HFrontPorch = 48;
|
||||
* MsaConfigCustom.Dmt.HSyncPulseWidth = 112;
|
||||
* MsaConfigCustom.Dmt.HBackPorch = 248;
|
||||
* MsaConfigCustom.Dmt.VFrontPorch = 1;
|
||||
* MsaConfigCustom.Dmt.VSyncPulseWidth = 3;
|
||||
* MsaConfigCustom.Dmt.VBackPorch = 38;
|
||||
* XDptx_CfgMsaUseCustom(InstancePtr, XDPTX_STREAM_ID0,
|
||||
* &MsaConfigCustom, 1);
|
||||
*
|
||||
* To override the user pixel width:
|
||||
* InstancePtr->MsaConfig[_STREAM#_].OverrideUserPixelWidth = 1;
|
||||
* InstancePtr->MsaConfig[_STREAM#_].UserPixelWidth = _DESIRED_VALUE_;
|
||||
* Then, use one of the methods above to calculate the rest of the MSA.
|
||||
*/
|
||||
Status = XDptx_GetEdid(InstancePtr, Edid);
|
||||
if (Status == XST_SUCCESS) {
|
||||
XDptx_CfgMsaUseEdidPreferredTiming(InstancePtr,
|
||||
XDPTX_STREAM_ID0, Edid);
|
||||
}
|
||||
else {
|
||||
XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID0,
|
||||
XDPTX_VM_640x480_60_P);
|
||||
}
|
||||
|
||||
/* Disable MST for this example. */
|
||||
XDptx_MstDisable(InstancePtr);
|
||||
|
||||
/* Disable main stream to force sending of IDLE patterns. */
|
||||
XDptx_DisableMainLink(InstancePtr);
|
||||
|
||||
/* Reset the transmitter. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET,
|
||||
XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET, 0x0);
|
||||
|
||||
/* Set the DisplayPort TX video mode. */
|
||||
XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID0);
|
||||
|
||||
/* Configure video stream source or generator here. These function need
|
||||
* to be implemented in order for video to be displayed and is hardware
|
||||
* system specific. It is up to the user to implement these
|
||||
* functions. */
|
||||
Dptx_StreamSrcSetup(InstancePtr);
|
||||
Dptx_StreamSrcConfigure(InstancePtr);
|
||||
Dptx_StreamSrcSync(InstancePtr);
|
||||
/*********************************/
|
||||
|
||||
XDptx_EnableMainLink(InstancePtr);
|
||||
}
|
||||
136
XilinxProcessorIPLib/drivers/dp/examples/xdptx_example_common.h
Normal file
136
XilinxProcessorIPLib/drivers/dp/examples/xdptx_example_common.h
Normal file
|
|
@ -0,0 +1,136 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_example_common.h
|
||||
*
|
||||
* Contains a design example using the XDptx driver. It performs a self test on
|
||||
* the DisplayPort TX core by training the main link at the maximum common
|
||||
* capabilities between the TX and RX and checking the lane status.
|
||||
*
|
||||
* @note The DisplayPort TX core does not work alone - video/audio
|
||||
* sources need to be set up in the system correctly, as well as
|
||||
* setting up the output path (for example, configuring the
|
||||
* hardware system with the DisplayPort TX core output to an FMC
|
||||
* card with DisplayPort output capabilities. Some platform
|
||||
* initialization will need to happen prior to calling XDptx driver
|
||||
* functions. See XAPP1178 as a reference.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XDPTX_EXAMPLE_COMMON_H_
|
||||
/* Prevent circular inclusions by using protection macros. */
|
||||
#define XDPTX_EXAMPLE_COMMON_H_
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xil_printf.h"
|
||||
#include "xil_types.h"
|
||||
#include "xparameters.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Constant Definitions ****************************/
|
||||
|
||||
/* The unique device ID of the DisplayPort TX core instance to be used with the
|
||||
* examples. */
|
||||
#define DPTX_DEVICE_ID XPAR_DISPLAYPORT_0_DEVICE_ID
|
||||
|
||||
/* If set to 1, the link training process will continue training despite failing
|
||||
* by attempting training at a reduced link rate. It will also continue
|
||||
* attempting to train the link at a reduced lane count if needed. With this
|
||||
* option enabled, link training will return failure only when all link rate and
|
||||
* lane count combinations have been exhausted - that is, training fails using
|
||||
* 1-lane and a 1.62Gbps link rate.
|
||||
* If set to 0, link training will return failure if the training failed using
|
||||
* the current lane count and link rate settings.
|
||||
* TRAIN_ADAPTIVE is used by the examples as input to the
|
||||
* XDptx_EnableTrainAdaptive driver function. */
|
||||
#define TRAIN_ADAPTIVE 1
|
||||
|
||||
/* A value of 1 is used to indicate that the DisplayPort output path has a
|
||||
* redriver on the board that adjusts the voltage swing and pre-emphasis levels
|
||||
* that are outputted from the FPGA. If this is the case, the voltage swing and
|
||||
* pre-emphasis values supplied to the DisplayPort TX core will be evenly
|
||||
* distributed among the available levels as specified in the IP documentation.
|
||||
* Otherwise, a value of 0 is used to indicate that no redriver is present. In
|
||||
* order to meet the necessary voltage swing and pre-emphasis levels required by
|
||||
* a DisplayPort RX device, the level values specified to the DisplayPort TX
|
||||
* core will require some compensation.
|
||||
* TRAIN_HAS_REDRIVER is used by the examples as input to the
|
||||
* XDptx_SetHasRedriverInPath driver function.
|
||||
* Note: There are 16 possible voltage swing levels and 32 possible pre-emphasis
|
||||
* levels in the DisplayPort TX core that will be mapped to 4 possible
|
||||
* voltage swing and 4 possible pre-emphasis levels in the RX device. */
|
||||
#define TRAIN_HAS_REDRIVER 1
|
||||
|
||||
/* The link rate setting to begin link training with. Valid values are:
|
||||
* XDPTX_LINK_BW_SET_540GBPS, XDPTX_LINK_BW_SET_270GBPS, and
|
||||
* XDPTX_LINK_BW_SET_162GBPS. */
|
||||
#define TRAIN_USE_LINK_RATE XDPTX_LINK_BW_SET_540GBPS
|
||||
/* The lane count setting to begin link training with. Valid values are:
|
||||
* XDPTX_LANE_COUNT_SET_4, XDPTX_LANE_COUNT_SET_2, and
|
||||
* XDPTX_LANE_COUNT_SET_1. */
|
||||
#define TRAIN_USE_LANE_COUNT XDPTX_LANE_COUNT_SET_4
|
||||
/* If set to 1, TRAIN_USE_LINK_RATE and TRAIN_USE_LANE_COUNT will be ignored.
|
||||
* Instead, the maximum common link capabilities between the DisplayPort TX core
|
||||
* and the RX device will be used when establishing a link.
|
||||
* If set to 0, TRAIN_USE_LINK_RATE and TRAIN_USE_LANE_COUNT will determine the
|
||||
* link rate and lane count settings that the link training process will begin
|
||||
* with. */
|
||||
#define TRAIN_USE_MAX_LINK 1
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
extern u32 Dptx_PlatformInit(void);
|
||||
extern u32 Dptx_StreamSrcSync(XDptx *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcSetup(XDptx *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcConfigure(XDptx *InstancePtr);
|
||||
|
||||
u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
u32 Dptx_StartLink(XDptx *InstancePtr);
|
||||
u32 Dptx_Run(XDptx *InstancePtr);
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
||||
XDptx DptxInstance;
|
||||
|
||||
#endif /* XDPTX_EXAMPLE_COMMON_H_ */
|
||||
351
XilinxProcessorIPLib/drivers/dp/examples/xdptx_intr_example.c
Normal file
351
XilinxProcessorIPLib/drivers/dp/examples/xdptx_intr_example.c
Normal file
|
|
@ -0,0 +1,351 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_intr_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver with interrupts. Upon Hot-
|
||||
* Plug-Detect (HPD - DisplayPort cable is plugged/unplugged or the monitor is
|
||||
* turned on/off), the main link will be trained.
|
||||
*
|
||||
* @note This example requires an interrupt controller connected to the
|
||||
* processor and the DisplayPort TX core in the system.
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
/* For MicroBlaze systems. */
|
||||
#include "xintc.h"
|
||||
#else
|
||||
/* For ARM/Zynq SoC systems. */
|
||||
#include "xscugic.h"
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/**************************** Constant Definitions ****************************/
|
||||
|
||||
/* The following constants map to the XPAR parameters created in the
|
||||
* xparameters.h file. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
#define DP_INTERRUPT_ID XPAR_AXI_INTC_1_DISPLAYPORT_0_AXI_INT_INTR
|
||||
#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID
|
||||
#else
|
||||
#define DP_INTERRUPT_ID XPAR_FABRIC_DISPLAYPORT_0_AXI_INT_INTR
|
||||
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/****************************** Type Definitions ******************************/
|
||||
|
||||
/* Depending on whether the system is a MicroBlaze or ARM/Zynq SoC system,
|
||||
* different drivers and associated types will be used. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
#define INTC XIntc
|
||||
#define INTC_HANDLER XIntc_InterruptHandler
|
||||
#else
|
||||
#define INTC XScuGic
|
||||
#define INTC_HANDLER XScuGic_InterruptHandler
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler);
|
||||
static u32 Dptx_SetupInterruptHandler(XDptx *InstancePtr, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler);
|
||||
static void Dptx_HpdEventHandler(void *InstancePtr);
|
||||
static void Dptx_HpdPulseHandler(void *InstancePtr);
|
||||
|
||||
/**************************** Variable Definitions ****************************/
|
||||
|
||||
INTC IntcInstance; /* The interrupt controller instance. */
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx interrupt example. If the
|
||||
* DptxIntrExample function, which sets up the system succeeds, this function
|
||||
* will wait for interrupts. Once a connection event or pulse is detected, link
|
||||
* training will commence (if needed) and a video stream will start being sent
|
||||
* over the main link.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return
|
||||
* - XST_FAILURE if the interrupt example was unsuccessful - system
|
||||
* setup failed.
|
||||
*
|
||||
* @note Unless setup failed, main will never return since
|
||||
* DptxIntrExample is blocking (it is waiting on interrupts for
|
||||
* Hot-Plug-Detect (HPD) events.
|
||||
*
|
||||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* Run the XDptx interrupt example. */
|
||||
Dptx_IntrExample(&DptxInstance, DPTX_DEVICE_ID,
|
||||
&IntcInstance, INTC_DEVICE_ID, DP_INTERRUPT_ID,
|
||||
&Dptx_HpdEventHandler, &Dptx_HpdPulseHandler);
|
||||
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the interrupt example using the XDptx driver. This
|
||||
* function will set up the system with interrupts and set up the Hot-Plug-Event
|
||||
* (HPD) handlers.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
* @param IntcPtr is a pointer to the interrupt instance.
|
||||
* @param IntrId is the unique device ID of the interrupt controller.
|
||||
* @param DpIntrId is the interrupt ID of the DisplayPort TX connection to
|
||||
* the interrupt controller.
|
||||
* @param HpdEventHandler is a pointer to the handler called when an HPD
|
||||
* event occurs.
|
||||
* @param HpdPulseHandler is a pointer to the handler called when an HPD
|
||||
* pulse occurs.
|
||||
*
|
||||
* @return
|
||||
* - XST_FAILURE if the system setup failed.
|
||||
* - XST_SUCCESS should never return since this function, if setup
|
||||
* was successful, is blocking.
|
||||
*
|
||||
* @note If system setup was successful, this function is blocking in
|
||||
* order to illustrate interrupt handling taking place for HPD
|
||||
* events.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Use single-stream transport (SST) mode for this example. */
|
||||
XDptx_MstCfgModeDisable(InstancePtr);
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
Dptx_PlatformInit();
|
||||
/******************/
|
||||
|
||||
Status = Dptx_SetupExample(InstancePtr, DeviceId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* Setup interrupt handling in the system. */
|
||||
Status = Dptx_SetupInterruptHandler(InstancePtr, IntcPtr, IntrId,
|
||||
DpIntrId, HpdEventHandler, HpdPulseHandler);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/* Do not return in order to allow interrupt handling to run. HPD events
|
||||
* (connect, disconnect, and pulse) will be detected and handled. */
|
||||
while (1);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets up the interrupt system such that interrupts caused by
|
||||
* Hot-Plug-Detect (HPD) events and pulses are handled. This function is
|
||||
* application-specific for systems that have an interrupt controller connected
|
||||
* to the processor. The user should modify this function to fit the
|
||||
* application.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param IntcPtr is a pointer to the interrupt instance.
|
||||
* @param IntrId is the unique device ID of the interrupt controller.
|
||||
* @param DpIntrId is the interrupt ID of the DisplayPort TX connection to
|
||||
* the interrupt controller.
|
||||
* @param HpdEventHandler is a pointer to the handler called when an HPD
|
||||
* event occurs.
|
||||
* @param HpdPulseHandler is a pointer to the handler called when an HPD
|
||||
* pulse occurs.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the interrupt system was successfully set up.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note An interrupt controller must be present in the system, connected
|
||||
* to the processor and the DisplayPort TX core.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static u32 Dptx_SetupInterruptHandler(XDptx *InstancePtr, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Set the HPD interrupt handlers. */
|
||||
XDptx_SetHpdEventHandler(InstancePtr, HpdEventHandler, InstancePtr);
|
||||
XDptx_SetHpdPulseHandler(InstancePtr, HpdPulseHandler, InstancePtr);
|
||||
|
||||
/* Initialize interrupt controller driver. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Initialize(IntcPtr, IntrId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
#else
|
||||
XScuGic_Config *IntcConfig;
|
||||
|
||||
IntcConfig = XScuGic_LookupConfig(IntrId);
|
||||
Status = XScuGic_CfgInitialize(IntcPtr, IntcConfig,
|
||||
IntcConfig->CpuBaseAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
XScuGic_SetPriorityTriggerType(IntcPtr, DpIntrId, 0xA0, 0x1);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/* Connect the device driver handler that will be called when an
|
||||
* interrupt for the device occurs, the handler defined above performs
|
||||
* the specific interrupt processing for the device. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Connect(IntcPtr, DpIntrId,
|
||||
(XInterruptHandler)XDptx_HpdInterruptHandler, InstancePtr);
|
||||
#else
|
||||
Status = XScuGic_Connect(IntcPtr, DpIntrId,
|
||||
(Xil_InterruptHandler)XDptx_HpdInterruptHandler, InstancePtr);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/* Start the interrupt controller. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Start(IntcPtr, XIN_REAL_MODE);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
XIntc_Enable(IntcPtr, DpIntrId);
|
||||
#else
|
||||
XScuGic_Enable(IntcPtr, DpIntrId);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
|
||||
/* Initialize the exception table. */
|
||||
Xil_ExceptionInit();
|
||||
|
||||
/* Register the interrupt controller handler with the exception table. */
|
||||
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
|
||||
(Xil_ExceptionHandler)INTC_HANDLER, IntcPtr);
|
||||
|
||||
/* Enable exceptions. */
|
||||
Xil_ExceptionEnable();
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is called when a Hot-Plug-Detect (HPD) event is received by the
|
||||
* DisplayPort TX core. The XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK bit of the
|
||||
* core's XDPTX_INTERRUPT_STATUS register indicates that an HPD event has
|
||||
* occurred.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDptx_SetHpdEventHandler driver function to set this
|
||||
* function as the handler for HPD pulses.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_HpdEventHandler(void *InstancePtr)
|
||||
{
|
||||
XDptx *XDptx_InstancePtr = (XDptx *)InstancePtr;
|
||||
|
||||
if (XDptx_IsConnected(XDptx_InstancePtr)) {
|
||||
xil_printf("+===> HPD connection event detected.\n");
|
||||
|
||||
Dptx_Run(XDptx_InstancePtr);
|
||||
}
|
||||
else {
|
||||
xil_printf("+===> HPD disconnection event detected.\n\n");
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is called when a Hot-Plug-Detect (HPD) pulse is received by the
|
||||
* DisplayPort TX core. The XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit
|
||||
* of the core's XDPTX_INTERRUPT_STATUS register indicates that an HPD event has
|
||||
* occurred.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDptx_SetHpdPulseHandler driver function to set this
|
||||
* function as the handler for HPD pulses.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_HpdPulseHandler(void *InstancePtr)
|
||||
{
|
||||
XDptx *XDptx_InstancePtr = (XDptx *)InstancePtr;
|
||||
|
||||
xil_printf("===> HPD pulse detected.\n");
|
||||
|
||||
Dptx_Run(XDptx_InstancePtr);
|
||||
}
|
||||
385
XilinxProcessorIPLib/drivers/dp/examples/xdptx_mst_example.c
Normal file
385
XilinxProcessorIPLib/drivers/dp/examples/xdptx_mst_example.c
Normal file
|
|
@ -0,0 +1,385 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_mst_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver in multi-stream transport
|
||||
* (MST) mode.
|
||||
*
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input. See XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
* @note Some setups may require introduction of delays when sending
|
||||
* sideband messages.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 08/07/14 Initial creation.
|
||||
* 2.0 als 09/23/14 Improved programming sequence for payload allocation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
|
||||
/**************************** Constant Definitions ****************************/
|
||||
|
||||
/* The maximum number of streams to enable. */
|
||||
#define NUM_STREAMS 4
|
||||
|
||||
/* This enables topology discovery which will create a list of sinks in the
|
||||
* topology. If ALLOCATE_FROM_SINKLIST is defined, the streams will sent to
|
||||
* to the sinks with the corresponding index. See the function calls for
|
||||
* the XDptx_SetStreamSelectFromSinkList driver function below. */
|
||||
#define ALLOCATE_FROM_SINKLIST
|
||||
#ifdef ALLOCATE_FROM_SINKLIST
|
||||
/* Define the mapping between sinks and streams. The sink numbers are in the
|
||||
* order that they are discovered by the XDptx_FindAccessibleDpDevices driver
|
||||
* function. */
|
||||
#define STREAM0_USE_SINKNUM 0
|
||||
#define STREAM1_USE_SINKNUM 1
|
||||
#define STREAM2_USE_SINKNUM 2
|
||||
#define STREAM3_USE_SINKNUM 3
|
||||
#endif
|
||||
|
||||
/* The video resolution from the display mode timings (DMT) table to use for
|
||||
* each stream. */
|
||||
#define USE_VIDEO_MODE XDPTX_VM_1920x1080_60_P
|
||||
|
||||
/* The color depth (bits per color component) to use for each stream. */
|
||||
#define USE_BPC 8
|
||||
|
||||
/* Some MST configurations may require delays when sending sideband messages. By
|
||||
* default, disable these delays.*/
|
||||
#undef USE_DELAYS_FOR_MST
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
u32 Dptx_MstExampleRun(XDptx *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx multi-stream transport (MST)
|
||||
* example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return
|
||||
* - XST_FAILURE if the MST example was unsuccessful - system
|
||||
* setup failed.
|
||||
*
|
||||
* @note Unless setup failed, main will never return since
|
||||
* Dptx_MstExample is blocking.
|
||||
*
|
||||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* Run the XDptx MST example. */
|
||||
Dptx_MstExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the multi-stream transport (MST) example using the
|
||||
* XDptx driver. This function will either discover the topology and map streams
|
||||
* to the sinks in the sink list, or map streams to relative addresses.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_FAILURE if the system setup failed.
|
||||
* - XST_SUCCESS should never return since this function, if setup
|
||||
* was successful, is blocking.
|
||||
*
|
||||
* @note If system setup was successful, this function is blocking.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
Dptx_PlatformInit();
|
||||
/******************/
|
||||
|
||||
Status = Dptx_SetupExample(InstancePtr, DeviceId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
Status = XDptx_MstCapable(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
/* If the immediate downstream RX device is an MST monitor and
|
||||
* the DisplayPort Configuration Data (DPCD) does not indicate
|
||||
* MST capability, it is likely that the MST or DisplayPort v1.2
|
||||
* option must be selected from the monitor's option menu.
|
||||
* Likewise, the DisplayPort TX core must be configured to
|
||||
* support MST mode. */
|
||||
xil_printf("!!! Verify DisplayPort MST capabilities in the TX "
|
||||
"and/or RX device.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
do {
|
||||
Status = Dptx_MstExampleRun(InstancePtr);
|
||||
if (Status == XST_DATA_LOST) {
|
||||
xil_printf("!!! Link lost... Need to re-train.\n");
|
||||
}
|
||||
} while (Status != XST_SUCCESS);
|
||||
|
||||
/* Do not return. */
|
||||
xil_printf("MST example DONE.\n");
|
||||
while (1);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function trains the link and allocates stream payloads.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if MST allocation was successful.
|
||||
* - XST_ERROR_COUNT_MAX if the ACT trigger was lost.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
u32 MaskVal;
|
||||
u8 StreamIndex;
|
||||
XDptx_VideoMode VideoMode = USE_VIDEO_MODE;
|
||||
u8 Bpc = USE_BPC;
|
||||
u8 NumStreams = NUM_STREAMS;
|
||||
|
||||
/* Limit the number of streams to configure based on the configuration
|
||||
* of the DisplayPort core. */
|
||||
if (NumStreams > InstancePtr->Config.NumMstStreams) {
|
||||
NumStreams = InstancePtr->Config.NumMstStreams;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* A DisplayPort connection must exist at this point. See the interrupt
|
||||
* and polling examples for waiting for connection events. */
|
||||
Status = Dptx_StartLink(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("Link Training failed.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
#ifdef USE_DELAYS_FOR_MST
|
||||
InstancePtr->AuxDelayUs = 30000;
|
||||
InstancePtr->SbMsgDelayUs = 100000;
|
||||
#else
|
||||
InstancePtr->AuxDelayUs = 0;
|
||||
InstancePtr->SbMsgDelayUs = 0;
|
||||
#endif
|
||||
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID0);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID1);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID2);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID3);
|
||||
|
||||
#ifdef ALLOCATE_FROM_SINKLIST
|
||||
/* Run topology discovery to determine what devices are accessible to
|
||||
* the DisplayPort TX. */
|
||||
xil_printf("Find topology >>>\n");
|
||||
InstancePtr->Topology.NodeTotal = 0;
|
||||
InstancePtr->Topology.SinkTotal = 0;
|
||||
|
||||
Status = XDptx_DiscoverTopology(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("!!! A LINK_ADDRESS response from a branch device "
|
||||
"in the MST topology was not successfully received.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
xil_printf("<<< Find topology DONE; # of sinks found = %d.\n",
|
||||
InstancePtr->Topology.SinkTotal);
|
||||
|
||||
if (NumStreams > InstancePtr->Topology.SinkTotal) {
|
||||
NumStreams = InstancePtr->Topology.SinkTotal;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Enable multi-stream transport (MST) mode for this example. */
|
||||
XDptx_MstCfgModeEnable(InstancePtr);
|
||||
for (StreamIndex = 0; StreamIndex < NumStreams; StreamIndex++) {
|
||||
XDptx_MstCfgStreamEnable(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
StreamIndex);
|
||||
}
|
||||
for (StreamIndex = NumStreams; StreamIndex < 4; StreamIndex++) {
|
||||
XDptx_MstCfgStreamDisable(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
StreamIndex);
|
||||
}
|
||||
|
||||
/* Specify the DisplayPort sink devices that each enabled stream will be
|
||||
* directed towards. */
|
||||
#ifndef ALLOCATE_FROM_SINKLIST
|
||||
/* If topology discovery is not used, specify the relative addresses of
|
||||
* the DisplayPort sink devices. */
|
||||
u8 Lct;
|
||||
u8 Rad[15];
|
||||
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID0)) {
|
||||
Lct = 2; Rad[0] = 8;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID0, Lct, Rad);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
|
||||
Lct = 3; Rad[0] = 1; Rad[1] = 8;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID1, Lct, Rad);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
|
||||
Lct = 4; Rad[0] = 1; Rad[1] = 1; Rad[2] = 8;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID2, Lct, Rad);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
|
||||
Lct = 4; Rad[0] = 1; Rad[1] = 1; Rad[2] = 9;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID3, Lct, Rad);
|
||||
}
|
||||
#else
|
||||
/* If topology discovery is used, associate a stream number with a sink
|
||||
* number from the sink list obtained during topology discovery. The
|
||||
* sinks are numbered in the order that they were found during topology
|
||||
* discovery. */
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID0)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID0,
|
||||
STREAM0_USE_SINKNUM);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID1,
|
||||
STREAM1_USE_SINKNUM);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID2,
|
||||
STREAM2_USE_SINKNUM);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID3,
|
||||
STREAM3_USE_SINKNUM);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Reset MST mode in both the RX and TX. */
|
||||
XDptx_MstDisable(InstancePtr);
|
||||
XDptx_MstEnable(InstancePtr);
|
||||
|
||||
/* Set the main stream attributes (MSA) for each enabled stream (each
|
||||
* stream has an identical configuration). Then, set the configuration
|
||||
* for that stream in the corresponding DisplayPort TX registers. */
|
||||
for (StreamIndex = 0; StreamIndex < 4; StreamIndex++) {
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
StreamIndex)) {
|
||||
XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
StreamIndex, Bpc);
|
||||
XDptx_CfgMsaEnSynchClkMode(InstancePtr,
|
||||
XDPTX_STREAM_ID0 + StreamIndex, 1);
|
||||
|
||||
XDptx_CfgMsaUseStandardVideoMode(InstancePtr,
|
||||
XDPTX_STREAM_ID0 + StreamIndex, VideoMode);
|
||||
XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
StreamIndex);
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure video stream source or generator here. This function needs
|
||||
* to be implemented in order for video to be displayed and is hardware
|
||||
* system specific. It is up to the user to implement this function. */
|
||||
Dptx_StreamSrcSetup(InstancePtr);
|
||||
Dptx_StreamSrcConfigure(InstancePtr);
|
||||
Dptx_StreamSrcSync(InstancePtr);
|
||||
////////////////////////////////////
|
||||
|
||||
/* Mask interrupts while allocating payloads. */
|
||||
MaskVal = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK);
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
|
||||
0x3F);
|
||||
|
||||
/* Clear the payload ID table first. */
|
||||
Status = XDptx_ClearPayloadVcIdTable(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_DATA_LOST;
|
||||
}
|
||||
|
||||
/* Allocate payloads. */
|
||||
Status = XDptx_AllocatePayloadStreams(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_DATA_LOST;
|
||||
}
|
||||
|
||||
/* Enable the main link. */
|
||||
XDptx_EnableMainLink(InstancePtr);
|
||||
|
||||
/* Unmask interrupts. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
|
||||
MaskVal);
|
||||
|
||||
/* Do a final check to verify that the link wasn't lost. */
|
||||
Status = XDptx_CheckLinkStatus(InstancePtr,
|
||||
InstancePtr->LinkConfig.LaneCount);
|
||||
if (Status != XST_SUCCESS) {
|
||||
XDptx_WaitUs(InstancePtr, 10000);
|
||||
return XST_DATA_LOST;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
200
XilinxProcessorIPLib/drivers/dp/examples/xdptx_poll_example.c
Normal file
200
XilinxProcessorIPLib/drivers/dp/examples/xdptx_poll_example.c
Normal file
|
|
@ -0,0 +1,200 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_poll_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver with polling. Once the
|
||||
* polling detects a Hot-Plug-Detect event (HPD - DisplayPort cable is plugged/
|
||||
* unplugged or the monitor is turned on/off), the main link will be trained.
|
||||
*
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_PollExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
static void Dptx_HpdPoll(XDptx *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx polling example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return
|
||||
* - XST_FAILURE if the polling example was unsuccessful - system
|
||||
* setup failed.
|
||||
*
|
||||
* @note Unless setup failed, main will never return since
|
||||
* Dptx_PollExample is blocking (it is continuously polling for
|
||||
* Hot-Plug-Detect (HPD) events.
|
||||
*
|
||||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* Run the XDptx polling example. */
|
||||
Dptx_PollExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the polling example using the XDptx driver. This
|
||||
* function will set up the system. If this is successful, this example will
|
||||
* begin polling the Hot-Plug-Detect (HPD) status registers for HPD events. Once
|
||||
* a connection event or a pulse is detected, link training will commence (if
|
||||
* needed) and a video stream will start being sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_FAILURE if the system setup failed.
|
||||
* - XST_SUCCESS should never return since this function, if setup
|
||||
* was successful, is blocking.
|
||||
*
|
||||
* @note If system setup was successful, this function is blocking in
|
||||
* order to illustrate polling taking place for HPD events.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_PollExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
Dptx_PlatformInit();
|
||||
/******************/
|
||||
|
||||
Status = Dptx_SetupExample(InstancePtr, DeviceId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* Continuously poll for HPD events. */
|
||||
while (1) {
|
||||
Dptx_HpdPoll(InstancePtr);
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function polls the XDPTX_INTERRUPT_SIG_STATE and XDPTX_INTERRUPT_STATUS
|
||||
* registers for Hot-Plug-Detect (HPD) events and handles them accordingly. If a
|
||||
* connection or pulse event is detected, link training will begin (if required)
|
||||
* and a video stream will be initiated.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_HpdPoll(XDptx *InstancePtr)
|
||||
{
|
||||
u32 InterruptSignalState;
|
||||
u32 InterruptStatus;
|
||||
u32 HpdState;
|
||||
u32 HpdEvent;
|
||||
u32 HpdPulseDetected;
|
||||
u32 HpdDuration;
|
||||
|
||||
/* Read interrupt registers. */
|
||||
InterruptSignalState = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_SIG_STATE);
|
||||
InterruptStatus = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_STATUS);
|
||||
|
||||
/* Check for HPD events. */
|
||||
HpdState = InterruptSignalState &
|
||||
XDPTX_INTERRUPT_SIG_STATE_HPD_STATE_MASK;
|
||||
HpdEvent = InterruptStatus & XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK;
|
||||
HpdPulseDetected = InterruptStatus &
|
||||
XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
|
||||
if (HpdPulseDetected) {
|
||||
HpdDuration = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_HPD_DURATION);
|
||||
}
|
||||
|
||||
/* HPD event handling. */
|
||||
if (HpdState && HpdEvent) {
|
||||
xil_printf("+===> HPD connection event detected.\n");
|
||||
|
||||
/* Initiate link training. */
|
||||
Dptx_Run(InstancePtr);
|
||||
}
|
||||
else if (HpdState && HpdPulseDetected && (HpdDuration >= 250)) {
|
||||
xil_printf("===> HPD pulse detected.\n");
|
||||
|
||||
/* Re-train if needed. */
|
||||
Dptx_Run(InstancePtr);
|
||||
}
|
||||
else if (!HpdState && HpdEvent) {
|
||||
xil_printf("+===> HPD disconnection event detected.\n\n");
|
||||
|
||||
/* Disable main link. */
|
||||
XDptx_DisableMainLink(InstancePtr);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_selftest_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver. It performs a self test on
|
||||
* the DisplayPort TX core that will compare many of the DisplayPort TX core's
|
||||
* registers against their default reset values.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_SelfTestExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx selftest example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self test example passed.
|
||||
* - XST_FAILURE if the self test example was unsuccessful - the
|
||||
* DisplayPort TX's registers do not match their default values
|
||||
* or no DisplayPort TX instance was found.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
Status = Dptx_SelfTestExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("XDptx_SelfTest failed, check register values.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
xil_printf("XDptx_SelfTest passed.\n");
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the selftest example using the XDptx driver. This
|
||||
* function will check whether or not the DisplayPort TX's registers are at
|
||||
* their default reset values to ensure that the core is in a known and working
|
||||
* state.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the DisplayPort TX's registers are at their
|
||||
* default reset values.
|
||||
* - XST_FAILURE if the DisplayPort TX's registers do not match
|
||||
* their default values or no DisplayPort TX instance was found.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_SelfTestExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
XDptx_Config *ConfigPtr;
|
||||
|
||||
/* Obtain the device configuration for the DisplayPort TX core. */
|
||||
ConfigPtr = XDptx_LookupConfig(DeviceId);
|
||||
if (!ConfigPtr) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
/* Copy the device configuration into the InstancePtr's Config
|
||||
* structure. */
|
||||
XDptx_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
|
||||
/* Run the self test. */
|
||||
Status = XDptx_SelfTest(InstancePtr);
|
||||
return Status;
|
||||
}
|
||||
201
XilinxProcessorIPLib/drivers/dp/examples/xdptx_timer_example.c
Normal file
201
XilinxProcessorIPLib/drivers/dp/examples/xdptx_timer_example.c
Normal file
|
|
@ -0,0 +1,201 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_timer_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver with a user-defined hook
|
||||
* for delay. The reasoning behind this is that MicroBlaze sleep is not very
|
||||
* accurate without a hardware timer. For systems that have a hardware timer,
|
||||
* the user may override the default MicroBlaze sleep with a function that will
|
||||
* use the hardware timer.
|
||||
*
|
||||
* @note This example requires an AXI timer in the system.
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xtmrctr.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_TimerExample(XDptx *InstancePtr, u16 DeviceId,
|
||||
XTmrCtr *TimerCounterPtr, XDptx_TimerHandler UserSleepFunc);
|
||||
static void Dptx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds);
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
||||
XTmrCtr TimerCounterInst; /* The timer counter instance. */
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx timer example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the timer example finished successfully.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Run the XDptx timer example. */
|
||||
Status = Dptx_TimerExample(&DptxInstance, DPTX_DEVICE_ID,
|
||||
&TimerCounterInst, &Dptx_CustomWaitUs);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the timer example using the XDptx driver. This
|
||||
* function will set up the system and the custom sleep handler. If this is
|
||||
* successful, link training will commence and a video stream will start being
|
||||
* sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
* @param TimerCounterPtr is a pointer to the timer instance.
|
||||
* @param UserSleepFunc is a pointer to the custom handler for sleep.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the system was set up correctly and link
|
||||
* training was successful.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_TimerExample(XDptx *InstancePtr, u16 DeviceId,
|
||||
XTmrCtr *TimerCounterPtr, XDptx_TimerHandler UserSleepFunc)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Use single-stream transport (SST) mode for this example. */
|
||||
XDptx_MstCfgModeDisable(InstancePtr);
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
Dptx_PlatformInit();
|
||||
/*******************/
|
||||
|
||||
/* Set a custom timer handler for improved delay accuracy on MicroBlaze
|
||||
* systems since the driver does not assume/have a dependency on the
|
||||
* system having a timer in the FPGA.
|
||||
* Note: This only has an affect for MicroBlaze systems since the Zynq
|
||||
* ARM SoC contains a timer, which is used when the driver calls the
|
||||
* delay function. */
|
||||
XDptx_SetUserTimerHandler(InstancePtr, UserSleepFunc, TimerCounterPtr);
|
||||
|
||||
Status = Dptx_SetupExample(InstancePtr, DeviceId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* A sink monitor must be connected at this point. See the polling or
|
||||
* interrupt examples for how to wait for a connection event. */
|
||||
Status = Dptx_Run(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is used to override the driver's default sleep functionality.
|
||||
* For MicroBlaze systems, the XDptx_WaitUs driver function's default behavior
|
||||
* is to use the MB_Sleep function from microblaze_sleep.h, which is implemented
|
||||
* in software and only has millisecond accuracy. For this reason, using a
|
||||
* hardware timer is preferrable. For ARM/Zynq SoC systems, the SoC's timer is
|
||||
* used - XDptx_WaitUs will ignore this custom timer handler.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDptx_SetUserTimerHandler driver function to set this
|
||||
* function as the handler for when the XDptx_WaitUs driver
|
||||
* function is called.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds)
|
||||
{
|
||||
XDptx *XDptx_InstancePtr = (XDptx *)InstancePtr;
|
||||
u32 TimerVal;
|
||||
|
||||
XTmrCtr_Start(XDptx_InstancePtr->UserTimerPtr, 0);
|
||||
|
||||
/* Wait specified number of useconds. */
|
||||
do {
|
||||
TimerVal = XTmrCtr_GetValue(XDptx_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
while (TimerVal < (MicroSeconds *
|
||||
(XDptx_InstancePtr->Config.SAxiClkHz / 1000000)));
|
||||
|
||||
XTmrCtr_Stop(XDptx_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
40
XilinxProcessorIPLib/drivers/dp/src/Makefile
Normal file
40
XilinxProcessorIPLib/drivers/dp/src/Makefile
Normal file
|
|
@ -0,0 +1,40 @@
|
|||
COMPILER=
|
||||
ARCHIVER=
|
||||
CP=cp
|
||||
COMPILER_FLAGS=
|
||||
EXTRA_COMPILER_FLAGS=
|
||||
LIB=libxil.a
|
||||
|
||||
CC_FLAGS = $(COMPILER_FLAGS)
|
||||
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
|
||||
|
||||
RELEASEDIR=../../../lib
|
||||
INCLUDEDIR=../../../include
|
||||
INCLUDES=-I./. -I${INCLUDEDIR}
|
||||
|
||||
OUTS = *.o
|
||||
|
||||
LIBSOURCES:=*.c
|
||||
INCLUDEFILES:=*.h
|
||||
|
||||
OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
|
||||
|
||||
libs: banner xdp_libs clean
|
||||
|
||||
%.o: %.c
|
||||
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
|
||||
|
||||
banner:
|
||||
echo "Compiling dp"
|
||||
|
||||
xdp_libs: ${OBJECTS}
|
||||
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
|
||||
|
||||
.PHONY: include
|
||||
include: xdp_includes
|
||||
|
||||
xdp_includes:
|
||||
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
|
||||
|
||||
clean:
|
||||
rm -rf ${OBJECTS}
|
||||
2666
XilinxProcessorIPLib/drivers/dp/src/xdptx.c
Normal file
2666
XilinxProcessorIPLib/drivers/dp/src/xdptx.c
Normal file
File diff suppressed because it is too large
Load diff
774
XilinxProcessorIPLib/drivers/dp/src/xdptx.h
Normal file
774
XilinxProcessorIPLib/drivers/dp/src/xdptx.h
Normal file
|
|
@ -0,0 +1,774 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx.h
|
||||
*
|
||||
* The Xilinx DisplayPort transmitter (DPTX) driver. This driver supports the
|
||||
* Xilinx DisplayPort soft IP core in source (TX) mode. This driver follows the
|
||||
* DisplayPort 1.2a specification.
|
||||
*
|
||||
* The Xilinx DisplayPort soft IP supports the following features:
|
||||
* - 1, 2, or 4 lanes.
|
||||
* - A link rate of 1.62, 2.70, or 5.40Gbps per lane.
|
||||
* - 1, 2, or 4 pixel-wide video interfaces.
|
||||
* - RGB and YCbCr color space.
|
||||
* - Up to 16 bits per component.
|
||||
* - Up to 4Kx2K monitor resolution.
|
||||
* - Auto lane rate and width negotiation.
|
||||
* - I2C over a 1Mb/s AUX channel.
|
||||
* - Secondary channel audio support (2 channels).
|
||||
* - 4 independent video multi-streams.
|
||||
*
|
||||
* The Xilinx DisplayPort soft IP does not support the following features:
|
||||
* - The automated test feature.
|
||||
* - Audio (3-8 channel).
|
||||
* - FAUX.
|
||||
* - Bridging function.
|
||||
* - MST audio.
|
||||
* - eDP optional features.
|
||||
* - iDP.
|
||||
* - GTC.
|
||||
*
|
||||
* <b>DisplayPort overview</b>
|
||||
*
|
||||
* A DisplayPort link consists of:
|
||||
* - A unidirectional main link which is used to transport isochronous data
|
||||
* streams such as video and audio. The main link may use 1, 2, or 4
|
||||
* lanes at a link rate of 1.62, 2.70, or 5.40Gbps per lane. The link
|
||||
* needs to be trained prior to sending streams.
|
||||
* - An auxiliary (AUX) channel is a 1MBps bidirectional channel used for
|
||||
* link training, link management, and device control.
|
||||
* - A hot-plug-detect (HPD) signal line is used to determine whether a
|
||||
* DisplayPort connection exists between the DisplayPort TX connector and
|
||||
* an RX device. It is serves as an interrupt request by the RX device.
|
||||
*
|
||||
* <b>Driver description</b>
|
||||
*
|
||||
* The device driver enables higher-level software (e.g., an application) to
|
||||
* configure and control a DisplayPort TX soft IP, communicate and control an
|
||||
* RX device/sink monitor over the AUX channel, and to initialize and transmit
|
||||
* data streams over the main link.
|
||||
*
|
||||
* This driver implements link layer functionality: a Link Policy Maker (LPM)
|
||||
* and a Stream Policy Maker (SPM) as per the DisplayPort 1.2a specification.
|
||||
* - The LPM manages the main link and is responsible for keeping the link
|
||||
* synchronized. It will establish a link with a downstream RX device by
|
||||
* undergoing a link training sequence which consists of:
|
||||
* - Clock recovery: The clock needs to be recovered and PLLs need to be
|
||||
* locked for all lanes.
|
||||
* - Channel equalization: All lanes need to achieve channel equalization
|
||||
* and and symbol lock, as well as for interlane alignment to take place.
|
||||
* - The SPM manages transportation of an isochronous stream. That is, it will
|
||||
* initialize and maintain a video stream, establish a virtual channel to a
|
||||
* sink monitor, and transmit the stream.
|
||||
*
|
||||
* Using AUX transactions to read/write from/to the sink's DisplayPort
|
||||
* Configuration Data (DPCD) address space, the LPM obtains the link
|
||||
* capabilities, obtains link configuration and link and sink status, and
|
||||
* configures and controls the link and sink. The main link is trained this way.
|
||||
*
|
||||
* I2C-over-AUX transactions are used to obtain the sink's Extended Display
|
||||
* Identification Data (EDID) which give information on the display capabilities
|
||||
* of the monitor. The SPM may use this information to determine what available
|
||||
* screen resolutions and video timing are possible.
|
||||
*
|
||||
* <b>Device configuration</b>
|
||||
*
|
||||
* The device can be configured in various ways during the FPGA implementation
|
||||
* process. Configuration parameters are stored in the xdptx_g.c file which is
|
||||
* generated when compiling the board support package (BSP). A table is defined
|
||||
* where each entry contains configuration information for the DisplayPort
|
||||
* instances present in the system. This information includes parameters that
|
||||
* are defined in the driver's data/dptx.tcl file such as the base address of
|
||||
* the memory-mapped device and the maximum number of lanes, maximum link rate,
|
||||
* and video interface that the DisplayPort instance supports, among others.
|
||||
*
|
||||
* <b>Interrupt processing</b>
|
||||
*
|
||||
* DisplayPort interrupts occur on the HPD signal line when the DisplayPort
|
||||
* cable is connected/disconnected or when the RX device sends a pulse. The user
|
||||
* hardware design must contain an interrupt controller which the DisplayPort
|
||||
* TX instance's interrupt signal is connected to. The user application must
|
||||
* enable interrupts in the system and set up the interrupt controller such that
|
||||
* the XDptx_HpdInterruptHandler handler will service DisplayPort interrupts.
|
||||
* When the XDptx_HpdInterruptHandler function is invoked, the handler will
|
||||
* identify what type of DisplayPort interrupt has occurred, and will call
|
||||
* either the HPD event handler function or the HPD pulse handler function,
|
||||
* depending on whether a an HPD event on an HPD pulse event occurred.
|
||||
*
|
||||
* The DisplayPort TX's XDPTX_INTERRUPT_STATUS register indicates the type of
|
||||
* interrupt that has occured, and the XDptx_HpdInterruptHandler will use this
|
||||
* information to decide which handler to call. An HPD event is identified if
|
||||
* bit XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK is set, and an HPD pulse is
|
||||
* identified from the XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit.
|
||||
*
|
||||
* The HPD event handler may be set up by using the XDptx_SetHpdEventHandler
|
||||
* function and, for the HPD pulse handler, the XDptx_SetHpdPulseHandler
|
||||
* function.
|
||||
*
|
||||
* <b>Multi-stream transport (MST) mode</b>
|
||||
*
|
||||
* The driver handles MST mode functionality, including sideband messaging,
|
||||
* topology discovery, virtual channel payload ID table management, and
|
||||
* directing streams to different sinks.
|
||||
*
|
||||
* MST testing has been done at all possible link rate/lane count/topology/
|
||||
* resolution/color depth combinations with each setting using following values:
|
||||
* - Link rate: 1.62, 2.70, and 5.40Gbps per lane.
|
||||
* - Lane count: 1, 2, and 4 lanes.
|
||||
* - Number of sink displays: 1, 2, 3, and 4 sink displays in both a daisy-chain
|
||||
* configuration and in a configuration using a combination of a 1-to-3 hub
|
||||
* and daisy-chain. Each stream was using the same resolution.
|
||||
* - Resolutions (60Hz): 640x480, 800x600, 1024x768, 1280x800, 1280x1024,
|
||||
* 1360x768, 1400x1050, 1680x1050, 1920x1080, 1920x2160, and 3840x2160.
|
||||
* - Color depths: 18, 24, 30, 36, and 48 bits per pixel.
|
||||
*
|
||||
* <b>Audio</b>
|
||||
*
|
||||
* The driver does not handle audio. For an example as to how to configure and
|
||||
* transmit audio, examples/xdptx_audio_example.c illustrates the required
|
||||
* sequence. The user will need to configure the audio source connected to the
|
||||
* Displayport TX instance and set up the audio info frame as per user
|
||||
* requirements.
|
||||
*
|
||||
* <b>Asserts</b>
|
||||
*
|
||||
* Asserts are used within all Xilinx drivers to enforce constraints on argument
|
||||
* values. Asserts can be turned off on a system-wide basis by defining, at
|
||||
* compile time, the NDEBUG identifier. By default, asserts are turned on and
|
||||
* it is recommended that application developers leave asserts on during
|
||||
* development.
|
||||
*
|
||||
* <b>Limitations</b>
|
||||
*
|
||||
* - For MST mode to correctly display, the current version of the driver
|
||||
* requires that each of the DisplayPort TX streams be allocated without
|
||||
* skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems
|
||||
* were experienced if skipping stream 2 and assigning stream 4 instead).
|
||||
* skipping monitors in a daisy chain is OK as long as they are assigned to
|
||||
* streams in order.
|
||||
* - In MST mode, the current version of the driver does not support removal of
|
||||
* an allocated stream from the virtual channel payload ID table without
|
||||
* clearing the entire table.
|
||||
* - Some sideband messages have not been implemented in the current version of
|
||||
* the driver for MST mode. Notably, reception of a CONNECTION_STATUS_NOTIFY
|
||||
* sideband message.
|
||||
* - The driver does not handle audio. See the audio example in the driver
|
||||
* examples directory for the required sequence for enabling audio.
|
||||
*
|
||||
* @note For a 5.4Gbps link rate, a high performance 7 series FPGA is
|
||||
* required with a speed grade of -2 or -3.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* als 08/03/14 Initial MST addition.
|
||||
* 2.0 als 09/21/14 Added XDptx_DiscoverTopology function and changed
|
||||
* XDptx_IsConnected from macro to function.
|
||||
* 3.0 als 12/16/14 Updated to use common video library.
|
||||
* Added topology reordering functions:
|
||||
* XDptx_TopologySwapSinks,
|
||||
* XDptx_TopologySortSinksByTiling
|
||||
* Added wrapper functions for remote DPCD/I2C read/writes:
|
||||
* XDptx_RemoteDpcdRead, XDptx_RemoteDpcdWrite,
|
||||
* XDptx_RemoteIicRead, XDptx_RemoteIicWrite
|
||||
* Added EDID utility functions:
|
||||
* XDptx_GetRemoteEdid, XDptx_GetEdidBlock,
|
||||
* XDptx_GetRemoteEdidBlock,
|
||||
* XDptx_GetRemoteEdidDispIdExt,
|
||||
* XDptx_GetDispIdDataBlock,
|
||||
* XDptx_GetRemoteTiledDisplayDb
|
||||
* Remove unused arguments from functions:
|
||||
* LinkCountTotal, RelativeAddress from
|
||||
* XDptx_AllocatePayloadVcIdTable
|
||||
* RegStartAddress from XDptx_IicWrite
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XDPTX_H_
|
||||
/* Prevent circular inclusions by using protection macros. */
|
||||
#define XDPTX_H_
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_hw.h"
|
||||
#include "xil_assert.h"
|
||||
#include "xil_types.h"
|
||||
#include "xvid.h"
|
||||
|
||||
/****************************** Type Definitions ******************************/
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information for the DisplayPort TX core.
|
||||
*/
|
||||
typedef struct {
|
||||
u16 DeviceId; /**< Device instance ID. */
|
||||
u32 BaseAddr; /**< The base address of the core instance. */
|
||||
u32 SAxiClkHz; /**< The clock frequency of the core instance's
|
||||
S_AXI_ACLK port. */
|
||||
u8 MaxLaneCount; /**< The maximum lane count supported by this
|
||||
core instance. */
|
||||
u8 MaxLinkRate; /**< The maximum link rate supported by this
|
||||
core instance. */
|
||||
u8 MaxBitsPerColor; /**< The maximum bits/color supported by this
|
||||
core instance*/
|
||||
u8 QuadPixelEn; /**< Quad pixel support by this core
|
||||
instance. */
|
||||
u8 DualPixelEn; /**< Dual pixel support by this core
|
||||
instance. */
|
||||
u8 YCrCbEn; /**< YCrCb format support by this core
|
||||
instance. */
|
||||
u8 YOnlyEn; /**< YOnly format support by this core
|
||||
instance. */
|
||||
u8 PayloadDataWidth; /**< The payload data width used by this core
|
||||
instance. */
|
||||
u8 SecondaryChEn; /**< This core instance supports audio packets
|
||||
being sent by the secondary channel. */
|
||||
u8 NumAudioChs; /**< The number of audio channels supported by
|
||||
this core instance. */
|
||||
u8 MstSupport; /**< Multi-stream transport (MST) mode is
|
||||
enabled by this core instance. */
|
||||
u8 NumMstStreams; /**< The total number of MST streams supported
|
||||
by this core instance. */
|
||||
u8 DpProtocol; /**< The DisplayPort protocol version that this
|
||||
core instance is configured for.
|
||||
0 = v1.1a, 1 = v1.2. */
|
||||
} XDptx_Config;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the RX device.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 DpcdRxCapsField[16]; /**< The first 16 bytes of the raw capabilities
|
||||
field of the RX device's DisplayPort
|
||||
Configuration Data (DPCD). */
|
||||
u8 LaneStatusAdjReqs[6];/**< This is a raw read of the RX device's
|
||||
status registers. The first 4 bytes
|
||||
correspond to the lane status associated
|
||||
with clock recovery, channel
|
||||
equalization, symbol lock, and interlane
|
||||
alignment. The remaining 2 bytes
|
||||
represent the pre-emphasis and voltage
|
||||
swing level adjustments requested by the
|
||||
RX device. */
|
||||
} XDptx_SinkConfig;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the main link settings.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LaneCount; /**< The current lane count of the main
|
||||
link. */
|
||||
u8 LinkRate; /**< The current link rate of the main
|
||||
link. */
|
||||
u8 ScramblerEn; /**< Symbol scrambling is currently in
|
||||
use over the main link. */
|
||||
u8 EnhancedFramingMode; /**< Enhanced frame mode is currently in
|
||||
use over the main link. */
|
||||
u8 DownspreadControl; /**< Downspread control is currently in
|
||||
use over the main link. */
|
||||
u8 MaxLaneCount; /**< The maximum lane count of the main
|
||||
link. */
|
||||
u8 MaxLinkRate; /**< The maximum link rate of the main
|
||||
link. */
|
||||
u8 SupportEnhancedFramingMode; /**< Enhanced frame mode is supported by
|
||||
the RX device. */
|
||||
u8 SupportDownspreadControl; /**< Downspread control is supported by
|
||||
the RX device. */
|
||||
u8 VsLevel; /**< The current voltage swing level for
|
||||
each lane. */
|
||||
u8 PeLevel; /**< The current pre-emphasis/cursor
|
||||
level for each lane. */
|
||||
u8 Pattern; /**< The current pattern currently in
|
||||
use over the main link. */
|
||||
} XDptx_LinkConfig;
|
||||
|
||||
/**
|
||||
* This typedef contains the main stream attributes which determine how the
|
||||
* video will be displayed.
|
||||
*/
|
||||
typedef struct {
|
||||
XVid_VideoTimingMode Vtm; /**< The video timing. */
|
||||
u32 HClkTotal; /**< Horizontal total time (in
|
||||
pixels). */
|
||||
u32 VClkTotal; /**< Vertical total time (in pixels). */
|
||||
u32 HStart; /**< Horizontal blank start (in
|
||||
pixels). */
|
||||
u32 VStart; /**< Vertical blank start (in lines). */
|
||||
u32 Misc0; /**< Miscellaneous stream attributes 0
|
||||
as specified by the DisplayPort
|
||||
1.2 specification. */
|
||||
u32 Misc1; /**< Miscellaneous stream attributes 1
|
||||
as specified by the DisplayPort
|
||||
1.2 specification. */
|
||||
u32 NVid; /**< N value for the video stream. */
|
||||
u32 UserPixelWidth; /**< The width of the user data input
|
||||
port. */
|
||||
u32 DataPerLane; /**< Used to translate the number of
|
||||
pixels per line to the native
|
||||
internal 16-bit datapath. */
|
||||
u32 AvgBytesPerTU; /**< Average number of bytes per
|
||||
transfer unit, scaled up by a
|
||||
factor of 1000. */
|
||||
u32 TransferUnitSize; /**< Size of the transfer unit in the
|
||||
framing logic. In MST mode, this
|
||||
is also the number of time slots
|
||||
that are alloted in the payload
|
||||
ID table. */
|
||||
u32 InitWait; /**< Number of initial wait cycles at
|
||||
the start of a new line by
|
||||
the framing logic. */
|
||||
u32 BitsPerColor; /**< Number of bits per color
|
||||
component. */
|
||||
u8 ComponentFormat; /**< The component format currently in
|
||||
use by the video stream. */
|
||||
u8 DynamicRange; /**< The dynamic range currently in use
|
||||
by the video stream. */
|
||||
u8 YCbCrColorimetry; /**< The YCbCr colorimetry currently in
|
||||
use by the video stream. */
|
||||
u8 SynchronousClockMode; /**< Synchronous clock mode is currently
|
||||
in use by the video stream. */
|
||||
u8 OverrideUserPixelWidth; /**< If set to 1, the value stored for
|
||||
UserPixelWidth will be used as
|
||||
the pixel width. */
|
||||
} XDptx_MainStreamAttributes;
|
||||
|
||||
/**
|
||||
* This typedef describes a stream when the driver is running in multi-stream
|
||||
* transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LinkCountTotal; /** The total number of DisplayPort
|
||||
links from the DisplayPort TX to
|
||||
the sink device that this MST
|
||||
stream is targeting.*/
|
||||
u8 RelativeAddress[15]; /** The relative address from the
|
||||
DisplayPort TX to the sink
|
||||
device that this MST stream is
|
||||
targeting.*/
|
||||
u16 MstPbn; /**< Payload bandwidth number used to
|
||||
allocate bandwidth for the MST
|
||||
stream. */
|
||||
u8 MstStreamEnable; /**< In MST mode, enables the
|
||||
corresponding stream for this
|
||||
MSA configuration. */
|
||||
} XDptx_MstStream;
|
||||
|
||||
/**
|
||||
* This typedef describes some board characteristics information that affects
|
||||
* link training.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 HasRedriverInPath; /**< Redriver in path requires different voltage
|
||||
swing and pre-emphasis. */
|
||||
u8 TxVsLevels[4]; /**< The voltage swing levels to be used by the
|
||||
DisplayPort TX. */
|
||||
u8 TxPeLevels[4]; /**< The pre-emphasis/cursor level to be used by
|
||||
the DisplayPort TX. */
|
||||
u8 TxVsOffset; /**< Voltage swing compensation offset used when
|
||||
pre-emphasis is used. */
|
||||
} XDptx_BoardChar;
|
||||
|
||||
/**
|
||||
* This typedef describes a downstream DisplayPort device when the driver is
|
||||
* running in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the device. */
|
||||
u8 RelativeAddress[15]; /**< The relative address from the
|
||||
DisplayPort TX to this
|
||||
device. */
|
||||
u8 DeviceType; /**< The type of DisplayPort device.
|
||||
Either a branch or sink. */
|
||||
u8 LinkCountTotal; /**< The total number of DisplayPort
|
||||
links connecting this device to
|
||||
the DisplayPort TX. */
|
||||
u8 DpcdRev; /**< The revision of the device's
|
||||
DisplayPort Configuration Data
|
||||
(DPCD). For this device to
|
||||
support MST features, this value
|
||||
must represent a protocl version
|
||||
greater or equal to 1.2. */
|
||||
u8 MsgCapStatus; /**< This device is capable of sending
|
||||
and receiving sideband
|
||||
messages. */
|
||||
} XDptx_TopologyNode;
|
||||
|
||||
/**
|
||||
* This typedef describes a the entire topology of connected downstream
|
||||
* DisplayPort devices (from the DisplayPort TX) when the driver is operating
|
||||
* in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 NodeTotal; /**< The total number of nodes that were
|
||||
found in the MST topology. */
|
||||
XDptx_TopologyNode NodeTable[63]; /**< A table listing all the nodes in
|
||||
the MST topology. */
|
||||
u8 SinkTotal; /**< The total number of sinks in the
|
||||
MST topology. */
|
||||
XDptx_TopologyNode *SinkList[63]; /**< A pointer list of sinks in the
|
||||
MST topology. The entries will
|
||||
point to the sinks in the
|
||||
NodeTable. */
|
||||
} XDptx_Topology;
|
||||
|
||||
/**
|
||||
* This typedef describes a port that is connected to a DisplayPort branch
|
||||
* device. This structure is used when the driver is operating in multi-stream
|
||||
* transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 InputPort; /**< Specifies that this port is an
|
||||
input port. */
|
||||
u8 PeerDeviceType; /**< Specifies the device type connected
|
||||
to this port. */
|
||||
u8 PortNum; /**< The port number of this port. */
|
||||
u8 MsgCapStatus; /**< This port or the device at this
|
||||
port can send and receive MST
|
||||
messages. */
|
||||
u8 DpDevPlugStatus; /**< There is a device connected to this
|
||||
port. */
|
||||
|
||||
u8 LegacyDevPlugStatus; /**< This port is connected to a legacy
|
||||
device. */
|
||||
u8 DpcdRev; /**< The DisplayPort Configuration Data
|
||||
(DPCD) revision of the device
|
||||
connected to this port. */
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the device connected to this
|
||||
port. */
|
||||
u8 NumSdpStreams; /**< The total number of Secondary-Data
|
||||
Packet (SDP) streams that this
|
||||
port can handle. */
|
||||
u8 NumSdpStreamSinks; /**< The number of SDP streams
|
||||
associated with this port. */
|
||||
} XDptx_SbMsgLinkAddressReplyPortDetail;
|
||||
|
||||
/**
|
||||
* This typedef describes a DisplayPort branch device. This structure is used
|
||||
* when the driver is operating in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 ReplyType; /**< The reply type of the sideband
|
||||
message. A value of 1 indicates
|
||||
that the request wasn't
|
||||
successful and the return data
|
||||
will give the reason for a
|
||||
negative-acknowledge (NACK). */
|
||||
u8 RequestId; /**< The request identifier of the
|
||||
reply. This should correspond to
|
||||
the request identifier for the
|
||||
LINK_ADDRESS sideband message
|
||||
request. */
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the branch device. */
|
||||
u8 NumPorts; /**< The number of ports associated with
|
||||
this branch device. */
|
||||
XDptx_SbMsgLinkAddressReplyPortDetail PortDetails[16]; /**< An array
|
||||
describing all ports attached to
|
||||
this branch device. */
|
||||
} XDptx_SbMsgLinkAddressReplyDeviceInfo;
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents a custom timer wait handler. This is only
|
||||
* used for Microblaze since it doesn't have a native sleep function. To avoid
|
||||
* dependency on a hardware timer, the default wait functionality is implemented
|
||||
* using loop iterations; this isn't too accurate. If a custom timer handler is
|
||||
* used, the user may implement their own wait implementation using a hardware
|
||||
* timer (see example/) for better accuracy.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param MicroSeconds is the number of microseconds to be passed to the
|
||||
* timer function.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDptx_TimerHandler)(void *InstancePtr, u32 MicroSeconds);
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents the handler for a Hot-Plug-Detect (HPD) event
|
||||
* interrupt.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDptx_HpdEventHandler)(void *InstancePtr);
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents the handler for a Hot-Plug-Detect (HPD) pulse
|
||||
* interrupt.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDptx_HpdPulseHandler)(void *InstancePtr);
|
||||
|
||||
/**
|
||||
* The XDptx driver instance data. The user is required to allocate a variable
|
||||
* of this type for every XDptx device in the system. A pointer to a variable of
|
||||
* this type is then passed to the driver API functions.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 MstEnable; /**< Multi-stream transport
|
||||
(MST) mode. Enables
|
||||
functionality, allowing
|
||||
multiple streams to be
|
||||
sent over the main
|
||||
link. */
|
||||
u32 IsReady; /**< Device is initialized and
|
||||
ready. */
|
||||
u8 TrainAdaptive; /**< Downshift lane count and
|
||||
link rate if necessary
|
||||
during training. */
|
||||
XDptx_Config Config; /**< Configuration structure for
|
||||
the DisplayPort TX
|
||||
core. */
|
||||
XDptx_SinkConfig RxConfig; /**< Configuration structure for
|
||||
the RX device. */
|
||||
XDptx_LinkConfig LinkConfig; /**< Configuration structure for
|
||||
the main link. */
|
||||
XDptx_BoardChar BoardChar; /**< Some board characteristics
|
||||
information that affects
|
||||
link training. */
|
||||
XDptx_MainStreamAttributes MsaConfig[4]; /**< Configuration structure
|
||||
for the main stream
|
||||
attributes (MSA). Each
|
||||
stream has its own set
|
||||
of attributes. When MST
|
||||
mode is disabled, only
|
||||
MsaConfig[0] is used. */
|
||||
XDptx_MstStream MstStreamConfig[4]; /**< Configuration structure
|
||||
for a multi-stream
|
||||
transport (MST)
|
||||
stream. */
|
||||
XDptx_Topology Topology; /**< The topology of connected
|
||||
downstream DisplayPort
|
||||
devices when the driver
|
||||
is running in MST
|
||||
mode. */
|
||||
u32 AuxDelayUs; /**< Amount of latency in micro-
|
||||
seconds to use between
|
||||
AUX transactions. */
|
||||
u32 SbMsgDelayUs; /**< Amount of latency in micro-
|
||||
seconds to use between
|
||||
sideband messages for
|
||||
multi-stream transport
|
||||
(MST) mode. */
|
||||
XDptx_TimerHandler UserTimerWaitUs; /**< Custom user function for
|
||||
delay/sleep. */
|
||||
void *UserTimerPtr; /**< Pointer to a timer instance
|
||||
used by the custom user
|
||||
delay/sleep function. */
|
||||
XDptx_HpdEventHandler HpdEventHandler; /**< Callback function for Hot-
|
||||
Plug-Detect (HPD) event
|
||||
interrupts. */
|
||||
void *HpdEventCallbackRef; /**< A pointer to the user data
|
||||
passed to the HPD event
|
||||
callback function. */
|
||||
XDptx_HpdPulseHandler HpdPulseHandler; /**< Callback function for Hot-
|
||||
Plug-Detect (HPD) pulse
|
||||
interrupts. */
|
||||
void *HpdPulseCallbackRef; /**< A pointer to the user data
|
||||
passed to the HPD pulse
|
||||
callback function. */
|
||||
} XDptx;
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
/* xdptx.c: Setup and initialization functions. */
|
||||
u32 XDptx_InitializeTx(XDptx *InstancePtr);
|
||||
void XDptx_CfgInitialize(XDptx *InstancePtr, XDptx_Config *ConfigPtr,
|
||||
u32 EffectiveAddr);
|
||||
u32 XDptx_GetRxCapabilities(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx.c: Link policy maker functions. */
|
||||
u32 XDptx_CfgMainLinkMax(XDptx *InstancePtr);
|
||||
u32 XDptx_EstablishLink(XDptx *InstancePtr);
|
||||
u32 XDptx_CheckLinkStatus(XDptx *InstancePtr, u8 LaneCount);
|
||||
void XDptx_EnableTrainAdaptive(XDptx *InstancePtr, u8 Enable);
|
||||
void XDptx_SetHasRedriverInPath(XDptx *InstancePtr, u8 Set);
|
||||
void XDptx_CfgTxVsOffset(XDptx *InstancePtr, u8 Offset);
|
||||
void XDptx_CfgTxVsLevel(XDptx *InstancePtr, u8 Level, u8 TxLevel);
|
||||
void XDptx_CfgTxPeLevel(XDptx *InstancePtr, u8 Level, u8 TxLevel);
|
||||
|
||||
/* xdptx.c: AUX transaction functions. */
|
||||
u32 XDptx_AuxRead(XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToRead,
|
||||
void *ReadData);
|
||||
u32 XDptx_AuxWrite(XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToWrite,
|
||||
void *WriteData);
|
||||
u32 XDptx_IicRead(XDptx *InstancePtr, u8 IicAddress, u16 Offset,
|
||||
u16 BytesToRead, void *ReadData);
|
||||
u32 XDptx_IicWrite(XDptx *InstancePtr, u8 IicAddress, u8 BytesToWrite,
|
||||
void *WriteData);
|
||||
|
||||
/* xdptx.c: Functions for controlling the link configuration. */
|
||||
u32 XDptx_SetDownspread(XDptx *InstancePtr, u8 Enable);
|
||||
u32 XDptx_SetEnhancedFrameMode(XDptx *InstancePtr, u8 Enable);
|
||||
u32 XDptx_SetLaneCount(XDptx *InstancePtr, u8 LaneCount);
|
||||
u32 XDptx_SetLinkRate(XDptx *InstancePtr, u8 LinkRate);
|
||||
u32 XDptx_SetScrambler(XDptx *InstancePtr, u8 Enable);
|
||||
|
||||
/* xdptx.c: General usage functions. */
|
||||
u32 XDptx_IsConnected(XDptx *InstancePtr);
|
||||
void XDptx_EnableMainLink(XDptx *InstancePtr);
|
||||
void XDptx_DisableMainLink(XDptx *InstancePtr);
|
||||
void XDptx_ResetPhy(XDptx *InstancePtr, u32 Reset);
|
||||
void XDptx_WaitUs(XDptx *InstancePtr, u32 MicroSeconds);
|
||||
void XDptx_SetUserTimerHandler(XDptx *InstancePtr,
|
||||
XDptx_TimerHandler CallbackFunc, void *CallbackRef);
|
||||
|
||||
/* xdptx_spm.c: Stream policy maker functions. */
|
||||
void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
||||
XVid_VideoMode VideoMode);
|
||||
void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream,
|
||||
u8 *Edid);
|
||||
void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
||||
XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate);
|
||||
void XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor);
|
||||
void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable);
|
||||
void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream);
|
||||
|
||||
/* xdptx_intr.c: Interrupt handling functions. */
|
||||
void XDptx_SetHpdEventHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdEventHandler CallbackFunc, void *CallbackRef);
|
||||
void XDptx_SetHpdPulseHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef);
|
||||
void XDptx_HpdInterruptHandler(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_selftest.c: Self test function. */
|
||||
u32 XDptx_SelfTest(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_sinit.c: Configuration extraction function.*/
|
||||
XDptx_Config *XDptx_LookupConfig(u16 DeviceId);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
||||
* MST mode. */
|
||||
void XDptx_MstCfgModeEnable(XDptx *InstancePtr);
|
||||
void XDptx_MstCfgModeDisable(XDptx *InstancePtr);
|
||||
u32 XDptx_MstCapable(XDptx *InstancePtr);
|
||||
u32 XDptx_MstEnable(XDptx *InstancePtr);
|
||||
u32 XDptx_MstDisable(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
||||
* MST streams and selecting their associated target sinks. */
|
||||
void XDptx_MstCfgStreamEnable(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_MstCfgStreamDisable(XDptx *InstancePtr, u8 Stream);
|
||||
u8 XDptx_MstStreamIsEnabled(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_SetStreamSelectFromSinkList(XDptx *InstancePtr, u8 Stream, u8
|
||||
SinkNum);
|
||||
void XDptx_SetStreamSinkRad(XDptx *InstancePtr, u8 Stream, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions related to MST topology
|
||||
* discovery and management. */
|
||||
u32 XDptx_DiscoverTopology(XDptx *InstancePtr);
|
||||
u32 XDptx_FindAccessibleDpDevices(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress);
|
||||
void XDptx_TopologySwapSinks(XDptx *InstancePtr, u8 Index0, u8 Index1);
|
||||
void XDptx_TopologySortSinksByTiling(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for communicating
|
||||
* with downstream DisplayPort devices. */
|
||||
u32 XDptx_RemoteDpcdRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
||||
u32 XDptx_RemoteDpcdWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
||||
u32 XDptx_RemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicAddress, u16 Offset, u16 BytesToRead,
|
||||
u8 *ReadData);
|
||||
u32 XDptx_RemoteIicWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicAddress, u8 BytesToWrite, u8 *WriteData);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions related to MST stream
|
||||
* allocation. */
|
||||
u32 XDptx_AllocatePayloadStreams(XDptx *InstancePtr);
|
||||
u32 XDptx_AllocatePayloadVcIdTable(XDptx *InstancePtr, u8 VcId, u8 Ts);
|
||||
u32 XDptx_ClearPayloadVcIdTable(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for issuing sideband
|
||||
* messages. */
|
||||
u32 XDptx_SendSbMsgRemoteDpcdWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
||||
u32 XDptx_SendSbMsgRemoteDpcdRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
||||
u32 XDptx_SendSbMsgRemoteIicWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicDeviceId, u8 BytesToWrite, u8 *WriteData);
|
||||
u32 XDptx_SendSbMsgRemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicDeviceId, u8 Offset, u8 BytesToRead,
|
||||
u8 *ReadData);
|
||||
u32 XDptx_SendSbMsgLinkAddress(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, XDptx_SbMsgLinkAddressReplyDeviceInfo *DeviceInfo);
|
||||
u32 XDptx_SendSbMsgEnumPathResources(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u16 *AvailPbn, u16 *FullPbn);
|
||||
u32 XDptx_SendSbMsgAllocatePayload(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 VcId, u16 Pbn);
|
||||
u32 XDptx_SendSbMsgClearPayloadIdTable(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) utility functions. */
|
||||
void XDptx_WriteGuid(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
||||
u32 Guid[4]);
|
||||
void XDptx_GetGuid(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
||||
u32 *Guid);
|
||||
|
||||
/* xdptx_edid.c: EDID utility functions. */
|
||||
u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid);
|
||||
u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 *Edid);
|
||||
u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum);
|
||||
u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress);
|
||||
u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress);
|
||||
u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag,
|
||||
u8 **DataBlockPtr);
|
||||
u32 XDptx_GetRemoteTiledDisplayDb(XDptx *InstancePtr, u8 *EdidExt,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr);
|
||||
|
||||
#endif /* XDPTX_H_ */
|
||||
381
XilinxProcessorIPLib/drivers/dp/src/xdptx_edid.c
Normal file
381
XilinxProcessorIPLib/drivers/dp/src/xdptx_edid.c
Normal file
|
|
@ -0,0 +1,381 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_edid.c
|
||||
*
|
||||
* This file contains functions related to accessing the Extended Display
|
||||
* Identification Data (EDID) of a specified sink using the XDptx driver.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 3.0 als 11/04/14 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function retrieves an immediately connected RX device's Extended Display
|
||||
* Identification Data (EDID) structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Edid is a pointer to the Edid buffer to save to.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the I2C transactions to read the EDID were
|
||||
* successful.
|
||||
* - XST_ERROR_COUNT_MAX if the EDID read request timed out.
|
||||
* - XST_DEVICE_NOT_FOUND if no RX device is connected.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertNonvoid(Edid != NULL);
|
||||
|
||||
/* Retrieve the base EDID block = EDID block #0. */
|
||||
Status = XDptx_GetEdidBlock(InstancePtr, Edid, 0);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function retrieves a remote RX device's Extended Display Identification
|
||||
* Data (EDID) structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param LinkCountTotal is the number of DisplayPort links from the
|
||||
* DisplayPort source to the target DisplayPort device.
|
||||
* @param RelativeAddress is the relative address from the DisplayPort
|
||||
* source to the target DisplayPort device.
|
||||
* @param Edid is a pointer to the Edid buffer to save to.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the I2C transactions to read the EDID were
|
||||
* successful.
|
||||
* - XST_ERROR_COUNT_MAX if the EDID read request timed out.
|
||||
* - XST_DEVICE_NOT_FOUND if no RX device is connected.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 *Edid)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertNonvoid(LinkCountTotal > 0);
|
||||
Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1));
|
||||
Xil_AssertNonvoid(Edid != NULL);
|
||||
|
||||
/* Retrieve the base EDID block = EDID block #0. */
|
||||
Status = XDptx_GetRemoteEdidBlock(InstancePtr, Edid, 0, LinkCountTotal,
|
||||
RelativeAddress);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Retrieve an immediately connected RX device's Extended Display Identification
|
||||
* Data (EDID) block given the block number. A block number of 0 represents the
|
||||
* base EDID and subsequent block numbers represent EDID extension blocks.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Data is a pointer to the data buffer to save the block data to.
|
||||
* @param BlockNum is the EDID block number to retrieve.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the block read has successfully completed with
|
||||
* no errors.
|
||||
* - XST_ERROR_COUNT_MAX if a time out occurred while attempting to
|
||||
* read the requested block.
|
||||
* - XST_DEVICE_NOT_FOUND if no RX device is connected.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum)
|
||||
{
|
||||
u32 Status;
|
||||
u16 Offset;
|
||||
|
||||
/* Calculate the I2C offset for the specified EDID block. */
|
||||
Offset = BlockNum * XDPTX_EDID_BLOCK_SIZE;
|
||||
|
||||
/* Issue the I2C read for the specified EDID block. */
|
||||
Status = XDptx_IicRead(InstancePtr, XDPTX_EDID_ADDR, Offset,
|
||||
XDPTX_EDID_BLOCK_SIZE, Data);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Retrieve a downstream DisplayPort device's Extended Display Identification
|
||||
* Data (EDID) block given the block number. A block number of 0 represents the
|
||||
* base EDID and subsequent block numbers represent EDID extension blocks.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Data is a pointer to the data buffer to save the block data to.
|
||||
* @param BlockNum is the EDID block number to retrieve.
|
||||
* @param LinkCountTotal is the total DisplayPort links connecting the
|
||||
* DisplayPort TX to the targeted downstream device.
|
||||
* @param RelativeAddress is the relative address from the DisplayPort
|
||||
* source to the targeted DisplayPort device.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the block read has successfully completed with
|
||||
* no errors.
|
||||
* - XST_ERROR_COUNT_MAX if a time out occurred while attempting to
|
||||
* read the requested block.
|
||||
* - XST_DEVICE_NOT_FOUND if no RX device is connected.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress)
|
||||
{
|
||||
u32 Status;
|
||||
u16 Offset;
|
||||
|
||||
/* Calculate the I2C offset for the specified EDID block. */
|
||||
Offset = BlockNum * XDPTX_EDID_BLOCK_SIZE;
|
||||
|
||||
/* Issue the I2C read for the specified EDID block. */
|
||||
Status = XDptx_RemoteIicRead(InstancePtr, LinkCountTotal,
|
||||
RelativeAddress, XDPTX_EDID_ADDR, Offset, XDPTX_EDID_BLOCK_SIZE,
|
||||
Data);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Search for and retrieve a downstream DisplayPort device's Extended Display
|
||||
* Identification Data (EDID) extension block of type DisplayID.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Data is a pointer to the data buffer to save the DisplayID to.
|
||||
* @param LinkCountTotal is the total DisplayPort links connecting the
|
||||
* DisplayPort TX to the targeted downstream device.
|
||||
* @param RelativeAddress is the relative address from the DisplayPort
|
||||
* source to the targeted DisplayPort device.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS a DisplayID extension block was found.
|
||||
* - XST_ERROR_COUNT_MAX if a time out occurred while attempting to
|
||||
* read an extension block.
|
||||
* - XST_DEVICE_NOT_FOUND if no RX device is connected.
|
||||
* - XST_FAILURE if no DisplayID extension block was found or some
|
||||
* error occurred in the search.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress)
|
||||
{
|
||||
u32 Status;
|
||||
u8 NumExt;
|
||||
u8 ExtIndex;
|
||||
|
||||
/* Get the base EDID block. */
|
||||
Status = XDptx_GetRemoteEdid(InstancePtr, LinkCountTotal,
|
||||
RelativeAddress, Data);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
NumExt = Data[XDPTX_EDID_EXT_BLOCK_COUNT];
|
||||
for (ExtIndex = 0; ExtIndex < NumExt; ExtIndex++) {
|
||||
/* Get an EDID extension block. */
|
||||
Status = XDptx_GetRemoteEdidBlock(InstancePtr, Data,
|
||||
ExtIndex + 1, LinkCountTotal, RelativeAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
if (XDptx_IsEdidExtBlockDispId(Data)) {
|
||||
/* The current extension block is of type DisplayID. */
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/* All extension blocks have been searched; no DisplayID extension block
|
||||
* exists in sink's EDID structure. */
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Given a section tag, search for and retrieve the appropriate section data
|
||||
* block that is part of the specified DisplayID structure.
|
||||
*
|
||||
* @param DisplayIdRaw is a pointer to the DisplayID data.
|
||||
* @param SectionTag is the tag to search for that represents the desired
|
||||
* section data block.
|
||||
* @param DataBlockPtr will be set by this function to point to the
|
||||
* appropriate section data block that is part of the DisplayIdRaw.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the section data block with the specified tag
|
||||
* was found.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note The DataBlockPtr argument is modified to point to the entry
|
||||
* in DisplayIdRaw that represents the beginning of the desired
|
||||
* section data block.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)
|
||||
{
|
||||
u8 Index;
|
||||
u8 DispIdSize = DisplayIdRaw[XDPTX_DISPID_SIZE];
|
||||
u8 *DataBlock;
|
||||
|
||||
/* Search for a section data block matching the specified tag. */
|
||||
for (Index = XDPTX_DISPID_PAYLOAD_START; Index < DispIdSize; Index++) {
|
||||
DataBlock = &DisplayIdRaw[Index];
|
||||
|
||||
/* Check if the tag mataches the current section data block. */
|
||||
if (DataBlock[XDPTX_DISPID_DB_SEC_TAG] == SectionTag) {
|
||||
*DataBlockPtr = DataBlock;
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
if (DataBlock[XDPTX_DISPID_DB_SEC_SIZE] == 0) {
|
||||
/* End of valid section data blocks. */
|
||||
break;
|
||||
}
|
||||
else {
|
||||
/* Increment the search index to skip the remaining
|
||||
* bytes of the current section data block. */
|
||||
Index += (XDPTX_DISPID_DB_SEC_SIZE +
|
||||
DataBlock[XDPTX_DISPID_DB_SEC_SIZE]);
|
||||
}
|
||||
}
|
||||
|
||||
/* The entire DisplayID was searched or the search ended due to data
|
||||
* no longer containing a valid section data block. No section data
|
||||
* block with the specified tag was found. */
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Search for and retrieve a downstream DisplayPort device's Tiled Display
|
||||
* Topology (TDT) section data block that is part of the downstream device's
|
||||
* DisplayID structure. The DisplayID structure is part of the Extended Display
|
||||
* Identification Data (EDID) in the form of an extension block.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param EdidExt is a pointer to the data area that will be filled by the
|
||||
* retrieved DisplayID extension block.
|
||||
* @param LinkCountTotal is the total DisplayPort links connecting the
|
||||
* DisplayPort TX to the targeted downstream device.
|
||||
* @param RelativeAddress is the relative address from the DisplayPort
|
||||
* source to the targeted DisplayPort device.
|
||||
* @param DataBlockPtr will be set by this function to point to the TDT
|
||||
* data block that is part of the EdidExt extension block.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS a DisplayID extension block was found.
|
||||
* - XST_ERROR_COUNT_MAX if a time out occurred while attempting to
|
||||
* read an extension block.
|
||||
* - XST_DEVICE_NOT_FOUND if no RX device is connected.
|
||||
* - XST_FAILURE if no DisplayID extension block was found or some
|
||||
* error occurred in the search.
|
||||
*
|
||||
* @note The EdidExt will be filled with the DisplayID EDID extension
|
||||
* block and the DataBlockPtr argument is modified to point to the
|
||||
* EdidExt entry representing the TDT section data block.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteTiledDisplayDb(XDptx *InstancePtr, u8 *EdidExt,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr)
|
||||
{
|
||||
u32 Status;
|
||||
u8 *EdidExtDispId;
|
||||
|
||||
/* Obtain a DisplayID EDID extension block. */
|
||||
Status = XDptx_GetRemoteEdidDispIdExt(InstancePtr, EdidExt,
|
||||
LinkCountTotal, RelativeAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
/* The sink does not have a DisplayID EDID extension block. */
|
||||
return Status;
|
||||
}
|
||||
|
||||
/* The first byte of the extension block is the tag. */
|
||||
EdidExtDispId = &EdidExt[0x01];
|
||||
|
||||
/* Obtain the tiled display topology block data from the DisplayId EDID
|
||||
* extension block. */
|
||||
Status = XDptx_GetDispIdDataBlock(EdidExtDispId, XDPTX_DISPID_TDT_TAG,
|
||||
DataBlockPtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
/* The sink does not possess a DisplayID EDID data block with
|
||||
* the specified tag. */
|
||||
return Status;
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
1434
XilinxProcessorIPLib/drivers/dp/src/xdptx_hw.h
Normal file
1434
XilinxProcessorIPLib/drivers/dp/src/xdptx_hw.h
Normal file
File diff suppressed because it is too large
Load diff
180
XilinxProcessorIPLib/drivers/dp/src/xdptx_intr.c
Normal file
180
XilinxProcessorIPLib/drivers/dp/src/xdptx_intr.c
Normal file
|
|
@ -0,0 +1,180 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_intr.c
|
||||
*
|
||||
* This file contains functions related to XDptx interrupt handling.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* 3.0 als 12/16/14 Increased debounce duration for HPD to 0.500ms.
|
||||
* Added masking of interrupts during servicing.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a hot-plug-detect event
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetHpdEventHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdEventHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->HpdEventHandler = CallbackFunc;
|
||||
InstancePtr->HpdEventCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a hot-plug-detect pulse
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetHpdPulseHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->HpdPulseHandler = CallbackFunc;
|
||||
InstancePtr->HpdPulseCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the interrupt handler for the XDptx driver.
|
||||
*
|
||||
* When an interrupt happens, it first detects what kind of interrupt happened,
|
||||
* then decides which callback function to invoke.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_HpdInterruptHandler(XDptx *InstancePtr)
|
||||
{
|
||||
u32 IntrStatus;
|
||||
u8 HpdEventDetected;
|
||||
u8 HpdPulseDetected;
|
||||
u32 HpdDuration;
|
||||
u32 IntrMask;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
/* Determine what kind of interrupt occurred.
|
||||
* Note: XDPTX_INTERRUPT_STATUS is an RC (read-clear) register. */
|
||||
IntrStatus = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_STATUS);
|
||||
IntrStatus &= ~XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK);
|
||||
IntrMask = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK);
|
||||
|
||||
HpdEventDetected = IntrStatus & XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK;
|
||||
HpdPulseDetected = IntrStatus &
|
||||
XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
|
||||
|
||||
if (HpdEventDetected) {
|
||||
/* Mask interrupts while event handling is taking place. API
|
||||
* will error out in case of a disconnection event anyway. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK, IntrMask |
|
||||
XDPTX_INTERRUPT_MASK_HPD_EVENT_MASK);
|
||||
|
||||
InstancePtr->HpdEventHandler(InstancePtr->HpdEventCallbackRef);
|
||||
}
|
||||
else if (HpdPulseDetected && XDptx_IsConnected(InstancePtr)) {
|
||||
/* Mask interrupts while event handling is taking place. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK, IntrMask |
|
||||
XDPTX_INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK);
|
||||
|
||||
/* The source device must debounce the incoming HPD signal by
|
||||
* sampling the value at an interval greater than 0.500 ms. An
|
||||
* HPD pulse should be of width 0.5 ms - 1.0 ms. */
|
||||
HpdDuration = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_HPD_DURATION);
|
||||
if (HpdDuration >= 500) {
|
||||
InstancePtr->HpdPulseHandler(
|
||||
InstancePtr->HpdPulseCallbackRef);
|
||||
}
|
||||
}
|
||||
|
||||
/* Unmask previously masked interrupts once handling is done. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
|
||||
IntrMask);
|
||||
}
|
||||
2976
XilinxProcessorIPLib/drivers/dp/src/xdptx_mst.c
Normal file
2976
XilinxProcessorIPLib/drivers/dp/src/xdptx_mst.c
Normal file
File diff suppressed because it is too large
Load diff
213
XilinxProcessorIPLib/drivers/dp/src/xdptx_selftest.c
Normal file
213
XilinxProcessorIPLib/drivers/dp/src/xdptx_selftest.c
Normal file
|
|
@ -0,0 +1,213 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_selftest.c
|
||||
*
|
||||
* This file contains a diagnostic self-test function for the XDptx driver. It
|
||||
* will check many of the DisplayPort TX's register values against the default
|
||||
* reset values as a sanity-check that the core is ready to be used.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* 3.0 als 12/16/14 Stream naming now starts at 1 to follow IP.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Variable Definitions ****************************/
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's general
|
||||
* usage registers.
|
||||
*/
|
||||
u32 ResetValues[53][2] =
|
||||
{
|
||||
{XDPTX_LINK_BW_SET, 0},
|
||||
{XDPTX_LANE_COUNT_SET, 0},
|
||||
{XDPTX_ENHANCED_FRAME_EN, 0},
|
||||
{XDPTX_TRAINING_PATTERN_SET, 0},
|
||||
{XDPTX_LINK_QUAL_PATTERN_SET, 0},
|
||||
{XDPTX_SCRAMBLING_DISABLE, 0},
|
||||
{XDPTX_DOWNSPREAD_CTRL, 0},
|
||||
{XDPTX_SOFT_RESET, 0},
|
||||
{XDPTX_ENABLE, 0},
|
||||
{XDPTX_ENABLE_MAIN_STREAM, 0},
|
||||
{XDPTX_ENABLE_SEC_STREAM, 0},
|
||||
{XDPTX_FORCE_SCRAMBLER_RESET, 0},
|
||||
{XDPTX_TX_MST_CONFIG, 0},
|
||||
{XDPTX_AUX_CMD, 0},
|
||||
{XDPTX_AUX_WRITE_FIFO, 0},
|
||||
{XDPTX_AUX_ADDRESS, 0},
|
||||
{XDPTX_AUX_CLK_DIVIDER, 0},
|
||||
{XDPTX_TX_USER_FIFO_OVERFLOW, 0},
|
||||
{XDPTX_AUX_REPLY_DATA, 0},
|
||||
{XDPTX_AUX_REPLY_CODE, 0},
|
||||
{XDPTX_AUX_REPLY_COUNT, 0},
|
||||
{XDPTX_INTERRUPT_MASK, 0x3F},
|
||||
{XDPTX_REPLY_DATA_COUNT, 0},
|
||||
{XDPTX_REPLY_STATUS, 0x10},
|
||||
{XDPTX_STREAM1, 0},
|
||||
{XDPTX_STREAM2, 0},
|
||||
{XDPTX_STREAM3, 0},
|
||||
{XDPTX_STREAM4, 0},
|
||||
{XDPTX_PHY_CONFIG, 0x03},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_0, 0},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_1, 0},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_2, 0},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_3, 0},
|
||||
{XDPTX_PHY_TRANSMIT_PRBS7, 0},
|
||||
{XDPTX_PHY_CLOCK_SELECT, 0},
|
||||
{XDPTX_TX_PHY_POWER_DOWN, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_0, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_1, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_2, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_3, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_0, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_1, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_2, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_3, 0},
|
||||
{XDPTX_GT_DRP_COMMAND, 0},
|
||||
{XDPTX_GT_DRP_READ_DATA, 0},
|
||||
{XDPTX_GT_DRP_CHANNEL_STATUS, 0},
|
||||
{XDPTX_TX_AUDIO_CONTROL, 0},
|
||||
{XDPTX_TX_AUDIO_CHANNELS, 0},
|
||||
{XDPTX_TX_AUDIO_INFO_DATA, 0},
|
||||
{XDPTX_TX_AUDIO_MAUD, 0},
|
||||
{XDPTX_TX_AUDIO_NAUD, 0},
|
||||
{XDPTX_TX_AUDIO_EXT_DATA, 0}
|
||||
};
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's main
|
||||
* stream attribute (MSA) registers.
|
||||
*/
|
||||
u32 ResetValuesMsa[20][2] =
|
||||
{
|
||||
{XDPTX_MAIN_STREAM_HTOTAL, 0},
|
||||
{XDPTX_MAIN_STREAM_VTOTAL, 0},
|
||||
{XDPTX_MAIN_STREAM_POLARITY, 0},
|
||||
{XDPTX_MAIN_STREAM_HSWIDTH, 0},
|
||||
{XDPTX_MAIN_STREAM_VSWIDTH, 0},
|
||||
{XDPTX_MAIN_STREAM_HRES, 0},
|
||||
{XDPTX_MAIN_STREAM_VRES, 0},
|
||||
{XDPTX_MAIN_STREAM_HSTART, 0},
|
||||
{XDPTX_MAIN_STREAM_VSTART, 0},
|
||||
{XDPTX_MAIN_STREAM_MISC0, 0},
|
||||
{XDPTX_MAIN_STREAM_MISC1, 0},
|
||||
{XDPTX_M_VID, 0},
|
||||
{XDPTX_TU_SIZE, 0},
|
||||
{XDPTX_N_VID, 0},
|
||||
{XDPTX_USER_PIXEL_WIDTH, 0},
|
||||
{XDPTX_USER_DATA_COUNT_PER_LANE, 0},
|
||||
{XDPTX_MAIN_STREAM_INTERLACED, 0},
|
||||
{XDPTX_MIN_BYTES_PER_TU, 0},
|
||||
{XDPTX_FRAC_BYTES_PER_TU, 0},
|
||||
{XDPTX_INIT_WAIT, 32}
|
||||
};
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function runs a self-test on the XDptx driver/device. The sanity test
|
||||
* checks whether or not all tested registers hold their default reset values.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self-test passed - all tested registers
|
||||
* hold their default reset values.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_SelfTest(XDptx *InstancePtr)
|
||||
{
|
||||
u8 Index;
|
||||
u8 StreamIndex;
|
||||
u32 StreamOffset;
|
||||
u32 Val;
|
||||
|
||||
/* Compare general usage registers with their default values. */
|
||||
for (Index = 0; Index < 53; Index++) {
|
||||
Val = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
ResetValues[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != ResetValues[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Compare main stream attribute (MSA) registers for all 4 streams with
|
||||
* their default values. */
|
||||
for (StreamIndex = 0; StreamIndex < 4; StreamIndex++) {
|
||||
/* Determine the MSA register offset for each stream. */
|
||||
if (StreamIndex == 0) {
|
||||
StreamOffset = 0;
|
||||
}
|
||||
else if (StreamIndex == 1) {
|
||||
StreamOffset = XDPTX_STREAM2_MSA_START_OFFSET;
|
||||
}
|
||||
else if (StreamIndex == 2) {
|
||||
StreamOffset = XDPTX_STREAM3_MSA_START_OFFSET;
|
||||
}
|
||||
else if (StreamIndex == 3) {
|
||||
StreamOffset = XDPTX_STREAM4_MSA_START_OFFSET;
|
||||
}
|
||||
|
||||
for (Index = 0; Index < 20; Index++) {
|
||||
Val = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
StreamOffset + ResetValuesMsa[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != ResetValuesMsa[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* All tested registers hold their default reset values. */
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
93
XilinxProcessorIPLib/drivers/dp/src/xdptx_sinit.c
Normal file
93
XilinxProcessorIPLib/drivers/dp/src/xdptx_sinit.c
Normal file
|
|
@ -0,0 +1,93 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_sinit.c
|
||||
*
|
||||
* This file contains static initialization methods for the XDptx driver.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xparameters.h"
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
||||
/**
|
||||
* A table of configuration structures containing the configuration information
|
||||
* for each DisplayPort TX core in the system.
|
||||
*/
|
||||
extern XDptx_Config XDptx_ConfigTable[XPAR_XDPTX_NUM_INSTANCES];
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function looks for the device configuration based on the unique device
|
||||
* ID. The table XDptx_ConfigTable[] contains the configuration information for
|
||||
* each device in the system.
|
||||
*
|
||||
* @param DeviceId is the unique device ID of the device being looked up.
|
||||
*
|
||||
* @return A pointer to the configuration table entry corresponding to the
|
||||
* given device ID, or NULL if no match is found.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
XDptx_Config *XDptx_LookupConfig(u16 DeviceId)
|
||||
{
|
||||
XDptx_Config *CfgPtr;
|
||||
u32 Index;
|
||||
|
||||
for (Index = 0; Index < XPAR_XDPTX_NUM_INSTANCES; Index++) {
|
||||
if (XDptx_ConfigTable[Index].DeviceId == DeviceId) {
|
||||
CfgPtr = &XDptx_ConfigTable[Index];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return CfgPtr;
|
||||
}
|
||||
862
XilinxProcessorIPLib/drivers/dp/src/xdptx_spm.c
Normal file
862
XilinxProcessorIPLib/drivers/dp/src/xdptx_spm.c
Normal file
|
|
@ -0,0 +1,862 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_spm.c
|
||||
*
|
||||
* This file contains the stream policy maker functions for the XDptx driver.
|
||||
* These functions set up the DisplayPort TX core's main stream attributes that
|
||||
* determine how a video stream will be displayed.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* als 08/03/14 Initial MST addition.
|
||||
* 3.0 als 12/16/14 Updated to use common video library.
|
||||
* Stream naming now starts at 1 to follow IP.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xdptx_hw.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function calculates the following Main Stream Attributes (MSA):
|
||||
* - Transfer unit size
|
||||
* - User pixel width
|
||||
* - Horizontal start
|
||||
* - Vertical start
|
||||
* - Horizontal total clock
|
||||
* - Vertical total clock
|
||||
* - Misc0
|
||||
* - Misc1
|
||||
* - Data per lane
|
||||
* - Average number of bytes per transfer unit
|
||||
* - Number of initial wait cycles
|
||||
* These values are derived from:
|
||||
* - Bits per color
|
||||
* - Horizontal resolution
|
||||
* - Vertical resolution
|
||||
* - Pixel clock (in KHz)
|
||||
* - Horizontal sync polarity
|
||||
* - Vertical sync polarity
|
||||
* - Horizontal front porch
|
||||
* - Horizontal sync pulse width
|
||||
* - Horizontal back porch
|
||||
* - Vertical front porch
|
||||
* - Vertical sync pulse width
|
||||
* - Vertical back porch
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Stream is the stream number for which to calculate the MSA
|
||||
* values.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The MsaConfig structure is modified with the new, calculated
|
||||
* values. The main stream attributes that were used to derive the
|
||||
* calculated values are untouched in the MsaConfig structure.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
||||
{
|
||||
u32 VideoBw;
|
||||
u32 LinkBw;
|
||||
u32 WordsPerLine;
|
||||
u8 BitsPerPixel;
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
XDptx_LinkConfig *LinkConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
LinkConfig = &InstancePtr->LinkConfig;
|
||||
|
||||
/* Verify the rest of the values used. */
|
||||
Xil_AssertVoid((LinkConfig->LinkRate == XDPTX_LINK_BW_SET_162GBPS) ||
|
||||
(LinkConfig->LinkRate == XDPTX_LINK_BW_SET_270GBPS) ||
|
||||
(LinkConfig->LinkRate == XDPTX_LINK_BW_SET_540GBPS));
|
||||
Xil_AssertVoid((LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_1) ||
|
||||
(LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_2) ||
|
||||
(LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_4));
|
||||
Xil_AssertVoid((MsaConfig->SynchronousClockMode == 0) ||
|
||||
(MsaConfig->SynchronousClockMode == 1));
|
||||
Xil_AssertVoid((MsaConfig->DynamicRange == 0) ||
|
||||
(MsaConfig->DynamicRange == 1));
|
||||
Xil_AssertVoid((MsaConfig->YCbCrColorimetry == 0) ||
|
||||
(MsaConfig->YCbCrColorimetry == 1));
|
||||
Xil_AssertVoid((MsaConfig->BitsPerColor == 6) ||
|
||||
(MsaConfig->BitsPerColor == 8) ||
|
||||
(MsaConfig->BitsPerColor == 10) ||
|
||||
(MsaConfig->BitsPerColor == 12) ||
|
||||
(MsaConfig->BitsPerColor == 16));
|
||||
|
||||
/* Set the user pixel width to handle clocks that exceed the
|
||||
* capabilities of the DisplayPort TX core. */
|
||||
if (MsaConfig->OverrideUserPixelWidth == 0) {
|
||||
if ((MsaConfig->Vtm.PixelClkKhz > 300000) &&
|
||||
(LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_4)) {
|
||||
MsaConfig->UserPixelWidth = 4;
|
||||
}
|
||||
else if ((MsaConfig->Vtm.PixelClkKhz > 75000) &&
|
||||
(LinkConfig->LaneCount != XDPTX_LANE_COUNT_SET_1)) {
|
||||
MsaConfig->UserPixelWidth = 2;
|
||||
}
|
||||
else {
|
||||
MsaConfig->UserPixelWidth = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Compute the rest of the MSA values. */
|
||||
MsaConfig->NVid = 27 * 1000 * LinkConfig->LinkRate;
|
||||
MsaConfig->HStart = MsaConfig->Vtm.Timing.HSyncWidth +
|
||||
MsaConfig->Vtm.Timing.HBackPorch;
|
||||
MsaConfig->VStart = MsaConfig->Vtm.Timing.F0PVSyncWidth +
|
||||
MsaConfig->Vtm.Timing.F0PVBackPorch;
|
||||
MsaConfig->HClkTotal = (MsaConfig->Vtm.Timing.HSyncWidth +
|
||||
MsaConfig->Vtm.Timing.HBackPorch +
|
||||
MsaConfig->Vtm.Timing.HFrontPorch +
|
||||
MsaConfig->Vtm.Timing.HActive);
|
||||
MsaConfig->VClkTotal = (MsaConfig->Vtm.Timing.F0PVSyncWidth +
|
||||
MsaConfig->Vtm.Timing.F0PVBackPorch +
|
||||
MsaConfig->Vtm.Timing.F0PVFrontPorch +
|
||||
MsaConfig->Vtm.Timing.VActive);
|
||||
|
||||
/* Miscellaneous attributes. */
|
||||
if (MsaConfig->BitsPerColor == 6) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_6BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 8) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_8BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 10) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_10BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 12) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_12BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 16) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_16BPC;
|
||||
}
|
||||
MsaConfig->Misc0 = (MsaConfig->Misc0 <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_BDC_SHIFT) |
|
||||
(MsaConfig->YCbCrColorimetry <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT) |
|
||||
(MsaConfig->DynamicRange <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT) |
|
||||
(MsaConfig->ComponentFormat <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT) |
|
||||
(MsaConfig->SynchronousClockMode);
|
||||
MsaConfig->Misc1 = 0;
|
||||
|
||||
/* Determine the number of bits per pixel for the specified color
|
||||
* component format. */
|
||||
if (MsaConfig->ComponentFormat ==
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422) {
|
||||
/* YCbCr422 color component format. */
|
||||
BitsPerPixel = MsaConfig->BitsPerColor * 2;
|
||||
}
|
||||
else {
|
||||
/* RGB or YCbCr 4:4:4 color component format. */
|
||||
BitsPerPixel = MsaConfig->BitsPerColor * 3;
|
||||
}
|
||||
|
||||
/* Calculate the data per lane. */
|
||||
WordsPerLine = (MsaConfig->Vtm.Timing.HActive * BitsPerPixel);
|
||||
if ((WordsPerLine % 16) != 0) {
|
||||
WordsPerLine += 16;
|
||||
}
|
||||
WordsPerLine /= 16;
|
||||
|
||||
MsaConfig->DataPerLane = WordsPerLine - LinkConfig->LaneCount;
|
||||
if ((WordsPerLine % LinkConfig->LaneCount) != 0) {
|
||||
MsaConfig->DataPerLane += (WordsPerLine % LinkConfig->LaneCount);
|
||||
}
|
||||
|
||||
if (InstancePtr->MstEnable == 1) {
|
||||
/* Do time slot (and payload bandwidth number) calculations for
|
||||
* MST. */
|
||||
XDptx_CalculateTs(InstancePtr, Stream, BitsPerPixel);
|
||||
|
||||
MsaConfig->InitWait = 0;
|
||||
}
|
||||
else {
|
||||
/* Allocate a fixed size for single-stream transport (SST)
|
||||
* operation. */
|
||||
MsaConfig->TransferUnitSize = 64;
|
||||
|
||||
/* Calculate the average number of bytes per transfer unit.
|
||||
* Note: Both the integer and the fractional part is stored in
|
||||
* AvgBytesPerTU. */
|
||||
VideoBw = (MsaConfig->Vtm.PixelClkKhz * BitsPerPixel) / 8;
|
||||
LinkBw = (LinkConfig->LaneCount * LinkConfig->LinkRate * 27);
|
||||
MsaConfig->AvgBytesPerTU = (VideoBw *
|
||||
MsaConfig->TransferUnitSize) / LinkBw;
|
||||
|
||||
/* The number of initial wait cycles at the start of a new line
|
||||
* by the framing logic. This allows enough data to be buffered
|
||||
* in the input FIFO before video is sent. */
|
||||
if ((MsaConfig->AvgBytesPerTU / 1000) <= 4) {
|
||||
MsaConfig->InitWait = 64;
|
||||
}
|
||||
else {
|
||||
MsaConfig->InitWait = MsaConfig->TransferUnitSize -
|
||||
(MsaConfig->AvgBytesPerTU / 1000);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets the Main Stream Attribute (MSA) values in the
|
||||
* configuration structure to match one of the standard display mode timings
|
||||
* from the XDptx_DmtModes[] standard Display Monitor Timing (DMT) table. The
|
||||
* XDptx_VideoMode enumeration in xdptx.h lists the available video modes.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Stream is the stream number for which the MSA values will be
|
||||
* used for.
|
||||
* @param VideoMode is one of the enumerated standard video modes that is
|
||||
* used to determine the MSA values to be used.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||||
* MSA values associated to the specified video mode.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
||||
XVid_VideoMode VideoMode)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(VideoMode < XVID_VM_NUM_SUPPORT);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
|
||||
/* Configure the MSA values from the display monitor DMT table. */
|
||||
MsaConfig->Vtm.PixelClkKhz =
|
||||
XVid_VideoTimingModes[VideoMode].PixelClkKhz;
|
||||
MsaConfig->Vtm.Timing.HActive =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.HActive;
|
||||
MsaConfig->Vtm.Timing.VActive =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.VActive;
|
||||
MsaConfig->Vtm.Timing.HSyncPolarity =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.HSyncPolarity;
|
||||
MsaConfig->Vtm.Timing.VSyncPolarity =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.VSyncPolarity;
|
||||
MsaConfig->Vtm.Timing.HFrontPorch =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.HFrontPorch;
|
||||
MsaConfig->Vtm.Timing.HSyncWidth =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.HSyncWidth;
|
||||
MsaConfig->Vtm.Timing.HBackPorch =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.HBackPorch;
|
||||
MsaConfig->Vtm.Timing.F0PVFrontPorch =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.F0PVFrontPorch;
|
||||
MsaConfig->Vtm.Timing.F0PVSyncWidth =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.F0PVSyncWidth;
|
||||
MsaConfig->Vtm.Timing.F0PVBackPorch =
|
||||
XVid_VideoTimingModes[VideoMode].Timing.F0PVBackPorch;
|
||||
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets the main stream attribute values in the configuration
|
||||
* structure to match the preferred timing of the sink monitor. This Preferred
|
||||
* Timing Mode (PTM) information is stored in the sink's Extended Display
|
||||
* Identification Data (EDID).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param Stream is the stream number for which the MSA values will be
|
||||
* used for.
|
||||
* @param Edid is a pointer to the Edid to use for the specified stream.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||||
* main stream attribute values associated to the preferred timing
|
||||
* of the sink monitor.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream, u8 *Edid)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
u8 *Ptm;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid(Edid != NULL);
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
Ptm = &Edid[XDPTX_EDID_PTM];
|
||||
|
||||
/* Configure the MSA values with the PTM information as
|
||||
* specified by the preferred Detailed Timing Descriptor (DTD) of the
|
||||
* monitor's EDID.
|
||||
* Note, the PTM is only required for EDID versions 1.3 a newer. Earlier
|
||||
* versions may not contain this information. */
|
||||
u16 HBlank = ((Ptm[XDPTX_EDID_DTD_HRES_HBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HBLANK_LSB];
|
||||
|
||||
u16 VBlank = ((Ptm[XDPTX_EDID_DTD_VRES_VBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_VBLANK_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.HActive =
|
||||
(((Ptm[XDPTX_EDID_DTD_HRES_HBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HRES_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.VActive =
|
||||
(((Ptm[XDPTX_EDID_DTD_VRES_VBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_VRES_LSB];
|
||||
|
||||
MsaConfig->Vtm.PixelClkKhz = ((Ptm[XDPTX_EDID_DTD_PIXEL_CLK_KHZ_MSB] <<
|
||||
8) | Ptm[XDPTX_EDID_DTD_PIXEL_CLK_KHZ_LSB]) * 10;
|
||||
|
||||
MsaConfig->Vtm.Timing.HFrontPorch =
|
||||
(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_MASK) >>
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HFPORCH_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.HSyncWidth =
|
||||
(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_MASK) >>
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HSPW_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.F0PVFrontPorch =
|
||||
(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_MASK) >>
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_SHIFT) << 8) |
|
||||
((Ptm[XDPTX_EDID_DTD_VFPORCH_VSPW_L4] &
|
||||
XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_MASK) >>
|
||||
XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_SHIFT);
|
||||
|
||||
MsaConfig->Vtm.Timing.F0PVSyncWidth =
|
||||
((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VSPW_MASK) << 8) |
|
||||
(Ptm[XDPTX_EDID_DTD_VFPORCH_VSPW_L4] &
|
||||
XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VSPW_MASK);
|
||||
|
||||
MsaConfig->Vtm.Timing.HBackPorch = HBlank -
|
||||
(MsaConfig->Vtm.Timing.HFrontPorch +
|
||||
MsaConfig->Vtm.Timing.HSyncWidth);
|
||||
|
||||
MsaConfig->Vtm.Timing.F0PVBackPorch = VBlank -
|
||||
(MsaConfig->Vtm.Timing.F0PVFrontPorch +
|
||||
MsaConfig->Vtm.Timing.F0PVSyncWidth);
|
||||
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function takes a the main stream attributes from MsaConfigCustom and
|
||||
* copies them into InstancePtr->MsaConfig. If desired, given a base set of
|
||||
* attributes, the rest of the attributes may be derived. The minimal required
|
||||
* main stream attributes (MSA) that must be contained in the MsaConfigCustom
|
||||
* structure are:
|
||||
* - Pixel clock (in KHz)
|
||||
* - Horizontal sync polarity
|
||||
* - Vertical sync polarity
|
||||
* - Horizontal sync pulse width
|
||||
* - Vertical sync pulse width
|
||||
* - Horizontal resolution
|
||||
* - Vertical resolution
|
||||
* - Vertical back porch
|
||||
* - Vertical front porch
|
||||
* - Horizontal back porch
|
||||
* - Horizontal front porch
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Stream is the stream number for which the MSA values will be
|
||||
* used for.
|
||||
* @param MsaConfigCustom is the structure that will be used to copy the
|
||||
* main stream attributes from (into InstancePtr->MsaConfig).
|
||||
* @param Recalculate is a boolean enable that determines whether or not
|
||||
* the main stream attributes should be recalculated.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified with the new
|
||||
* values.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
||||
XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid(MsaConfigCustom != NULL);
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
|
||||
/* Copy the MSA values from the user configuration structure. */
|
||||
MsaConfig->Vtm.Timing.HActive =
|
||||
MsaConfigCustom->Vtm.Timing.HActive;
|
||||
MsaConfig->Vtm.Timing.VActive =
|
||||
MsaConfigCustom->Vtm.Timing.VActive;
|
||||
MsaConfig->Vtm.PixelClkKhz = MsaConfigCustom->Vtm.PixelClkKhz;
|
||||
MsaConfig->Vtm.Timing.HSyncPolarity =
|
||||
MsaConfigCustom->Vtm.Timing.HSyncPolarity;
|
||||
MsaConfig->Vtm.Timing.VSyncPolarity =
|
||||
MsaConfigCustom->Vtm.Timing.VSyncPolarity;
|
||||
MsaConfig->Vtm.Timing.HFrontPorch =
|
||||
MsaConfigCustom->Vtm.Timing.HFrontPorch;
|
||||
MsaConfig->Vtm.Timing.HSyncWidth =
|
||||
MsaConfigCustom->Vtm.Timing.HSyncWidth;
|
||||
MsaConfig->Vtm.Timing.HBackPorch =
|
||||
MsaConfigCustom->Vtm.Timing.HBackPorch;
|
||||
MsaConfig->Vtm.Timing.F0PVFrontPorch =
|
||||
MsaConfigCustom->Vtm.Timing.F0PVFrontPorch;
|
||||
MsaConfig->Vtm.Timing.F0PVSyncWidth =
|
||||
MsaConfigCustom->Vtm.Timing.F0PVSyncWidth;
|
||||
MsaConfig->Vtm.Timing.F0PVBackPorch =
|
||||
MsaConfigCustom->Vtm.Timing.F0PVBackPorch;
|
||||
|
||||
if (Recalculate) {
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
else {
|
||||
/* Use the custom values for the rest. */
|
||||
MsaConfig->TransferUnitSize = MsaConfigCustom->TransferUnitSize;
|
||||
MsaConfig->UserPixelWidth = MsaConfigCustom->UserPixelWidth;
|
||||
MsaConfig->NVid = MsaConfigCustom->NVid;
|
||||
MsaConfig->HStart = MsaConfigCustom->HStart;
|
||||
MsaConfig->VStart = MsaConfigCustom->VStart;
|
||||
MsaConfig->HClkTotal = MsaConfigCustom->HClkTotal;
|
||||
MsaConfig->VClkTotal = MsaConfigCustom->VClkTotal;
|
||||
MsaConfig->Misc0 = MsaConfigCustom->Misc0;
|
||||
MsaConfig->Misc1 = MsaConfigCustom->Misc1;
|
||||
MsaConfig->DataPerLane = MsaConfigCustom->DataPerLane;
|
||||
MsaConfig->AvgBytesPerTU = MsaConfigCustom->AvgBytesPerTU;
|
||||
MsaConfig->InitWait = MsaConfigCustom->InitWait;
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets the bits per color value of the video stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param Stream is the stream number for which to set the color depth.
|
||||
* @param BitsPerColor is the new number of bits per color to use.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||||
* new main stream attributes associated with a new bits per color
|
||||
* value.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((BitsPerColor == 6) || (BitsPerColor == 8) ||
|
||||
(BitsPerColor == 10) || (BitsPerColor == 12) ||
|
||||
(BitsPerColor == 16));
|
||||
|
||||
InstancePtr->MsaConfig[Stream - 1].BitsPerColor = BitsPerColor;
|
||||
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function enables or disables synchronous clock mode for a video stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param Stream is the stream number for which to enable or disable
|
||||
* synchronous clock mode.
|
||||
* @param Enable if set to 1, will enable synchronous clock mode.
|
||||
* Otherwise, if set to 0, synchronous clock mode will be disabled.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Enable == 0) || (Enable == 1));
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
|
||||
MsaConfig->SynchronousClockMode = Enable;
|
||||
|
||||
if (Enable == 1) {
|
||||
MsaConfig->Misc0 |= (1 <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT);
|
||||
}
|
||||
else {
|
||||
MsaConfig->Misc0 &= ~(1 <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT);
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function clears the main stream attributes registers of the DisplayPort
|
||||
* TX core and sets them to the values specified in the main stream attributes
|
||||
* configuration structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param Stream is the stream number for which to set the MSA values for.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
|
||||
XDptx_ClearMsaValues(InstancePtr, Stream);
|
||||
XDptx_SetMsaValues(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function clears the main stream attributes registers of the DisplayPort
|
||||
* TX core.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Stream is the stream number for which to clear the MSA values.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream)
|
||||
{
|
||||
XDptx_Config *Config;
|
||||
u32 StreamOffset[4] = {0, XDPTX_STREAM2_MSA_START_OFFSET,
|
||||
XDPTX_STREAM3_MSA_START_OFFSET, XDPTX_STREAM4_MSA_START_OFFSET};
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
|
||||
Config = &InstancePtr->Config;
|
||||
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HTOTAL +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VTOTAL +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_POLARITY +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSWIDTH +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSWIDTH +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HRES +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VRES +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSTART +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSTART +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC0 +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC1 +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_PIXEL_WIDTH +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_DATA_COUNT_PER_LANE +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_M_VID +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_N_VID +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_STREAM1 + (Stream - 1) * 4, 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_TU_SIZE +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MIN_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_FRAC_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_INIT_WAIT +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets the main stream attributes registers of the DisplayPort TX
|
||||
* core with the values specified in the main stream attributes configuration
|
||||
* structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Stream is the stream number for which to set the MSA values for.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream)
|
||||
{
|
||||
XDptx_Config *Config;
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
u32 StreamOffset[4] = {0, XDPTX_STREAM2_MSA_START_OFFSET,
|
||||
XDPTX_STREAM3_MSA_START_OFFSET, XDPTX_STREAM4_MSA_START_OFFSET};
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
|
||||
Config = &InstancePtr->Config;
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
|
||||
/* Set the main stream attributes to the associated DisplayPort TX core
|
||||
* registers. */
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HTOTAL +
|
||||
StreamOffset[Stream - 1], MsaConfig->HClkTotal);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VTOTAL +
|
||||
StreamOffset[Stream - 1], MsaConfig->VClkTotal);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_POLARITY +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.HSyncPolarity |
|
||||
(MsaConfig->Vtm.Timing.VSyncPolarity <<
|
||||
XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT));
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSWIDTH +
|
||||
StreamOffset[Stream - 1], MsaConfig->Vtm.Timing.HSyncWidth);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSWIDTH +
|
||||
StreamOffset[Stream - 1], MsaConfig->Vtm.Timing.F0PVSyncWidth);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HRES +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.HActive);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VRES +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.VActive);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSTART +
|
||||
StreamOffset[Stream - 1], MsaConfig->HStart);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSTART +
|
||||
StreamOffset[Stream - 1], MsaConfig->VStart);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC0 +
|
||||
StreamOffset[Stream - 1], MsaConfig->Misc0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC1 +
|
||||
StreamOffset[Stream - 1], MsaConfig->Misc1);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_M_VID +
|
||||
StreamOffset[Stream - 1], MsaConfig->Vtm.PixelClkKhz);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_N_VID +
|
||||
StreamOffset[Stream - 1], MsaConfig->NVid);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_PIXEL_WIDTH +
|
||||
StreamOffset[Stream - 1], MsaConfig->UserPixelWidth);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_DATA_COUNT_PER_LANE +
|
||||
StreamOffset[Stream - 1], MsaConfig->DataPerLane);
|
||||
|
||||
/* Set the transfer unit values to the associated DisplayPort TX core
|
||||
* registers. */
|
||||
if (InstancePtr->MstEnable == 1) {
|
||||
XDptx_WriteReg(Config->BaseAddr,
|
||||
XDPTX_STREAM1 + (Stream - 1) * 4,
|
||||
((MsaConfig->AvgBytesPerTU / 1000) << 16) |
|
||||
(MsaConfig->AvgBytesPerTU % 1000));
|
||||
}
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_TU_SIZE +
|
||||
StreamOffset[Stream - 1], MsaConfig->TransferUnitSize);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MIN_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], MsaConfig->AvgBytesPerTU / 1000);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_FRAC_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], MsaConfig->AvgBytesPerTU % 1000);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_INIT_WAIT +
|
||||
StreamOffset[Stream - 1], MsaConfig->InitWait);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* When the driver is in multi-stream transport (MST) mode, this function will
|
||||
* make the necessary calculations to describe a stream in MST mode. The key
|
||||
* values are the payload bandwidth number (PBN), the number of timeslots
|
||||
* required for allocating the bandwidth, and the average bytes per transfer
|
||||
* unit (both the integer and the fractional part).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param Stream is the stream number to make the calculations for.
|
||||
* @param BitsPerPixel is the number of bits that is used to store one
|
||||
* pixel.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig =
|
||||
&InstancePtr->MsaConfig[Stream - 1];
|
||||
XDptx_LinkConfig *LinkConfig = &InstancePtr->LinkConfig;
|
||||
double PeakPixelBw;
|
||||
u32 LinkBw;
|
||||
double Average_StreamSymbolTimeSlotsPerMTP;
|
||||
double Target_Average_StreamSymbolTimeSlotsPerMTP;
|
||||
double MaximumTarget_Average_StreamSymbolTimeSlotsPerMTP;
|
||||
u32 TsInt;
|
||||
u32 TsFrac;
|
||||
|
||||
PeakPixelBw = ((double)MsaConfig->Vtm.PixelClkKhz / 1000) *
|
||||
((double)BitsPerPixel / 8);
|
||||
LinkBw = (LinkConfig->LaneCount * LinkConfig->LinkRate * 27);
|
||||
|
||||
/* Calculate the payload bandiwdth number (PBN). */
|
||||
InstancePtr->MstStreamConfig[Stream - 1].MstPbn =
|
||||
1.006 * PeakPixelBw * ((double)64 / 54);
|
||||
/* Ceil - round up if required, avoiding overhead of math.h. */
|
||||
if ((double)(1.006 * PeakPixelBw * ((double)64 / 54)) >
|
||||
((double)InstancePtr->MstStreamConfig[Stream - 1].MstPbn)) {
|
||||
InstancePtr->MstStreamConfig[Stream - 1].MstPbn++;
|
||||
}
|
||||
|
||||
/* Calculate the average stream symbol time slots per MTP. */
|
||||
Average_StreamSymbolTimeSlotsPerMTP = (64.0 * PeakPixelBw / LinkBw);
|
||||
MaximumTarget_Average_StreamSymbolTimeSlotsPerMTP = (54.0 *
|
||||
((double)InstancePtr->MstStreamConfig[Stream - 1].MstPbn /
|
||||
LinkBw));
|
||||
|
||||
/* The target value to be found needs to follow the condition:
|
||||
* Average_StreamSymbolTimeSlotsPerMTP <=
|
||||
* Target_Average_StreamSymbolTimeSlotsPerMTP
|
||||
* >= MaximumTarget_Average_StreamSymbolTimeSlotsPerMTP
|
||||
* Obtain the greatest target value that satisfies the above condition
|
||||
* and still a multiple of 1/TsFrac_Denominator.
|
||||
* Note: TsFrac_Denominator = 8. */
|
||||
/* Round down. */
|
||||
Target_Average_StreamSymbolTimeSlotsPerMTP =
|
||||
(u32)Average_StreamSymbolTimeSlotsPerMTP;
|
||||
/* Find the greatest multiple that is less than the maximum. */
|
||||
Target_Average_StreamSymbolTimeSlotsPerMTP += ((1.0 / 8.0) * (u32)(8.0 *
|
||||
(MaximumTarget_Average_StreamSymbolTimeSlotsPerMTP -
|
||||
Target_Average_StreamSymbolTimeSlotsPerMTP)));
|
||||
|
||||
/* Determine the integer and the fractional part of the number of time
|
||||
* slots that will be allocated for the stream. */
|
||||
TsInt = Target_Average_StreamSymbolTimeSlotsPerMTP;
|
||||
TsFrac = (((double)Target_Average_StreamSymbolTimeSlotsPerMTP * 1000) -
|
||||
(TsInt * 1000));
|
||||
|
||||
/* Store TsInt and TsFrac in AvgBytesPerTU. */
|
||||
MsaConfig->AvgBytesPerTU = TsInt * 1000 + TsFrac;
|
||||
|
||||
/* Set the number of time slots to allocate for this stream. */
|
||||
MsaConfig->TransferUnitSize = TsInt;
|
||||
if (TsFrac != 0) {
|
||||
/* Round up. */
|
||||
MsaConfig->TransferUnitSize++;
|
||||
}
|
||||
if ((InstancePtr->Config.PayloadDataWidth == 4) &&
|
||||
(MsaConfig->TransferUnitSize % 4) != 0) {
|
||||
/* Set to a multiple of 4 boundary. */
|
||||
MsaConfig->TransferUnitSize += (4 -
|
||||
(MsaConfig->TransferUnitSize % 4));
|
||||
}
|
||||
else if ((MsaConfig->TransferUnitSize % 2) != 0) {
|
||||
/* Set to an even boundary. */
|
||||
MsaConfig->TransferUnitSize++;
|
||||
}
|
||||
|
||||
/* Determine the PBN for the stream. */
|
||||
InstancePtr->MstStreamConfig[Stream - 1].MstPbn =
|
||||
MsaConfig->TransferUnitSize *
|
||||
(LinkConfig->LaneCount * LinkConfig->LinkRate / 2);
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue