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hdcp1x: Updated version to 2.0.

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Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-10-09 03:51:42 -07:00 • committed by Nava kishore Manne
parent 0e440b93e0
commit 22a0b99cb9
26 changed files with 28 additions and 26 deletions
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2
XilinxProcessorIPLib/drivers/hdcp1x/data/hdcp1x.mdd
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@ -36,6 +36,6 @@ BEGIN driver hdcp1x
OPTION supported_peripherals = (hdmi_tx_hdcp_cipher_4b hdmi_rx_hdcp_cipher_4b hdcp);
OPTION driver_state = ACTIVE;
OPTION copyfiles = all;
OPTION VERSION = 1.0;
OPTION VERSION = 2.0;
OPTION NAME = hdcp1x;
END driver

3
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the implementation of the HDCP state machine module
@ -44,6 +44,7 @@
* Ver Who Date Changes
* ----- ------ -------- --------------------------------------------------
* 1.00 fidus 07/16/15 Initial release.
* 2.00 als 09/30/15 Added EffectiveAddr argument to XHdcp1x_CfgInitialize.
* </pre>
*
******************************************************************************/

3
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
* @details
*
@ -46,6 +46,7 @@
* Ver Who Date Changes
* ----- ------ -------- --------------------------------------------------
* 1.00 fidus 07/16/15 Initial release.
* 2.00 als 09/30/15 Added EffectiveAddr argument to XHdcp1x_CfgInitialize.
* </pre>
*
******************************************************************************/

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_cipher.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_cipher.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains the main implementation of the driver associated with

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_cipher.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_cipher.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This is the main header file for Xilinx HDCP Cipher core.

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_cipher_intr.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_cipher_intr.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains interrupt related functions for Xilinx HDCP core.

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_debug.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_debug.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file provides the interface of the HDCP debug commands

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_hw.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_hw.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This header file contains identifiers and register-level core functions (or

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_intr.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_cipher_intr.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains interrupt related functions for Xilinx HDCP core.

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_platform.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_platform.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file provides the implementation for the hdcp platform integration

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_platform.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_platform.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file provides the interface for the hdcp platform integration module

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the main implementation file for the Xilinx HDCP Port driver

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This header file contains the external declarations associated with the

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_dp.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_dp.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains the definitions for the hdcp port registers/offsets for

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_dp_rx.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_dp_rx.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the implementation of the HDCP port driver for Xilinx DP

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_dp_tx.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_dp_tx.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the implementation of the HDCP port driver for DP TX

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_hdmi.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_hdmi.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains the definitions for the hdcp port registers/offsets for

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_hdmi_rx.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_hdmi_rx.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the implementation of the HDCP port driver for HDMI RX

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_hdmi_tx.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_hdmi_tx.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the implementation of the HDCP port driver for HDMI TX

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_intr.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_port_intr.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the interrupt related functions of the Xilinx HDCP port driver

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_rx.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_rx.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the main implementation file for the Xilinx HDCP receive state

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_rx.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_rx.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file provides the interface of the HDCP RX state machine

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_selftest.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_selftest.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains self test function for the hdcp interface

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_sinit.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_sinit.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file contains static initialization method for Xilinx HDCP driver

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_tx.c
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_tx.c
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This contains the main implementation file for the Xilinx HDCP transmit

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_tx.h
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@ -33,7 +33,7 @@
/**
*
* @file xhdcp1x_tx.h
* @addtogroup hdcp1x_v1_0
* @addtogroup hdcp1x_v2_0
* @{
*
* This file provides the interface of the HDCP TX state machine