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hdcp1x: Fixed internal API naming.

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Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-08-07 18:32:11 -07:00 • committed by Nava kishore Manne
parent c6d40dccdd
commit 27ad901f1d
7 changed files with 986 additions and 1044 deletions
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6
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port.h
View file

@ -83,11 +83,11 @@ typedef struct XHdcp1x_PortPhyIfAdaptorS {
int (*Init)(XHdcp1x *); /**< Initialization function */
int (*Enable)(XHdcp1x *); /**< Enable function */
int (*Disable)(XHdcp1x *); /**< Disable function */
int (*Read)(const XHdcp1x *, u8, void*, u32); /**< Reg read */
int (*Write)(XHdcp1x *, u8, const void*, u32); /**< Reg write */
int (*Read)(const XHdcp1x *, u8, void *, u32); /**< Reg read */
int (*Write)(XHdcp1x *, u8, const void *, u32); /**< Reg write */
int (*IsCapable)(const XHdcp1x *); /**< Tests for HDCP capable */
int (*IsRepeater)(const XHdcp1x *); /**< Tests for repeater */
int (*GetRepeaterInfo)(const XHdcp1x *, u16*); /**< Gets repeater
int (*GetRepeaterInfo)(const XHdcp1x *, u16 *); /**< Gets repeater
info */
void (*IntrHandler)(XHdcp1x *, u32); /**< Interrupt handler */
} XHdcp1x_PortPhyIfAdaptor;

253
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_dp_rx.c
View file

@ -62,18 +62,25 @@
/************************** Constant Definitions *****************************/
/* Adaptor definition at the end of this file. */
const XHdcp1x_PortPhyIfAdaptor XHdcp1x_PortDpRxAdaptor;
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/*************************** Function Prototypes *****************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize);
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
u32 BufSize);
static void ProcessAKsvWrite(void *CallbackRef);
static void ProcessRoRead(void *CallbackRef);
static void ProcessBinfoRead(void *CallbackRef);
static int XHdcp1x_PortDpRxEnable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpRxDisable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpRxInit(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpRxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize);
static int XHdcp1x_PortDpRxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize);
static void XHdcp1x_PortDpRxProcessAKsvWrite(void *CallbackRef);
static void XHdcp1x_PortDpRxProcessRoRead(void *CallbackRef);
static void XHdcp1x_PortDpRxProcessBinfoRead(void *CallbackRef);
/************************** Function Definitions *****************************/
@ -89,7 +96,7 @@ static void ProcessBinfoRead(void *CallbackRef);
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpRxEnable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpRxEnable(XHdcp1x *InstancePtr)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 IntMask = 0;
@ -104,29 +111,29 @@ int XHdcp1x_PortDpRxEnable(XHdcp1x *InstancePtr)
memset(Buf, 0, 4);
/* Initialize Bstatus register */
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, Buf, 1);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, Buf, 1);
/* Initialize Binfo register */
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BINFO, Buf, 2);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BINFO, Buf, 2);
/* Initialize Bcaps register */
Buf[0] |= XHDCP1X_PORT_BIT_BCAPS_HDCP_CAPABLE;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, Buf, 1);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, Buf, 1);
/* Initialize some debug registers */
Buf[0] = 0xDE;
Buf[1] = 0xAD;
Buf[2] = 0xBE;
Buf[3] = 0xEF;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_DBG, Buf, 4);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_DBG, Buf, 4);
/* Register callbacks */
XDp_RxSetIntrHdcpAksvWriteHandler(HwDp, &ProcessAKsvWrite,
InstancePtr);
XDp_RxSetIntrHdcpBinfoReadHandler(HwDp, &ProcessBinfoRead,
InstancePtr);
XDp_RxSetIntrHdcpRoReadHandler(HwDp, &ProcessRoRead,
InstancePtr);
XDp_RxSetIntrHdcpAksvWriteHandler(HwDp,
&XHdcp1x_PortDpRxProcessAKsvWrite, InstancePtr);
XDp_RxSetIntrHdcpBinfoReadHandler(HwDp,
&XHdcp1x_PortDpRxProcessBinfoRead, InstancePtr);
XDp_RxSetIntrHdcpRoReadHandler(HwDp,
&XHdcp1x_PortDpRxProcessRoRead, InstancePtr);
/* Enable interrupts */
IntMask = XDP_RX_INTERRUPT_MASK_HDCP_AKSV_WRITE_MASK;
@ -149,7 +156,7 @@ int XHdcp1x_PortDpRxEnable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpRxDisable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpRxDisable(XHdcp1x *InstancePtr)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 IntMask = 0;
@ -173,7 +180,8 @@ int XHdcp1x_PortDpRxDisable(XHdcp1x *InstancePtr)
Offset = 0;
NumLeft = 256;
while (NumLeft-- > 0) {
RegWrite(InstancePtr, Offset++, &Value, sizeof(Value));
XHdcp1x_PortDpRxWrite(InstancePtr, Offset++, &Value,
sizeof(Value));
}
return (Status);
@ -192,7 +200,7 @@ int XHdcp1x_PortDpRxDisable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpRxInit(XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpRxInit(XHdcp1x *InstancePtr)
{
int Status = XST_SUCCESS;
@ -223,9 +231,15 @@ int XHdcp1x_PortDpRxInit(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpRxRead(const XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortDpRxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 Base = HwDp->Config.BaseAddr;
u32 RegOffset = 0;
int NumRead = 0;
u8 *ReadBuf = Buf;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -235,8 +249,51 @@ int XHdcp1x_PortDpRxRead(const XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Read it */
return (RegRead(InstancePtr, Offset, Buf, BufSize));
/* Determine RegOffset */
RegOffset = XDP_RX_DPCD_HDCP_TABLE;
RegOffset += Offset;
/* Iterate through the reads */
do {
u32 Value = 0;
u32 Alignment = 0;
u32 NumThisTime = 0;
int Idx = 0;
/* Determine Alignment */
Alignment = (RegOffset & 0x03ul);
/* Determine NumThisTime */
NumThisTime = 4;
if (Alignment) {
NumThisTime = (4 - Alignment);
}
if (NumThisTime > BufSize) {
NumThisTime = BufSize;
}
/* Determine Value */
Value = XDprx_ReadReg(Base, (RegOffset & ~0x03ul));
/* Check for adjustment of Value */
if (Alignment) {
Value >>= (8 * Alignment);
}
/* Update theBuf */
for (Idx = 0; Idx < NumThisTime; Idx++) {
ReadBuf[Idx] = (u8)(Value & 0xFFul);
Value >>= 8;
}
/* Update for loop */
ReadBuf += NumThisTime;
BufSize -= NumThisTime;
RegOffset += NumThisTime;
NumRead += NumThisTime;
} while (BufSize > 0);
return (NumRead);
}
/*****************************************************************************/
@ -253,9 +310,15 @@ int XHdcp1x_PortDpRxRead(const XHdcp1x *InstancePtr, u8 Offset,
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpRxWrite(XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortDpRxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 Base = HwDp->Config.BaseAddr;
u32 RegOffset = 0;
int NumWritten = 0;
const u8 *WriteBuf = Buf;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -265,101 +328,8 @@ int XHdcp1x_PortDpRxWrite(XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Write it */
return (RegWrite(InstancePtr, Offset, Buf, BufSize));
}
/*****************************************************************************/
/**
* This reads a register from the HDCP port device.
*
* @param InstancePtr is the device to read from.
* @param Offset is the offset to start reading from.
* @param Buf is the buffer to copy data read.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes read.
*
* @note None.
*
******************************************************************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 Base = HwDp->Config.BaseAddr;
u32 RegOffset = 0;
int NumRead = 0;
/* Determine RegOffset */
RegOffset = XDP_RX_DPCD_HDCP_TABLE;
RegOffset += Offset;
/* Iterate through the reads */
do {
u32 Value = 0;
u32 Alignment = 0;
u32 NumThisTime = 0;
int Idx = 0;
/* Determine Alignment */
Alignment = (RegOffset & 0x03ul);
/* Determine NumThisTime */
NumThisTime = 4;
if (Alignment != 0) {
NumThisTime = (4 - Alignment);
}
if (NumThisTime > BufSize) {
NumThisTime = BufSize;
}
/* Determine Value */
Value = XDprx_ReadReg(Base, (RegOffset & ~0x03ul));
/* Check for adjustment of Value */
if (Alignment != 0)
Value >>= (8 * Alignment);
/* Update theBuf */
for (Idx = 0; Idx < NumThisTime; Idx++) {
Buf[Idx] = (u8) (Value & 0xFFul);
Value >>= 8;
}
/* Update for loop */
Buf += NumThisTime;
BufSize -= NumThisTime;
RegOffset += NumThisTime;
NumRead += NumThisTime;
}
while (BufSize > 0);
return (NumRead);
}
/*****************************************************************************/
/**
* This writes a register from the HDCP port device.
*
* @param InstancePtr is the device to write to.
* @param Offset is the offset to start writing at.
* @param Buf is the buffer containing data to write.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes written.
*
* @note None.
*
******************************************************************************/
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
{
XDprx *HwDp = InstancePtr->Port.PhyIfPtr;
u32 Base = HwDp->Config.BaseAddr;
u32 RegOffset = 0;
int NumWritten = 0;
/* Determine RegOffset */
RegOffset = XDP_RX_DPCD_HDCP_TABLE;
RegOffset = XDP_RX_DPCD_HDCP_TABLE;
RegOffset += Offset;
/* Iterate through the writes */
@ -374,7 +344,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
/* Determine NumThisTime */
NumThisTime = 4;
if (Alignment != 0) {
if (Alignment) {
NumThisTime = (4 - Alignment);
}
if (NumThisTime > BufSize) {
@ -386,7 +356,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
/* Determine Value */
for (Idx = 3; Idx >= 0; Idx--) {
Value <<= 8;
Value |= Buf[Idx];
Value |= WriteBuf[Idx];
}
}
/* Otherwise - must read and modify existing memory */
@ -396,7 +366,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
/* Determine Mask */
Mask = 0xFFu;
if (Alignment != 0) {
if (Alignment) {
Mask <<= (8 * Alignment);
}
@ -405,7 +375,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
/* Update theValue */
for (Idx = 0; Idx < NumThisTime; Idx++) {
Temp = Buf[Idx];
Temp = WriteBuf[Idx];
Temp <<= (8 * (Alignment + Idx));
Value &= ~Mask;
Value |= Temp;
@ -417,12 +387,11 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
XDprx_WriteReg(Base, (RegOffset & ~0x03ul), Value);
/* Update for loop */
Buf += NumThisTime;
WriteBuf += NumThisTime;
BufSize -= NumThisTime;
RegOffset += NumThisTime;
NumWritten += NumThisTime;
}
while (BufSize > 0);
} while (BufSize > 0);
return (NumWritten);
}
@ -440,7 +409,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
* bits as well as kick starts a re-authentication process.
*
******************************************************************************/
static void ProcessAKsvWrite(void *CallbackRef)
static void XHdcp1x_PortDpRxProcessAKsvWrite(void *CallbackRef)
{
XHdcp1x *InstancePtr = CallbackRef;
u8 Value = 0;
@ -452,14 +421,18 @@ static void ProcessAKsvWrite(void *CallbackRef)
InstancePtr->Port.Stats.IntCount++;
/* Clear bit 0 of Ainfo register */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO, &Value, 1);
XHdcp1x_PortDpRxRead(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO,
&Value, 1);
Value &= 0xFEu;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO, &Value, 1);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO,
&Value, 1);
/* Clear bits 3:2 of Bstatus register */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
XHdcp1x_PortDpRxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
Value &= 0xF3u;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
/* Invoke authentication callback if set */
if (InstancePtr->Port.IsAuthCallbackSet) {
@ -480,7 +453,7 @@ static void ProcessAKsvWrite(void *CallbackRef)
* bits within device's Bstatus register.
*
******************************************************************************/
static void ProcessRoRead(void *CallbackRef)
static void XHdcp1x_PortDpRxProcessRoRead(void *CallbackRef)
{
XHdcp1x *InstancePtr = CallbackRef;
u8 Value = 0;
@ -492,9 +465,11 @@ static void ProcessRoRead(void *CallbackRef)
InstancePtr->Port.Stats.IntCount++;
/* Clear bit 1 of Bstatus register */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
XHdcp1x_PortDpRxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
Value &= 0xFDu;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
}
/*****************************************************************************/
@ -510,7 +485,7 @@ static void ProcessRoRead(void *CallbackRef)
* bits within device's Bstatus register.
*
******************************************************************************/
static void ProcessBinfoRead(void *CallbackRef)
static void XHdcp1x_PortDpRxProcessBinfoRead(void *CallbackRef)
{
XHdcp1x *InstancePtr = CallbackRef;
u8 Value = 0;
@ -521,15 +496,17 @@ static void ProcessBinfoRead(void *CallbackRef)
/* Update statistics */
InstancePtr->Port.Stats.IntCount++;
/* Clear bit 0 of Bstatus register */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
/* Clear bit 0 of Bstatus register */
XHdcp1x_PortDpRxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
Value &= 0xFEu;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
XHdcp1x_PortDpRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
}
/*****************************************************************************/
/**
* This tables defines adaptor for DP RX HDCP port driver
* This tables defines adaptor for DP RX HDCP port driver
*
******************************************************************************/
const XHdcp1x_PortPhyIfAdaptor XHdcp1x_PortDpRxAdaptor =

160
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_dp_tx.c
View file

@ -60,16 +60,28 @@
/************************** Constant Definitions *****************************/
/* Adaptor definition at the end of this file. */
const XHdcp1x_PortPhyIfAdaptor XHdcp1x_PortDpTxAdaptor;
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/*************************** Function Prototypes *****************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize);
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
u32 BufSize);
static void CheckForRxStatusChange(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpTxEnable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpTxDisable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpTxInit(XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpTxIsCapable(const XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpTxIsRepeater(const XHdcp1x *InstancePtr);
static int XHdcp1x_PortDpTxGetRepeaterInfo(const XHdcp1x *InstancePtr,
u16 *Info);
static int XHdcp1x_PortDpTxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize);
static int XHdcp1x_PortDpTxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize);
static void XHdcp1x_PortDpTxIntrHandler(XHdcp1x *InstancePtr, u32 IntCause);
static void XHdcp1x_CheckForRxStatusChange(XHdcp1x *InstancePtr);
/************************** Function Definitions *****************************/
@ -86,7 +98,7 @@ static void CheckForRxStatusChange(XHdcp1x *InstancePtr);
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxEnable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpTxEnable(XHdcp1x *InstancePtr)
{
u8 Value = 0;
int Status = XST_NOT_ENABLED;
@ -96,7 +108,8 @@ int XHdcp1x_PortDpTxEnable(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr->Port.PhyIfPtr != NULL);
/* Read anything to ensure that the remote end is present */
if ((RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1)) > 0) {
if ((XHdcp1x_PortDpTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1)) > 0) {
Status = XST_SUCCESS;
}
@ -115,7 +128,7 @@ int XHdcp1x_PortDpTxEnable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxDisable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpTxDisable(XHdcp1x *InstancePtr)
{
int Status = XST_SUCCESS;
@ -140,7 +153,7 @@ int XHdcp1x_PortDpTxDisable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxInit(XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpTxInit(XHdcp1x *InstancePtr)
{
int Status = XST_SUCCESS;
u32 Base = 0;
@ -175,7 +188,7 @@ int XHdcp1x_PortDpTxInit(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxIsCapable(const XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpTxIsCapable(const XHdcp1x *InstancePtr)
{
u8 Value = 0;
int IsCapable = FALSE;
@ -184,7 +197,8 @@ int XHdcp1x_PortDpTxIsCapable(const XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Check for hdcp capable */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1) > 0) {
if (XHdcp1x_PortDpTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1) > 0) {
if ((Value & XHDCP1X_PORT_BIT_BCAPS_HDCP_CAPABLE) != 0) {
IsCapable = TRUE;
}
@ -205,7 +219,7 @@ int XHdcp1x_PortDpTxIsCapable(const XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxIsRepeater(const XHdcp1x *InstancePtr)
static int XHdcp1x_PortDpTxIsRepeater(const XHdcp1x *InstancePtr)
{
u8 Value = 0;
int IsRepeater = FALSE;
@ -214,7 +228,8 @@ int XHdcp1x_PortDpTxIsRepeater(const XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Check for repeater */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1) > 0) {
if (XHdcp1x_PortDpTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1) > 0) {
if ((Value & XHDCP1X_PORT_BIT_BCAPS_REPEATER) != 0) {
IsRepeater = TRUE;
}
@ -238,7 +253,8 @@ int XHdcp1x_PortDpTxIsRepeater(const XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
static int XHdcp1x_PortDpTxGetRepeaterInfo(const XHdcp1x *InstancePtr,
u16 *Info)
{
u8 Value = 0;
int Status = XST_SUCCESS;
@ -248,12 +264,13 @@ int XHdcp1x_PortDpTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
Xil_AssertNonvoid(Info != NULL);
/* Read the remote capabilities */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1) > 0) {
if (XHdcp1x_PortDpTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1) > 0) {
/* Check for repeater */
if ((Value & XHDCP1X_PORT_BIT_BCAPS_REPEATER) != 0) {
/* Read the remote status */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1);
XHdcp1x_PortDpTxRead(InstancePtr,
XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1);
/* Check for ready */
if ((Value & XHDCP1X_PORT_BIT_BSTATUS_READY) != 0) {
@ -261,8 +278,8 @@ int XHdcp1x_PortDpTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
u16 U16Value = 0;
/* Read the Binfo */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BINFO,
Buf, 2);
XHdcp1x_PortDpTxRead(InstancePtr,
XHDCP1X_PORT_OFFSET_BINFO, Buf, 2);
/* Determine U16Value */
XHDCP1X_PORT_BUF_TO_UINT(U16Value, Buf, 16);
@ -299,9 +316,13 @@ int XHdcp1x_PortDpTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxRead(const XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortDpTxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize)
{
XDptx *DpHw = InstancePtr->Port.PhyIfPtr;
u32 Address = 0;
int NumRead = 0;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -311,8 +332,16 @@ int XHdcp1x_PortDpTxRead(const XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Determine Address */
Address = Offset;
Address += 0x68000u;
/* Read it */
return (RegRead(InstancePtr, Offset, Buf, BufSize));
if (XDp_TxAuxRead(DpHw, Address, BufSize, Buf) == XST_SUCCESS) {
NumRead = BufSize;
}
return (NumRead);
}
/*****************************************************************************/
@ -329,9 +358,13 @@ int XHdcp1x_PortDpTxRead(const XHdcp1x *InstancePtr, u8 Offset,
* @note None.
*
******************************************************************************/
int XHdcp1x_PortDpTxWrite(XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortDpTxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize)
{
XDptx *DpHw = InstancePtr->Port.PhyIfPtr;
u32 Address = 0;
int NumWritten = 0;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -341,8 +374,16 @@ int XHdcp1x_PortDpTxWrite(XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Determine Address */
Address = Offset;
Address += 0x68000u;
/* Write it */
return (RegWrite(InstancePtr, Offset, Buf, BufSize));
if (XDp_TxAuxWrite(DpHw, Address, BufSize, (u8 *)Buf) == XST_SUCCESS) {
NumWritten = BufSize;
}
return (NumWritten);
}
/*****************************************************************************/
@ -357,7 +398,7 @@ int XHdcp1x_PortDpTxWrite(XHdcp1x *InstancePtr, u8 Offset,
* @note None.
*
******************************************************************************/
void XHdcp1x_PortDpTxIntrHandler(XHdcp1x *InstancePtr, u32 IntCause)
static void XHdcp1x_PortDpTxIntrHandler(XHdcp1x *InstancePtr, u32 IntCause)
{
int HpdDetected = 0;
@ -374,76 +415,10 @@ void XHdcp1x_PortDpTxIntrHandler(XHdcp1x *InstancePtr, u32 IntCause)
/* Check for HPD irq */
if (HpdDetected) {
CheckForRxStatusChange(InstancePtr);
XHdcp1x_CheckForRxStatusChange(InstancePtr);
}
}
/*****************************************************************************/
/**
* This reads a register from the HDCP port device.
*
* @param InstancePtr is the device to read from.
* @param Offset is the offset to start reading from.
* @param Buf is the buffer to copy the data read.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes read.
*
* @note None.
*
******************************************************************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf,
u32 BufSize)
{
XDptx *DpHw = InstancePtr->Port.PhyIfPtr;
u32 Address = 0;
int NumRead = 0;
/* Determine Address */
Address = Offset;
Address += 0x68000u;
/* Read it */
if (XDp_TxAuxRead(DpHw, Address, BufSize, Buf) == XST_SUCCESS) {
NumRead = BufSize;
}
return (NumRead);
}
/*****************************************************************************/
/**
* This writes a register from the HDCP port device.
*
* @param InstancePtr is the device to write to.
* @param Offset is the offset to start writing at.
* @param Buf is the buffer containing the data to write.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes written.
*
* @note None.
*
******************************************************************************/
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
u32 BufSize)
{
XDptx *DpHw = InstancePtr->Port.PhyIfPtr;
u32 Address = 0;
int NumWritten = 0;
/* Determine Address */
Address = Offset;
Address += 0x68000u;
/* Write it */
if (XDp_TxAuxWrite(DpHw, Address, BufSize, (u8 *)Buf) == XST_SUCCESS) {
NumWritten = BufSize;
}
return (NumWritten);
}
/*****************************************************************************/
/**
* This function checks for a link integrity check failure or re-auth request.
@ -455,12 +430,13 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
* @note None.
*
******************************************************************************/
static void CheckForRxStatusChange(XHdcp1x *InstancePtr)
static void XHdcp1x_CheckForRxStatusChange(XHdcp1x *InstancePtr)
{
u8 Value = 0;
/* Read the Bstatus register */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, &Value, 1) > 0) {
if (XHdcp1x_PortDpTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
&Value, 1) > 0) {
u8 ReauthMask = 0;
/* Determine ReauthMask */

132
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_hdmi_rx.c
View file

@ -61,16 +61,23 @@
/************************** Constant Definitions *****************************/
/* Adaptor definition at the end of this file. */
const XHdcp1x_PortPhyIfAdaptor XHdcp1x_PortHdmiRxAdaptor;
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/*************************** Function Prototypes *****************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize);
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
u32 BufSize);
static void ProcessAKsvWrite(void *CallbackRef);
static int XHdcp1x_PortHdmiRxEnable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiRxDisable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiRxInit(XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiRxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize);
static int XHdcp1x_PortHdmiRxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize);
static void XHdcp1x_ProcessAKsvWrite(void *CallbackRef);
/************************** Function Definitions *****************************/
@ -86,7 +93,7 @@ static void ProcessAKsvWrite(void *CallbackRef);
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiRxEnable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiRxEnable(XHdcp1x *InstancePtr)
{
XHdmi_Rx *HdmiRx = NULL;
u8 Buf[4];
@ -102,24 +109,25 @@ int XHdcp1x_PortHdmiRxEnable(XHdcp1x *InstancePtr)
/* Initialize the Bstatus register */
memset(Buf, 0, 4);
Buf[1] |= (XHDCP1X_PORT_BIT_BSTATUS_HDMI_MODE >> 8);
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS, Buf, 2);
XHdcp1x_PortHdmiRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
Buf, 2);
/* Initialize the Bcaps register */
memset(Buf, 0, 4);
Buf[0] |= XHDCP1X_PORT_BIT_BCAPS_HDMI;
Buf[0] |= XHDCP1X_PORT_BIT_BCAPS_FAST_REAUTH;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, Buf, 1);
XHdcp1x_PortHdmiRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, Buf, 1);
/* Initialize some debug registers */
Buf[0] = 0xDE;
Buf[1] = 0xAD;
Buf[2] = 0xBE;
Buf[3] = 0xEF;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_DBG, Buf, 4);
XHdcp1x_PortHdmiRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_DBG, Buf, 4);
/* Bind for interrupt callback */
XHdmiRx_SetCallback(HdmiRx, XHDMI_RX_HANDLER_HDCP,
ProcessAKsvWrite, InstancePtr);
XHdcp1x_ProcessAKsvWrite, InstancePtr);
/* Enable the hdcp slave over the ddc */
XHdmiRx_DdcHdcpEnable(HdmiRx);
@ -140,12 +148,12 @@ int XHdcp1x_PortHdmiRxEnable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiRxDisable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiRxDisable(XHdcp1x *InstancePtr)
{
u8 Offset = 0;
u8 U8Value = 0;
u8 Value = 0;
u32 HdmiRxBase = 0;
u32 Value;
u32 RegValue;
int NumLeft = 0;
int Status = XST_SUCCESS;
@ -158,16 +166,16 @@ int XHdcp1x_PortHdmiRxDisable(XHdcp1x *InstancePtr)
((XHdmi_Rx *)InstancePtr->Port.PhyIfPtr)->Config.BaseAddress;
/* Disable the hdcp ddc slave */
Value = XHdmiRx_ReadReg(HdmiRxBase, XHDMI_RX_DDC_CTRL_SET_OFFSET);
Value &= ~XHDMI_RX_DDC_CTRL_HDCP_EN_MASK;
XHdmiRx_WriteReg(HdmiRxBase, XHDMI_RX_DDC_CTRL_SET_OFFSET, Value);
RegValue = XHdmiRx_ReadReg(HdmiRxBase, XHDMI_RX_DDC_CTRL_SET_OFFSET);
RegValue &= ~XHDMI_RX_DDC_CTRL_HDCP_EN_MASK;
XHdmiRx_WriteReg(HdmiRxBase, XHDMI_RX_DDC_CTRL_SET_OFFSET, RegValue);
/* Clear the hdcp registers */
U8Value = 0;
Value = 0;
Offset = 0;
NumLeft = 256;
while (NumLeft-- > 0) {
RegWrite(InstancePtr, Offset++, &U8Value, 1);
XHdcp1x_PortHdmiRxWrite(InstancePtr, Offset++, &Value, 1);
}
return (Status);
@ -186,7 +194,7 @@ int XHdcp1x_PortHdmiRxDisable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiRxInit(XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiRxInit(XHdcp1x *InstancePtr)
{
int Status = XST_SUCCESS;
@ -217,9 +225,13 @@ int XHdcp1x_PortHdmiRxInit(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiRxRead(const XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortHdmiRxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize)
{
XHdmi_Rx *HdmiRx = InstancePtr->Port.PhyIfPtr;
u32 NumLeft = BufSize;
u8 *ReadBuf = Buf;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -229,8 +241,15 @@ int XHdcp1x_PortHdmiRxRead(const XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Read it */
return (RegRead(InstancePtr, Offset, Buf, BufSize));
/* Write the offset */
XHdmiRx_DdcHdcpSetAddress(HdmiRx, Offset);
/* Read the buffer */
while (NumLeft-- > 0) {
*ReadBuf++ = XHdmiRx_DdcHdcpReadData(HdmiRx);
}
return ((int)BufSize);
}
/*****************************************************************************/
@ -247,9 +266,13 @@ int XHdcp1x_PortHdmiRxRead(const XHdcp1x *InstancePtr, u8 Offset,
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiRxWrite(XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortHdmiRxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize)
{
XHdmi_Rx *HdmiRx = InstancePtr->Port.PhyIfPtr;
u32 NumLeft = BufSize;
const u8 *WriteBuf = Buf;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -259,68 +282,15 @@ int XHdcp1x_PortHdmiRxWrite(XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Write it */
return (RegWrite(InstancePtr, Offset, Buf, BufSize));
}
/*****************************************************************************/
/**
* This reads a register from the HDCP port device.
*
* @param InstancePtr is the device to read from.
* @param Offset is the offset to start reading from.
* @param Buf is the buffer to copy the data read.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes read.
*
* @note None.
*
******************************************************************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize)
{
XHdmi_Rx *HdmiRx = InstancePtr->Port.PhyIfPtr;
u32 NumLeft = BufSize;
/* Write the offset */
XHdmiRx_DdcHdcpSetAddress(HdmiRx, Offset);
/* Read the buffer */
while (NumLeft-- > 0) {
*Buf++ = XHdmiRx_DdcHdcpReadData(HdmiRx);
}
return ((int) BufSize);
}
/*****************************************************************************/
/**
* This writes a register from the HDCP port device.
*
* @param InstancePtr is the device to write to.
* @param Offset is the offset to start writing at.
* @param Buf is the buffer containing the data to write.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes written.
*
* @note None.
*
******************************************************************************/
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
{
XHdmi_Rx *HdmiRx = InstancePtr->Port.PhyIfPtr;
u32 NumLeft = BufSize;
/* Write the offset */
XHdmiRx_DdcHdcpSetAddress(HdmiRx, Offset);
/* Write the buffer */
while (NumLeft-- > 0) {
XHdmiRx_DdcHdcpWriteData(HdmiRx, *Buf++);
XHdmiRx_DdcHdcpWriteData(HdmiRx, *WriteBuf++);
}
return ((int) BufSize);
return ((int)BufSize);
}
/*****************************************************************************/
@ -336,7 +306,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
* bits as well as kick starts a re-authentication process.
*
******************************************************************************/
static void ProcessAKsvWrite(void *CallbackRef)
static void XHdcp1x_ProcessAKsvWrite(void *CallbackRef)
{
XHdcp1x *InstancePtr = CallbackRef;
u8 Value = 0;
@ -345,9 +315,11 @@ static void ProcessAKsvWrite(void *CallbackRef)
InstancePtr->Port.Stats.IntCount++;
/* Clear bit 1 of the Ainfo register */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO, &Value, 1);
XHdcp1x_PortHdmiRxRead(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO,
&Value, 1);
Value &= 0xFDu;
RegWrite(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO, &Value, 1);
XHdcp1x_PortHdmiRxWrite(InstancePtr, XHDCP1X_PORT_OFFSET_AINFO,
&Value, 1);
/* Invoke authentication callback if set */
if (InstancePtr->Port.IsAuthCallbackSet) {

155
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port_hdmi_tx.c
View file

@ -61,7 +61,10 @@
/************************** Constant Definitions *****************************/
#define WRITE_CHUNK_SZ (8)
#define XHDCP1X_WRITE_CHUNK_SZ (8)
/* Adaptor definition at the end of this file. */
const XHdcp1x_PortPhyIfAdaptor XHdcp1x_PortHdmiTxAdaptor;
/**************************** Type Definitions *******************************/
@ -69,9 +72,17 @@
/*************************** Function Prototypes *****************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize);
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
u32 BufSize);
static int XHdcp1x_PortHdmiTxEnable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiTxDisable(XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiTxInit(XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiTxIsCapable(const XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiTxIsRepeater(const XHdcp1x *InstancePtr);
static int XHdcp1x_PortHdmiTxGetRepeaterInfo(const XHdcp1x *InstancePtr,
u16 *Info);
static int XHdcp1x_PortHdmiTxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize);
static int XHdcp1x_PortHdmiTxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize);
/************************** Function Definitions *****************************/
@ -87,7 +98,7 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf,
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxEnable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiTxEnable(XHdcp1x *InstancePtr)
{
u8 Value = 0;
int Status = XST_NOT_ENABLED;
@ -97,7 +108,8 @@ int XHdcp1x_PortHdmiTxEnable(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr->Port.PhyIfPtr != NULL);
/* Read anything to ensure that the remote end is present */
if ((RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1)) > 0) {
if ((XHdcp1x_PortHdmiTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1)) > 0) {
Status = XST_SUCCESS;
}
@ -116,7 +128,7 @@ int XHdcp1x_PortHdmiTxEnable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxDisable(XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiTxDisable(XHdcp1x *InstancePtr)
{
int Status = XST_SUCCESS;
@ -141,7 +153,7 @@ int XHdcp1x_PortHdmiTxDisable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxInit(XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiTxInit(XHdcp1x *InstancePtr)
{
int Status = XST_SUCCESS;
@ -168,7 +180,7 @@ int XHdcp1x_PortHdmiTxInit(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxIsCapable(const XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiTxIsCapable(const XHdcp1x *InstancePtr)
{
u8 Value = 0;
int IsCapable = FALSE;
@ -177,7 +189,8 @@ int XHdcp1x_PortHdmiTxIsCapable(const XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Check for hdcp capable */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1) > 0) {
if (XHdcp1x_PortHdmiTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1) > 0) {
if ((Value & XHDCP1X_PORT_BIT_BCAPS_HDMI) != 0) {
IsCapable = TRUE;
}
@ -197,7 +210,7 @@ int XHdcp1x_PortHdmiTxIsCapable(const XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxIsRepeater(const XHdcp1x *InstancePtr)
static int XHdcp1x_PortHdmiTxIsRepeater(const XHdcp1x *InstancePtr)
{
u8 Value = 0;
int IsRepeater = FALSE;
@ -206,7 +219,8 @@ int XHdcp1x_PortHdmiTxIsRepeater(const XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Check for repeater */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1) > 0) {
if (XHdcp1x_PortHdmiTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1) > 0) {
if ((Value & XHDCP1X_PORT_BIT_BCAPS_REPEATER) != 0) {
IsRepeater = TRUE;
}
@ -229,7 +243,8 @@ int XHdcp1x_PortHdmiTxIsRepeater(const XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
static int XHdcp1x_PortHdmiTxGetRepeaterInfo(const XHdcp1x *InstancePtr,
u16 *Info)
{
u8 Value = 0;
int Status = XST_SUCCESS;
@ -239,7 +254,8 @@ int XHdcp1x_PortHdmiTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
Xil_AssertNonvoid(Info != NULL);
/* Read the remote capabilities */
if (RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS, &Value, 1) > 0) {
if (XHdcp1x_PortHdmiTxRead(InstancePtr, XHDCP1X_PORT_OFFSET_BCAPS,
&Value, 1) > 0) {
u8 ReadyMask = 0;
/* Determine ReadyMask */
@ -252,8 +268,8 @@ int XHdcp1x_PortHdmiTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
u16 U16Value = 0;
/* Read the Bstatus */
RegRead(InstancePtr, XHDCP1X_PORT_OFFSET_BSTATUS,
Buf, 2);
XHdcp1x_PortHdmiTxRead(InstancePtr,
XHDCP1X_PORT_OFFSET_BSTATUS, Buf, 2);
/* Determine Value */
XHDCP1X_PORT_BUF_TO_UINT(U16Value, Buf, 16);
@ -286,9 +302,14 @@ int XHdcp1x_PortHdmiTxGetRepeaterInfo(const XHdcp1x *InstancePtr, u16 *Info)
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxRead(const XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortHdmiTxRead(const XHdcp1x *InstancePtr, u8 Offset,
void *Buf, u32 BufSize)
{
XHdmi_Tx *HdmiTx = InstancePtr->Port.PhyIfPtr;
u8 Slave = 0x3Au;
int NumRead = 0;
u8 *ReadBuf = Buf;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -298,8 +319,22 @@ int XHdcp1x_PortHdmiTxRead(const XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Read it */
return (RegRead(InstancePtr, Offset, Buf, BufSize));
/* Write the address and check for failure */
if (XHdmiTx_DdcWrite(HdmiTx, Slave, 1, &Offset, FALSE)
!= XST_SUCCESS) {
NumRead = -1;
}
/* Read the data back and check for failure */
else if (XHdmiTx_DdcRead(HdmiTx, Slave, BufSize, ReadBuf, TRUE)
!= XST_SUCCESS) {
NumRead = -2;
}
/* Success - just update NumRead */
else {
NumRead = (int)BufSize;
}
return (NumRead);
}
/*****************************************************************************/
@ -316,9 +351,16 @@ int XHdcp1x_PortHdmiTxRead(const XHdcp1x *InstancePtr, u8 Offset,
* @note None.
*
******************************************************************************/
int XHdcp1x_PortHdmiTxWrite(XHdcp1x *InstancePtr, u8 Offset,
static int XHdcp1x_PortHdmiTxWrite(XHdcp1x *InstancePtr, u8 Offset,
const void *Buf, u32 BufSize)
{
XHdmi_Tx *HdmiTx = InstancePtr->Port.PhyIfPtr;
u8 Slave = 0x3Au;
u8 TxBuf[XHDCP1X_WRITE_CHUNK_SZ + 1];
int NumWritten = 0;
int ThisTime = 0;
const u8 *WriteBuf = Buf;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(Buf != NULL);
@ -328,81 +370,17 @@ int XHdcp1x_PortHdmiTxWrite(XHdcp1x *InstancePtr, u8 Offset,
BufSize = (0x100u - Offset);
}
/* Write it */
return (RegWrite(InstancePtr, Offset, Buf, BufSize));
}
/*****************************************************************************/
/**
* This reads a register from the HDCP port device.
*
* @param InstancePtr is the device to read from.
* @param Offset is the offset to start reading from.
* @param Buf is the buffer to copy the data read.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes read.
*
* @note None.
*
******************************************************************************/
static int RegRead(const XHdcp1x *InstancePtr, u8 Offset, u8 *Buf, u32 BufSize)
{
XHdmi_Tx *HdmiTx = InstancePtr->Port.PhyIfPtr;
u8 Slave = 0x3Au;
int NumRead = 0;
/* Write the address and check for failure */
if (XHdmiTx_DdcWrite(HdmiTx, Slave, 1, &Offset, FALSE)
!= XST_SUCCESS) {
NumRead = -1;
}
/* Read the data back and check for failure */
else if (XHdmiTx_DdcRead(HdmiTx, Slave, BufSize, Buf, TRUE)
!= XST_SUCCESS) {
NumRead = -2;
}
/* Success - just update NumRead */
else {
NumRead = (int) BufSize;
}
return (NumRead);
}
/*****************************************************************************/
/**
* This writes a register from the HDCP port device.
*
* @param InstancePtr is the device to write to.
* @param Offset is the offset to start writing at.
* @param Buf is the buffer containing the data to write.
* @param BufSize is the size of the buffer.
*
* @return The number of bytes written.
*
* @note None.
*
******************************************************************************/
static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
{
XHdmi_Tx *HdmiTx = InstancePtr->Port.PhyIfPtr;
u8 Slave = 0x3Au;
u8 TxBuf[WRITE_CHUNK_SZ + 1];
int NumWritten = 0;
int ThisTime = 0;
/* Iterate through the buffer */
do {
/* Determine ThisTime */
ThisTime = WRITE_CHUNK_SZ;
ThisTime = XHDCP1X_WRITE_CHUNK_SZ;
if (ThisTime > BufSize) {
ThisTime = BufSize;
}
/* Format TxBuf */
TxBuf[0] = Offset;
memcpy(&(TxBuf[1]), Buf, ThisTime);
memcpy(&(TxBuf[1]), WriteBuf, ThisTime);
/* Write the TxBuf */
if (XHdmiTx_DdcWrite(HdmiTx, Slave, (ThisTime + 1), TxBuf, TRUE)
@ -414,10 +392,9 @@ static int RegWrite(XHdcp1x *InstancePtr, u8 Offset, const u8 *Buf, u32 BufSize)
/* Update for loop */
NumWritten += ThisTime;
Buf += ThisTime;
WriteBuf += ThisTime;
BufSize -= ThisTime;
}
while ((BufSize != 0) && (NumWritten > 0));
} while ((BufSize != 0) && (NumWritten > 0));
/* Return */
return (NumWritten);

460
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_rx.c
View file

@ -67,29 +67,30 @@
/************************** Constant Definitions *****************************/
#define FLAG_PHY_UP (1u << 0) /**< Flag to track physical state */
#define XVPHY_FLAG_PHY_UP (1u << 0) /**< Flag to track physical state */
/**************************** Type Definitions *******************************/
typedef enum {
EVENT_NULL,
EVENT_AUTHENTICATE,
EVENT_CHECK,
EVENT_DISABLE,
EVENT_ENABLE,
EVENT_PHYDOWN,
EVENT_PHYUP,
EVENT_POLL,
EVENT_UPDATERi,
} tEvent;
typedef enum {
STATE_DISABLED,
STATE_UNAUTHENTICATED,
STATE_COMPUTATIONS,
STATE_AUTHENTICATED,
STATE_LINKINTEGRITYFAILED,
STATE_PHYDOWN,
} tState;
XHDCP1X_EVENT_NULL,
XHDCP1X_EVENT_AUTHENTICATE,
XHDCP1X_EVENT_CHECK,
XHDCP1X_EVENT_DISABLE,
XHDCP1X_EVENT_ENABLE,
XHDCP1X_EVENT_PHYDOWN,
XHDCP1X_EVENT_PHYUP,
XHDCP1X_EVENT_POLL,
XHDCP1X_EVENT_UPDATERi,
} XHdcp1x_EventType;
typedef enum {
XHDCP1X_STATE_DISABLED,
XHDCP1X_STATE_UNAUTHENTICATED,
XHDCP1X_STATE_COMPUTATIONS,
XHDCP1X_STATE_AUTHENTICATED,
XHDCP1X_STATE_LINKINTEGRITYFAILED,
XHDCP1X_STATE_PHYDOWN,
} XHdcp1x_StateType;
/***************** Macros (Inline Functions) Definitions *********************/
@ -121,38 +122,42 @@ typedef enum {
/*************************** Function Prototypes *****************************/
static void DebugLog(const XHdcp1x *InstancePtr, const char *LogMsg);
static void PostEvent(XHdcp1x *InstancePtr, tEvent Event);
static void AuthCallback(void *Parameter);
static void LinkFailCallback(void *Parameter);
static void RiUpdateCallback(void *Parameter);
static void SetCheckLinkState(XHdcp1x *InstancePtr, int IsEnabled);
static void Enable(XHdcp1x *InstancePtr);
static void Disable(XHdcp1x *InstancePtr);
static void StartComputations(XHdcp1x *InstancePtr, tState *NextStatePtr);
static void PollForComputations(XHdcp1x *InstancePtr, tState *NextStatePtr);
static void UpdateRi(XHdcp1x *InstancePtr, tState *NextStatePtr);
static void CheckLinkIntegrity(XHdcp1x *InstancePtr, tState *NextStatePtr);
static void ReportLinkIntegrityFailure(XHdcp1x *InstancePtr,
tState *NextStatePtr);
static void RunDisabledState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr);
static void RunUnauthenticatedState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr);
static void RunComputationsState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr);
static void RunAuthenticatedState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr);
static void RunLinkIntegrityFailedState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr);
static void RunPhysicalLayerDownState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr);
static void EnterState(XHdcp1x *InstancePtr, tState State,
tState *NextStatePtr);
static void ExitState(XHdcp1x *InstancePtr, tState State);
static void DoTheState(XHdcp1x *InstancePtr, tEvent Event);
static void ProcessPending(XHdcp1x *InstancePtr);
static const char *StateToString(tState State);
static void XHdcp1x_RxDebugLog(const XHdcp1x *InstancePtr, const char *LogMsg);
static void XHdcp1x_RxPostEvent(XHdcp1x *InstancePtr, XHdcp1x_EventType Event);
static void XHdcp1x_RxAuthCallback(void *Parameter);
static void XHdcp1x_RxLinkFailCallback(void *Parameter);
static void XHdcp1x_RxRiUpdateCallback(void *Parameter);
static void XHdcp1x_RxSetCheckLinkState(XHdcp1x *InstancePtr, int IsEnabled);
static void XHdcp1x_RxEnableState(XHdcp1x *InstancePtr);
static void XHdcp1x_RxDisableState(XHdcp1x *InstancePtr);
static void XHdcp1x_RxStartComputations(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxPollForComputations(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxUpdateRi(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxCheckLinkIntegrity(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxReportLinkIntegrityFailure(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxRunDisabledState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxRunUnauthenticatedState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxRunComputationsState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxRunAuthenticatedState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxRunLinkIntegrityFailedState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxRunPhysicalLayerDownState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxEnterState(XHdcp1x *InstancePtr, XHdcp1x_StateType State,
XHdcp1x_StateType *NextStatePtr);
static void XHdcp1x_RxExitState(XHdcp1x *InstancePtr, XHdcp1x_StateType State);
static void XHdcp1x_RxDoTheState(XHdcp1x *InstancePtr, XHdcp1x_EventType Event);
static void XHdcp1x_RxProcessPending(XHdcp1x *InstancePtr);
static const char *XHdcp1x_RxStateToString(XHdcp1x_StateType State);
/************************** Function Definitions *****************************/
@ -169,13 +174,13 @@ static const char *StateToString(tState State);
******************************************************************************/
void XHdcp1x_RxInit(XHdcp1x *InstancePtr)
{
tState DummyState = STATE_DISABLED;
XHdcp1x_StateType DummyState = XHDCP1X_STATE_DISABLED;
/* Update theHandler */
InstancePtr->Rx.PendingEvents = 0;
/* Kick the state machine */
EnterState(InstancePtr, STATE_DISABLED, &DummyState);
XHdcp1x_RxEnterState(InstancePtr, XHDCP1X_STATE_DISABLED, &DummyState);
}
/*****************************************************************************/
@ -198,10 +203,10 @@ int XHdcp1x_RxPoll(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Process any pending events */
ProcessPending(InstancePtr);
XHdcp1x_RxProcessPending(InstancePtr);
/* Poll it */
DoTheState(InstancePtr, EVENT_POLL);
XHdcp1x_RxDoTheState(InstancePtr, XHDCP1X_EVENT_POLL);
return (Status);
}
@ -226,8 +231,8 @@ int XHdcp1x_RxReset(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Reset it */
PostEvent(InstancePtr, EVENT_DISABLE);
PostEvent(InstancePtr, EVENT_ENABLE);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_DISABLE);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_ENABLE);
return (Status);
}
@ -252,7 +257,7 @@ int XHdcp1x_RxEnable(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Post it */
PostEvent(InstancePtr, EVENT_ENABLE);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_ENABLE);
return (Status);
}
@ -277,7 +282,7 @@ int XHdcp1x_RxDisable(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Post it */
PostEvent(InstancePtr, EVENT_DISABLE);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_DISABLE);
return (Status);
}
@ -298,18 +303,18 @@ int XHdcp1x_RxDisable(XHdcp1x *InstancePtr)
int XHdcp1x_RxSetPhysicalState(XHdcp1x *InstancePtr, int IsUp)
{
int Status = XST_SUCCESS;
tEvent Event = EVENT_PHYDOWN;
XHdcp1x_EventType Event = XHDCP1X_EVENT_PHYDOWN;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
/* Determine Event */
if (IsUp) {
Event = EVENT_PHYUP;
Event = XHDCP1X_EVENT_PHYUP;
}
/* Post it */
PostEvent(InstancePtr, Event);
XHdcp1x_RxPostEvent(InstancePtr, Event);
return (Status);
}
@ -357,7 +362,7 @@ int XHdcp1x_RxAuthenticate(XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Post the re-authentication request */
PostEvent(InstancePtr, EVENT_AUTHENTICATE);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_AUTHENTICATE);
return (Status);
}
@ -381,7 +386,7 @@ int XHdcp1x_RxIsAuthenticated(const XHdcp1x *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
/* Determine IsAuthenticated */
if (InstancePtr->Rx.CurrentState == STATE_AUTHENTICATED) {
if (InstancePtr->Rx.CurrentState == XHDCP1X_STATE_AUTHENTICATED) {
IsAuthenticated = TRUE;
}
@ -436,37 +441,37 @@ int XHdcp1x_RxInfo(const XHdcp1x *InstancePtr)
XHDCP1X_DEBUG_PRINTF("dp-rx\r\n");
}
XHDCP1X_DEBUG_PRINTF("Current State: %s\r\n",
StateToString(InstancePtr->Rx.CurrentState));
XHdcp1x_RxStateToString(InstancePtr->Rx.CurrentState));
XHDCP1X_DEBUG_PRINTF("Previous State: %s\r\n",
StateToString(InstancePtr->Rx.PreviousState));
XHdcp1x_RxStateToString(InstancePtr->Rx.PreviousState));
XHDCP1X_DEBUG_PRINTF("Flags: %04X\r\n",
InstancePtr->Rx.Flags);
InstancePtr->Rx.Flags);
Version = XHdcp1x_GetDriverVersion();
XHDCP1X_DEBUG_PRINTF("Driver Version: %d.%02d.%02d\r\n",
((Version >> 16) &0xFFFFu), ((Version >> 8) & 0xFFu),
(Version & 0xFFu));
((Version >> 16) &0xFFFFu), ((Version >> 8) & 0xFFu),
(Version & 0xFFu));
Version = XHdcp1x_CipherGetVersion(InstancePtr);
XHDCP1X_DEBUG_PRINTF("Cipher Version: %d.%02d.%02d\r\n",
((Version >> 16) &0xFFFFu), ((Version >> 8) & 0xFFu),
(Version & 0xFFu));
((Version >> 16) &0xFFFFu), ((Version >> 8) & 0xFFu),
(Version & 0xFFu));
XHDCP1X_DEBUG_PRINTF("\r\n");
XHDCP1X_DEBUG_PRINTF("Rx Stats\r\n");
XHDCP1X_DEBUG_PRINTF("Auth Attempts: %d\r\n",
InstancePtr->Rx.Stats.AuthAttempts);
InstancePtr->Rx.Stats.AuthAttempts);
XHDCP1X_DEBUG_PRINTF("Link Failures: %d\r\n",
InstancePtr->Rx.Stats.LinkFailures);
InstancePtr->Rx.Stats.LinkFailures);
XHDCP1X_DEBUG_PRINTF("Ri Updates: %d\r\n",
InstancePtr->Rx.Stats.RiUpdates);
InstancePtr->Rx.Stats.RiUpdates);
XHDCP1X_DEBUG_PRINTF("\r\n");
XHDCP1X_DEBUG_PRINTF("Cipher Stats\r\n");
XHDCP1X_DEBUG_PRINTF("Int Count: %d\r\n",
InstancePtr->Cipher.Stats.IntCount);
InstancePtr->Cipher.Stats.IntCount);
XHDCP1X_DEBUG_PRINTF("\r\n");
XHDCP1X_DEBUG_PRINTF("Port Stats\r\n");
XHDCP1X_DEBUG_PRINTF("Int Count: %d\r\n",
InstancePtr->Port.Stats.IntCount);
InstancePtr->Port.Stats.IntCount);
return (XST_SUCCESS);
}
@ -483,7 +488,7 @@ int XHdcp1x_RxInfo(const XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
static void DebugLog(const XHdcp1x *InstancePtr, const char *LogMsg)
static void XHdcp1x_RxDebugLog(const XHdcp1x *InstancePtr, const char *LogMsg)
{
char Label[16];
@ -508,15 +513,15 @@ static void DebugLog(const XHdcp1x *InstancePtr, const char *LogMsg)
* @note None.
*
******************************************************************************/
static void PostEvent(XHdcp1x *InstancePtr, tEvent Event)
static void XHdcp1x_RxPostEvent(XHdcp1x *InstancePtr, XHdcp1x_EventType Event)
{
/* Check for disable and clear any pending enable */
if (Event == EVENT_DISABLE) {
InstancePtr->Rx.PendingEvents &= ~(1u << EVENT_ENABLE);
if (Event == XHDCP1X_EVENT_DISABLE) {
InstancePtr->Rx.PendingEvents &= ~(1u << XHDCP1X_EVENT_ENABLE);
}
/* Check for phy-down and clear any pending phy-up */
else if (Event == EVENT_PHYDOWN) {
InstancePtr->Rx.PendingEvents &= ~(1u << EVENT_PHYUP);
else if (Event == XHDCP1X_EVENT_PHYDOWN) {
InstancePtr->Rx.PendingEvents &= ~(1u << XHDCP1X_EVENT_PHYUP);
}
/* Post it */
@ -534,12 +539,12 @@ static void PostEvent(XHdcp1x *InstancePtr, tEvent Event)
* @note None.
*
******************************************************************************/
static void AuthCallback(void *Parameter)
static void XHdcp1x_RxAuthCallback(void *Parameter)
{
XHdcp1x *InstancePtr = Parameter;
/* Post the re-authentication request */
PostEvent(InstancePtr, EVENT_AUTHENTICATE);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_AUTHENTICATE);
}
/*****************************************************************************/
@ -553,12 +558,12 @@ static void AuthCallback(void *Parameter)
* @note None.
*
******************************************************************************/
static void LinkFailCallback(void *Parameter)
static void XHdcp1x_RxLinkFailCallback(void *Parameter)
{
XHdcp1x *InstancePtr = Parameter;
/* Post the check request */
PostEvent(InstancePtr, EVENT_CHECK);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_CHECK);
}
/*****************************************************************************/
@ -572,12 +577,12 @@ static void LinkFailCallback(void *Parameter)
* @note None.
*
******************************************************************************/
static void RiUpdateCallback(void *Parameter)
static void XHdcp1x_RxRiUpdateCallback(void *Parameter)
{
XHdcp1x *InstancePtr = Parameter;
/* Post the update Ri request */
PostEvent(InstancePtr, EVENT_UPDATERi);
XHdcp1x_RxPostEvent(InstancePtr, XHDCP1X_EVENT_UPDATERi);
}
/*****************************************************************************/
@ -592,7 +597,7 @@ static void RiUpdateCallback(void *Parameter)
* @note None.
*
******************************************************************************/
static void SetCheckLinkState(XHdcp1x *InstancePtr, int IsEnabled)
static void XHdcp1x_RxSetCheckLinkState(XHdcp1x *InstancePtr, int IsEnabled)
{
/* Check for DP */
if (IsDP(InstancePtr)) {
@ -615,7 +620,7 @@ static void SetCheckLinkState(XHdcp1x *InstancePtr, int IsEnabled)
* @note None.
*
******************************************************************************/
static void Enable(XHdcp1x *InstancePtr)
static void XHdcp1x_RxEnableState(XHdcp1x *InstancePtr)
{
u64 MyKsv = 0;
u8 Buf[8];
@ -624,13 +629,13 @@ static void Enable(XHdcp1x *InstancePtr)
XHdcp1x_CipherSetLinkStateCheck(InstancePtr, FALSE);
XHdcp1x_CipherSetCallback(InstancePtr,
XHDCP1X_CIPHER_HANDLER_LINK_FAILURE,
&LinkFailCallback, InstancePtr);
&XHdcp1x_RxLinkFailCallback, InstancePtr);
/* Disable and register the Ri callback */
XHdcp1x_CipherSetRiUpdate(InstancePtr, FALSE);
XHdcp1x_CipherSetCallback(InstancePtr,
XHDCP1X_CIPHER_HANDLER_Ri_UPDATE,
&RiUpdateCallback, InstancePtr);
&XHdcp1x_RxRiUpdateCallback, InstancePtr);
/* Enable the crypto engine */
XHdcp1x_CipherEnable(InstancePtr);
@ -651,7 +656,7 @@ static void Enable(XHdcp1x *InstancePtr)
/* Register the re-authentication callback */
XHdcp1x_PortSetCallback(InstancePtr, XHDCP1X_PORT_HANDLER_AUTHENTICATE,
&AuthCallback, InstancePtr);
&XHdcp1x_RxAuthCallback, InstancePtr);
/* Enable the hdcp port */
XHdcp1x_PortEnable(InstancePtr);
@ -668,7 +673,7 @@ static void Enable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
static void Disable(XHdcp1x *InstancePtr)
static void XHdcp1x_RxDisableState(XHdcp1x *InstancePtr)
{
/* Disable the hdcp cipher and port */
XHdcp1x_PortDisable(InstancePtr);
@ -690,7 +695,8 @@ static void Disable(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
static void StartComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
static void XHdcp1x_RxStartComputations(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr)
{
u8 Buf[8];
u64 Value = 0;
@ -699,7 +705,7 @@ static void StartComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
u32 Z = 0;
/* Log */
DebugLog(InstancePtr, "starting computations");
XHdcp1x_RxDebugLog(InstancePtr, "starting computations");
/* Update statistics */
InstancePtr->Rx.Stats.AuthAttempts++;
@ -743,7 +749,8 @@ static void StartComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
* @note None.
*
******************************************************************************/
static void PollForComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
static void XHdcp1x_RxPollForComputations(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr)
{
/* Check for done */
if (XHdcp1x_CipherIsRequestComplete(InstancePtr)) {
@ -751,7 +758,7 @@ static void PollForComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
u16 Ro = 0;
/* Log */
DebugLog(InstancePtr, "computations complete");
XHdcp1x_RxDebugLog(InstancePtr, "computations complete");
/* Read theRo */
Ro = XHdcp1x_CipherGetRo(InstancePtr);
@ -772,10 +779,10 @@ static void PollForComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
XHDCP1X_PORT_SIZE_BSTATUS);
#endif
/* Update NextStatePtr */
*NextStatePtr = STATE_AUTHENTICATED;
*NextStatePtr = XHDCP1X_STATE_AUTHENTICATED;
}
else {
DebugLog(InstancePtr, "waiting for computations");
XHdcp1x_RxDebugLog(InstancePtr, "waiting for computations");
}
}
@ -793,7 +800,8 @@ static void PollForComputations(XHdcp1x *InstancePtr, tState *NextStatePtr)
* original value.
*
******************************************************************************/
static void UpdateRi(XHdcp1x *InstancePtr, tState *NextStatePtr)
static void XHdcp1x_RxUpdateRi(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr)
{
char LogBuf[20];
u8 Buf[4];
@ -829,7 +837,7 @@ static void UpdateRi(XHdcp1x *InstancePtr, tState *NextStatePtr)
snprintf(LogBuf, 20, "update Ri (%04X)", RememberRi);
/* Log */
DebugLog(InstancePtr, LogBuf);
XHdcp1x_RxDebugLog(InstancePtr, LogBuf);
}
/*****************************************************************************/
@ -844,13 +852,14 @@ static void UpdateRi(XHdcp1x *InstancePtr, tState *NextStatePtr)
* @note None.
*
******************************************************************************/
static void CheckLinkIntegrity(XHdcp1x *InstancePtr, tState *NextStatePtr)
static void XHdcp1x_RxCheckLinkIntegrity(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr)
{
if (XHdcp1x_CipherIsLinkUp(InstancePtr)) {
*NextStatePtr = STATE_AUTHENTICATED;
*NextStatePtr = XHDCP1X_STATE_AUTHENTICATED;
}
else {
*NextStatePtr = STATE_LINKINTEGRITYFAILED;
*NextStatePtr = XHDCP1X_STATE_LINKINTEGRITYFAILED;
}
}
@ -866,8 +875,8 @@ static void CheckLinkIntegrity(XHdcp1x *InstancePtr, tState *NextStatePtr)
* @note None.
*
******************************************************************************/
static void ReportLinkIntegrityFailure(XHdcp1x *InstancePtr,
tState *NextStatePtr)
static void XHdcp1x_RxReportLinkIntegrityFailure(XHdcp1x *InstancePtr,
XHdcp1x_StateType *NextStatePtr)
{
#if defined(XHDCP1X_PORT_BIT_BSTATUS_LINK_FAILURE)
u8 Buf[XHDCP1X_PORT_SIZE_BSTATUS];
@ -881,7 +890,7 @@ static void ReportLinkIntegrityFailure(XHdcp1x *InstancePtr,
#endif
/* Log */
DebugLog(InstancePtr, "link integrity failed");
XHdcp1x_RxDebugLog(InstancePtr, "link integrity failed");
}
/*****************************************************************************/
@ -897,27 +906,27 @@ static void ReportLinkIntegrityFailure(XHdcp1x *InstancePtr,
* @note None.
*
******************************************************************************/
static void RunDisabledState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr)
static void XHdcp1x_RxRunDisabledState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr)
{
/* Which event? */
switch (Event) {
/* For enable */
case EVENT_ENABLE:
*NextStatePtr = STATE_UNAUTHENTICATED;
if ((InstancePtr->Rx.Flags & FLAG_PHY_UP) == 0) {
*NextStatePtr = STATE_PHYDOWN;
case XHDCP1X_EVENT_ENABLE:
*NextStatePtr = XHDCP1X_STATE_UNAUTHENTICATED;
if ((InstancePtr->Rx.Flags & XVPHY_FLAG_PHY_UP) == 0) {
*NextStatePtr = XHDCP1X_STATE_PHYDOWN;
}
break;
/* For physical layer down */
case EVENT_PHYDOWN:
InstancePtr->Rx.Flags &= ~FLAG_PHY_UP;
case XHDCP1X_EVENT_PHYDOWN:
InstancePtr->Rx.Flags &= ~XVPHY_FLAG_PHY_UP;
break;
/* For physical layer up */
case EVENT_PHYUP:
InstancePtr->Rx.Flags |= FLAG_PHY_UP;
case XHDCP1X_EVENT_PHYUP:
InstancePtr->Rx.Flags |= XVPHY_FLAG_PHY_UP;
break;
/* Otherwise */
@ -940,24 +949,24 @@ static void RunDisabledState(XHdcp1x *InstancePtr, tEvent Event,
* @note None.
*
******************************************************************************/
static void RunUnauthenticatedState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr)
static void XHdcp1x_RxRunUnauthenticatedState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr)
{
/* Which event? */
switch (Event) {
/* For authenticate */
case EVENT_AUTHENTICATE:
*NextStatePtr = STATE_COMPUTATIONS;
case XHDCP1X_EVENT_AUTHENTICATE:
*NextStatePtr = XHDCP1X_STATE_COMPUTATIONS;
break;
/* For disable */
case EVENT_DISABLE:
*NextStatePtr = STATE_DISABLED;
case XHDCP1X_EVENT_DISABLE:
*NextStatePtr = XHDCP1X_STATE_DISABLED;
break;
/* For physical layer down */
case EVENT_PHYDOWN:
*NextStatePtr = STATE_PHYDOWN;
case XHDCP1X_EVENT_PHYDOWN:
*NextStatePtr = XHDCP1X_STATE_PHYDOWN;
break;
/* Otherwise */
@ -980,29 +989,30 @@ static void RunUnauthenticatedState(XHdcp1x *InstancePtr, tEvent Event,
* @note None.
*
******************************************************************************/
static void RunComputationsState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr)
static void XHdcp1x_RxRunComputationsState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr)
{
/* Which event? */
switch (Event) {
/* For authenticate */
case EVENT_AUTHENTICATE:
StartComputations(InstancePtr, NextStatePtr);
case XHDCP1X_EVENT_AUTHENTICATE:
XHdcp1x_RxStartComputations(InstancePtr, NextStatePtr);
break;
/* For disable */
case EVENT_DISABLE:
*NextStatePtr = STATE_DISABLED;
case XHDCP1X_EVENT_DISABLE:
*NextStatePtr = XHDCP1X_STATE_DISABLED;
break;
/* For physical layer down */
case EVENT_PHYDOWN:
*NextStatePtr = STATE_PHYDOWN;
case XHDCP1X_EVENT_PHYDOWN:
*NextStatePtr = XHDCP1X_STATE_PHYDOWN;
break;
/* For poll */
case EVENT_POLL:
PollForComputations(InstancePtr, NextStatePtr);
case XHDCP1X_EVENT_POLL:
XHdcp1x_RxPollForComputations(InstancePtr,
NextStatePtr);
break;
/* Otherwise */
@ -1025,34 +1035,34 @@ static void RunComputationsState(XHdcp1x *InstancePtr, tEvent Event,
* @note None.
*
******************************************************************************/
static void RunAuthenticatedState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr)
static void XHdcp1x_RxRunAuthenticatedState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr)
{
/* Which event? */
switch (Event) {
/* For authenticate */
case EVENT_AUTHENTICATE:
*NextStatePtr = STATE_COMPUTATIONS;
case XHDCP1X_EVENT_AUTHENTICATE:
*NextStatePtr = XHDCP1X_STATE_COMPUTATIONS;
break;
/* For check */
case EVENT_CHECK:
CheckLinkIntegrity(InstancePtr, NextStatePtr);
case XHDCP1X_EVENT_CHECK:
XHdcp1x_RxCheckLinkIntegrity(InstancePtr, NextStatePtr);
break;
/* For disable */
case EVENT_DISABLE:
*NextStatePtr = STATE_DISABLED;
case XHDCP1X_EVENT_DISABLE:
*NextStatePtr = XHDCP1X_STATE_DISABLED;
break;
/* For physical layer down */
case EVENT_PHYDOWN:
*NextStatePtr = STATE_PHYDOWN;
case XHDCP1X_EVENT_PHYDOWN:
*NextStatePtr = XHDCP1X_STATE_PHYDOWN;
break;
/* For update Ri */
case EVENT_UPDATERi:
UpdateRi(InstancePtr, NextStatePtr);
case XHDCP1X_EVENT_UPDATERi:
XHdcp1x_RxUpdateRi(InstancePtr, NextStatePtr);
break;
/* Otherwise */
@ -1076,29 +1086,29 @@ static void RunAuthenticatedState(XHdcp1x *InstancePtr, tEvent Event,
* @note None.
*
******************************************************************************/
static void RunLinkIntegrityFailedState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr)
static void XHdcp1x_RxRunLinkIntegrityFailedState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr)
{
/* Which event? */
switch (Event) {
/* For authenticate */
case EVENT_AUTHENTICATE:
*NextStatePtr = STATE_COMPUTATIONS;
case XHDCP1X_EVENT_AUTHENTICATE:
*NextStatePtr = XHDCP1X_STATE_COMPUTATIONS;
break;
/* For check */
case EVENT_CHECK:
CheckLinkIntegrity(InstancePtr, NextStatePtr);
case XHDCP1X_EVENT_CHECK:
XHdcp1x_RxCheckLinkIntegrity(InstancePtr, NextStatePtr);
break;
/* For disable */
case EVENT_DISABLE:
*NextStatePtr = STATE_DISABLED;
case XHDCP1X_EVENT_DISABLE:
*NextStatePtr = XHDCP1X_STATE_DISABLED;
break;
/* For physical layer down */
case EVENT_PHYDOWN:
*NextStatePtr = STATE_PHYDOWN;
case XHDCP1X_EVENT_PHYDOWN:
*NextStatePtr = XHDCP1X_STATE_PHYDOWN;
break;
/* Otherwise */
@ -1122,19 +1132,19 @@ static void RunLinkIntegrityFailedState(XHdcp1x *InstancePtr, tEvent Event,
* @note None.
*
******************************************************************************/
static void RunPhysicalLayerDownState(XHdcp1x *InstancePtr, tEvent Event,
tState *NextStatePtr)
static void XHdcp1x_RxRunPhysicalLayerDownState(XHdcp1x *InstancePtr,
XHdcp1x_EventType Event, XHdcp1x_StateType *NextStatePtr)
{
/* Which event? */
switch (Event) {
/* For disable */
case EVENT_DISABLE:
*NextStatePtr = STATE_DISABLED;
case XHDCP1X_EVENT_DISABLE:
*NextStatePtr = XHDCP1X_STATE_DISABLED;
break;
/* For physical layer up */
case EVENT_PHYUP:
*NextStatePtr = STATE_UNAUTHENTICATED;
case XHDCP1X_EVENT_PHYUP:
*NextStatePtr = XHDCP1X_STATE_UNAUTHENTICATED;
break;
/* Otherwise */
@ -1157,40 +1167,42 @@ static void RunPhysicalLayerDownState(XHdcp1x *InstancePtr, tEvent Event,
* @note None.
*
******************************************************************************/
static void EnterState(XHdcp1x *InstancePtr, tState State, tState *NextStatePtr)
static void XHdcp1x_RxEnterState(XHdcp1x *InstancePtr, XHdcp1x_StateType State,
XHdcp1x_StateType *NextStatePtr)
{
/* Which state? */
switch (State) {
/* For the disabled state */
case STATE_DISABLED:
Disable(InstancePtr);
case XHDCP1X_STATE_DISABLED:
XHdcp1x_RxDisableState(InstancePtr);
break;
/* For the unauthenticated state */
case STATE_UNAUTHENTICATED:
InstancePtr->Rx.Flags |= FLAG_PHY_UP;
case XHDCP1X_STATE_UNAUTHENTICATED:
InstancePtr->Rx.Flags |= XVPHY_FLAG_PHY_UP;
break;
/* For the computations state */
case STATE_COMPUTATIONS:
StartComputations(InstancePtr, NextStatePtr);
case XHDCP1X_STATE_COMPUTATIONS:
XHdcp1x_RxStartComputations(InstancePtr, NextStatePtr);
break;
/* For the authenticated state */
case STATE_AUTHENTICATED:
DebugLog(InstancePtr, "authenticated");
SetCheckLinkState(InstancePtr, TRUE);
case XHDCP1X_STATE_AUTHENTICATED:
XHdcp1x_RxDebugLog(InstancePtr, "authenticated");
XHdcp1x_RxSetCheckLinkState(InstancePtr, TRUE);
break;
/* For the link integrity failed state */
case STATE_LINKINTEGRITYFAILED:
case XHDCP1X_STATE_LINKINTEGRITYFAILED:
InstancePtr->Rx.Stats.LinkFailures++;
ReportLinkIntegrityFailure(InstancePtr, NextStatePtr);
XHdcp1x_RxReportLinkIntegrityFailure(InstancePtr,
NextStatePtr);
break;
/* For physical layer down */
case STATE_PHYDOWN:
InstancePtr->Rx.Flags &= ~FLAG_PHY_UP;
case XHDCP1X_STATE_PHYDOWN:
InstancePtr->Rx.Flags &= ~XVPHY_FLAG_PHY_UP;
XHdcp1x_CipherDisable(InstancePtr);
break;
@ -1213,22 +1225,22 @@ static void EnterState(XHdcp1x *InstancePtr, tState State, tState *NextStatePtr)
* @note None.
*
******************************************************************************/
static void ExitState(XHdcp1x *InstancePtr, tState State)
static void XHdcp1x_RxExitState(XHdcp1x *InstancePtr, XHdcp1x_StateType State)
{
/* Which state? */
switch (State) {
/* For the disabled state */
case STATE_DISABLED:
Enable(InstancePtr);
case XHDCP1X_STATE_DISABLED:
XHdcp1x_RxEnableState(InstancePtr);
break;
/* For the authenticated state */
case STATE_AUTHENTICATED:
SetCheckLinkState(InstancePtr, FALSE);
case XHDCP1X_STATE_AUTHENTICATED:
XHdcp1x_RxSetCheckLinkState(InstancePtr, FALSE);
break;
/* For physical layer down */
case STATE_PHYDOWN:
case XHDCP1X_STATE_PHYDOWN:
XHdcp1x_CipherEnable(InstancePtr);
break;
@ -1251,41 +1263,45 @@ static void ExitState(XHdcp1x *InstancePtr, tState State)
* @note None.
*
******************************************************************************/
static void DoTheState(XHdcp1x *InstancePtr, tEvent Event)
static void XHdcp1x_RxDoTheState(XHdcp1x *InstancePtr, XHdcp1x_EventType Event)
{
tState NextState = InstancePtr->Rx.CurrentState;
XHdcp1x_StateType NextState = InstancePtr->Rx.CurrentState;
/* Which state? */
switch (InstancePtr->Rx.CurrentState) {
/* For the disabled state */
case STATE_DISABLED:
RunDisabledState(InstancePtr, Event, &NextState);
break;
/* For the unauthenticated state */
case STATE_UNAUTHENTICATED:
RunUnauthenticatedState(InstancePtr, Event, &NextState);
break;
/* For the computations state */
case STATE_COMPUTATIONS:
RunComputationsState(InstancePtr, Event, &NextState);
break;
/* For the authenticated state */
case STATE_AUTHENTICATED:
RunAuthenticatedState(InstancePtr, Event, &NextState);
break;
/* For the link integrity failed state */
case STATE_LINKINTEGRITYFAILED:
RunLinkIntegrityFailedState(InstancePtr, Event,
case XHDCP1X_STATE_DISABLED:
XHdcp1x_RxRunDisabledState(InstancePtr, Event,
&NextState);
break;
/* For the unauthenticated state */
case XHDCP1X_STATE_UNAUTHENTICATED:
XHdcp1x_RxRunUnauthenticatedState(InstancePtr, Event,
&NextState);
break;
/* For the computations state */
case XHDCP1X_STATE_COMPUTATIONS:
XHdcp1x_RxRunComputationsState(InstancePtr, Event,
&NextState);
break;
/* For the authenticated state */
case XHDCP1X_STATE_AUTHENTICATED:
XHdcp1x_RxRunAuthenticatedState(InstancePtr, Event,
&NextState);
break;
/* For the link integrity failed state */
case XHDCP1X_STATE_LINKINTEGRITYFAILED:
XHdcp1x_RxRunLinkIntegrityFailedState(InstancePtr,
Event, &NextState);
break;
/* For the physical layer down state */
case STATE_PHYDOWN:
RunPhysicalLayerDownState(InstancePtr, Event,
case XHDCP1X_STATE_PHYDOWN:
XHdcp1x_RxRunPhysicalLayerDownState(InstancePtr, Event,
&NextState);
break;
@ -1297,10 +1313,10 @@ static void DoTheState(XHdcp1x *InstancePtr, tEvent Event)
/* Check for state change */
while (InstancePtr->Rx.CurrentState != NextState) {
/* Perform the state transition */
ExitState(InstancePtr, InstancePtr->Rx.CurrentState);
XHdcp1x_RxExitState(InstancePtr, InstancePtr->Rx.CurrentState);
InstancePtr->Rx.PreviousState = InstancePtr->Rx.CurrentState;
InstancePtr->Rx.CurrentState = NextState;
EnterState(InstancePtr, InstancePtr->Rx.CurrentState,
XHdcp1x_RxEnterState(InstancePtr, InstancePtr->Rx.CurrentState,
&NextState);
}
}
@ -1316,12 +1332,12 @@ static void DoTheState(XHdcp1x *InstancePtr, tEvent Event)
* @note None.
*
******************************************************************************/
static void ProcessPending(XHdcp1x *InstancePtr)
static void XHdcp1x_RxProcessPending(XHdcp1x *InstancePtr)
{
/* Check for any pending events */
if (InstancePtr->Rx.PendingEvents != 0) {
u16 Pending = InstancePtr->Rx.PendingEvents;
tEvent Event = EVENT_NULL;
XHdcp1x_EventType Event = XHDCP1X_EVENT_NULL;
/* Update InstancePtr */
InstancePtr->Rx.PendingEvents = 0;
@ -1330,7 +1346,7 @@ static void ProcessPending(XHdcp1x *InstancePtr)
do {
/* Check for a pending event */
if ((Pending & 1u) != 0) {
DoTheState(InstancePtr, Event);
XHdcp1x_RxDoTheState(InstancePtr, Event);
}
/* Update for loop */
@ -1352,33 +1368,33 @@ static void ProcessPending(XHdcp1x *InstancePtr)
* @note None.
*
******************************************************************************/
static const char *StateToString(tState State)
static const char *XHdcp1x_RxStateToString(XHdcp1x_StateType State)
{
const char *String = NULL;
/* Which state? */
switch (State) {
case STATE_DISABLED:
case XHDCP1X_STATE_DISABLED:
String = "disabled";
break;
case STATE_UNAUTHENTICATED:
case XHDCP1X_STATE_UNAUTHENTICATED:
String = "unauthenticated";
break;
case STATE_COMPUTATIONS:
case XHDCP1X_STATE_COMPUTATIONS:
String = "computations";
break;
case STATE_AUTHENTICATED:
case XHDCP1X_STATE_AUTHENTICATED:
String = "authenticated";
break;
case STATE_LINKINTEGRITYFAILED:
case XHDCP1X_STATE_LINKINTEGRITYFAILED:
String = "link-integrity-failed";
break;
case STATE_PHYDOWN:
case XHDCP1X_STATE_PHYDOWN:
String = "physical-layer-down";
break;

864
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_tx.c
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