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hdcp1x: Removed common structure and duplications.

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Keep commonality in the top-level instance core structure.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-08-07 11:52:17 -07:00 • committed by Nava kishore Manne
parent 5edc951b10
commit 4157a3516d
8 changed files with 5 additions and 45 deletions
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5
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x.c
View file

@ -171,12 +171,9 @@ int XHdcp1x_CfgInitialize(XHdcp1x *InstancePtr, const XHdcp1x_Config *CfgPtr,
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(CfgPtr != NULL);
Xil_AssertNonvoid(InstancePtr->Common.IsReady !=
XIL_COMPONENT_IS_READY);
/* Initialize InstancePtr */
memset(InstancePtr, 0, sizeof(XHdcp1x));
InstancePtr->Common.CfgPtr = CfgPtr;
InstancePtr->Config = *CfgPtr;
#if defined(INCLUDE_TX)
@ -199,7 +196,7 @@ int XHdcp1x_CfgInitialize(XHdcp1x *InstancePtr, const XHdcp1x_Config *CfgPtr,
/* Update IsReady */
if (Status == XST_SUCCESS) {
InstancePtr->Common.IsReady = XIL_COMPONENT_IS_READY;
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
}
return (Status);

20
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x.h
View file

@ -106,8 +106,6 @@ typedef struct {
* This typedef contains an instance of the HDCP cipher core
*/
typedef struct {
const XHdcp1x_Config *CfgPtr; /**< The cipher core config */
u32 IsReady; /**< The ready flag */
XHdcp1x_Callback LinkFailCallback; /**< Link fail callback */
void *LinkFailRef; /**< Link fail reference */
u32 IsLinkFailCallbackSet; /**< Link fail config flag */
@ -133,10 +131,8 @@ struct XHdcp1x_PortPhyIfAdaptorS;
* This typedef contains an instance of the HDCP port
*/
typedef struct XHdcp1x_PortStruct {
const XHdcp1x_Config *CfgPtr; /**< The cipher core config */
const struct XHdcp1x_PortPhyIfAdaptorS *Adaptor; /**< Port adaptor */
void *PhyIfPtr; /**< The port's physical interface */
u32 IsReady; /**< The ready flag */
XHdcp1x_Callback AuthCallback; /**< (Re)Authentication callback */
void *AuthRef; /**< (Re)Authentication reference */
u32 IsAuthCallbackSet; /**< (Re)Authentication config flag */
@ -164,22 +160,10 @@ typedef struct {
u32 RiUpdates; /**< Num of Ri updates performed */
} XHdcp1x_RxStats;
/**
* This typedef defines the elements that are common to both RX and TX HDCP
* interfaces. The fields within this typedef must align with both the RX
* and TX definitions
*/
typedef struct {
const XHdcp1x_Config *CfgPtr; /**< The cipher core config */
u32 IsReady; /**< The ready flag */
} XHdcp1x_Common;
/**
* This typedef contains the transmit HDCP interface
*/
typedef struct {
const XHdcp1x_Config *CfgPtr; /**< The cipher core config */
u32 IsReady; /**< The ready flag */
u32 CurrentState; /**< The interface's current state */
u32 PreviousState; /**< The interface's previous state */
u64 StateHelper; /**< The interface's state helper */
@ -193,8 +177,6 @@ typedef struct {
* This typedef contains the receive HDCP interface
*/
typedef struct {
const XHdcp1x_Config *CfgPtr; /**< The cipher core config */
u32 IsReady; /**< The ready flag */
u32 CurrentState; /**< The interface's current state */
u32 PreviousState; /**< The interface's previous state */
u16 Flags; /**< The interface flags */
@ -210,10 +192,10 @@ typedef struct {
XHdcp1x_Cipher Cipher; /**< The interface's cipher */
XHdcp1x_Port Port; /**< The interface's port */
union {
XHdcp1x_Common Common; /**< The common interface elements */
XHdcp1x_Tx Tx; /**< The transmit interface elements */
XHdcp1x_Rx Rx; /**< The receive interface elements */
};
u32 IsReady; /**< The ready flag */
} XHdcp1x;
/**

6
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_cipher.c
View file

@ -241,11 +241,6 @@ int XHdcp1x_CipherCfgInitialize(XHdcp1x *InstancePtr,
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(CfgPtr != NULL);
Xil_AssertNonvoid(InstancePtr->Cipher.IsReady !=
XIL_COMPONENT_IS_READY);
/* Initialize InstancePtr */
InstancePtr->Cipher.CfgPtr = CfgPtr;
/* Check for mismatch on direction */
if (IsRX(InstancePtr)) {
@ -270,7 +265,6 @@ int XHdcp1x_CipherCfgInitialize(XHdcp1x *InstancePtr,
/* Initialize it */
if (Status == XST_SUCCESS) {
Init(InstancePtr);
InstancePtr->Cipher.IsReady = XIL_COMPONENT_IS_READY;
}
return (Status);

2
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_cipher_intr.c
View file

@ -239,7 +239,7 @@ void XHdcp1x_CipherHandleInterrupt(void *InstancePtr)
/* Verify arguments */
Xil_AssertVoid(HdcpPtr != NULL);
Xil_AssertVoid(HdcpPtr->Cipher.IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(HdcpPtr->IsReady == XIL_COMPONENT_IS_READY);
/* Determine Pending */
Pending = RegRead(HdcpPtr, XHDCP1X_CIPHER_REG_INTERRUPT_STATUS);

4
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_intr.c
View file

@ -80,7 +80,7 @@ void XHdcp1x_CipherIntrHandler(void *InstancePtr)
/* Verify arguments */
Xil_AssertVoid(HdcpPtr != NULL);
Xil_AssertVoid(HdcpPtr->Common.IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(HdcpPtr->IsReady == XIL_COMPONENT_IS_READY);
/* Dispatch it to the corresponding cipher */
XHdcp1x_CipherHandleInterrupt(HdcpPtr);
@ -105,7 +105,7 @@ void XHdcp1x_PortIntrHandler(void *InstancePtr, u32 IntCause)
/* Verify arguments */
Xil_AssertVoid(HdcpPtr != NULL);
Xil_AssertVoid(HdcpPtr->Common.IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(HdcpPtr->IsReady == XIL_COMPONENT_IS_READY);
/* Dispatch it to the corresponding port */
XHdcp1x_PortHandleInterrupt(HdcpPtr, IntCause);

7
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_port.c
View file

@ -117,10 +117,8 @@ int XHdcp1x_PortCfgInitialize(XHdcp1x *InstancePtr,
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(CfgPtr != NULL);
Xil_AssertNonvoid(PhyIfPtr != NULL);
Xil_AssertNonvoid(InstancePtr->Port.IsReady != XIL_COMPONENT_IS_READY);
/* Initialize InstancePtr */
InstancePtr->Port.CfgPtr = CfgPtr;
InstancePtr->Port.PhyIfPtr = PhyIfPtr;
InstancePtr->Port.Adaptor = DetermineAdaptor(InstancePtr);
@ -133,11 +131,6 @@ int XHdcp1x_PortCfgInitialize(XHdcp1x *InstancePtr,
Status = (*(InstancePtr->Port.Adaptor->Init))(InstancePtr);
}
/* Set IsReady */
if (Status == XST_SUCCESS) {
InstancePtr->Port.IsReady = XIL_COMPONENT_IS_READY;
}
return (Status);
}

3
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_rx.c
View file

@ -181,9 +181,6 @@ int XHdcp1x_RxCfgInitialize(XHdcp1x *InstancePtr,
Xil_AssertNonvoid(CfgPtr != NULL);
Xil_AssertNonvoid(PhyIfPtr != NULL);
/* Initialize InstancePtr */
InstancePtr->Rx.CfgPtr = CfgPtr;
/* Initialize cipher, port and state machine */
Status = XHdcp1x_PortCfgInitialize(InstancePtr, CfgPtr, PhyIfPtr);
if (Status == XST_SUCCESS) {

3
XilinxProcessorIPLib/drivers/hdcp1x/src/xhdcp1x_tx.c
View file

@ -219,9 +219,6 @@ int XHdcp1x_TxCfgInitialize(XHdcp1x *InstancePtr,
Xil_AssertNonvoid(CfgPtr != NULL);
Xil_AssertNonvoid(PhyIfPtr != NULL);
/* Initialize InstancePtr */
InstancePtr->Tx.CfgPtr = CfgPtr;
/* Initialize cipher, port and state machine */
Status = XHdcp1x_PortCfgInitialize(InstancePtr, CfgPtr, PhyIfPtr);
if (Status == XST_SUCCESS) {