qspipsu_v1_1: Added new version for qspipsu.
This patch add new version 1.1 for qspipsu and deprecates older version. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This commit is contained in:
P L Sai Krishna
Nava kishore Manne
parent
42234e4dd3
commit
42cc06acb2
44 changed files with 18786 additions and 1 deletions
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@ -34,7 +34,7 @@ OPTION psf_version = 2.1;
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BEGIN driver qspipsu
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OPTION supported_peripherals = (psu_qspi);
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OPTION driver_state = ACTIVE;
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OPTION driver_state = DEPRECATED;
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OPTION copyfiles = all;
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OPTION VERSION = 1.0;
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OPTION NAME = qspipsu;
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42
XilinxProcessorIPLib/drivers/qspipsu_v1_1/data/qspipsu.mdd
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/data/qspipsu.mdd
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@ -0,0 +1,42 @@
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###############################################################################
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#
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# Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# Use of the Software is limited solely to applications:
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# (a) running on a Xilinx device, or
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# (b) that interact with a Xilinx device through a bus or interconnect.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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# Except as contained in this notice, the name of the Xilinx shall not be used
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# in advertising or otherwise to promote the sale, use or other dealings in
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# this Software without prior written authorization from Xilinx.
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#
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###############################################################################
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OPTION psf_version = 2.1;
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BEGIN driver qspipsu
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OPTION supported_peripherals = (psu_qspi);
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OPTION driver_state = ACTIVE;
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OPTION copyfiles = all;
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OPTION VERSION = 1.1;
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OPTION NAME = qspipsu;
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END driver
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51
XilinxProcessorIPLib/drivers/qspipsu_v1_1/data/qspipsu.tcl
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/data/qspipsu.tcl
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@ -0,0 +1,51 @@
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###############################################################################
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#
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# Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# Use of the Software is limited solely to applications:
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# (a) running on a Xilinx device, or
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# (b) that interact with a Xilinx device through a bus or interconnect.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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# Except as contained in this notice, the name of the Xilinx shall not be used
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# in advertising or otherwise to promote the sale, use or other dealings in
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# this Software without prior written authorization from Xilinx.
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#
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###############################################################################
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##############################################################################
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#
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# Modification History
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#
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# Ver Who Date Changes
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# ----- ---- -------- -----------------------------------------------
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# 1.0 hk 08/21/14 First release
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#
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##############################################################################
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#uses "xillib.tcl"
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proc generate {drv_handle} {
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::hsi::utils::define_zynq_include_file $drv_handle "xparameters.h" "XQspiPsu" "NUM_INSTANCES" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_S_AXI_HIGHADDR" "C_QSPI_CLK_FREQ_HZ" "C_QSPI_MODE"
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::hsi::utils::define_zynq_config_file $drv_handle "xqspipsu_g.c" "XQspiPsu" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_QSPI_CLK_FREQ_HZ" "C_QSPI_MODE"
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::hsi::utils::define_zynq_canonical_xpars $drv_handle "xparameters.h" "XQspiPsu" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_S_AXI_HIGHADDR" "C_QSPI_CLK_FREQ_HZ" "C_QSPI_MODE"
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}
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30
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/annotated.html
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/annotated.html
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<html>
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<head>
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<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
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<title>
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Class List
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</title>
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<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
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</head>
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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<hl>Software Drivers</hl>
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<hr class="whs1">
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<!-- Generated by Doxygen 1.4.7 -->
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<div class="tabs">
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<ul>
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<li><a href="index.html"><span>Main Page</span></a></li>
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<li><a href="functions.html"><span>Class Members</span></a></li>
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</ul></div>
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<h1>Class List</h1>Here are the classes, structs, unions and interfaces with brief descriptions:<table>
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<tr><td class="indexkey"><a class="el" href="struct_options_map.html">OptionsMap</a></td><td class="indexvalue"></td></tr>
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<tr><td class="indexkey"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td class="indexvalue"></td></tr>
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<tr><td class="indexkey"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td><td class="indexvalue"></td></tr>
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<tr><td class="indexkey"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td><td class="indexvalue"></td></tr>
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</table>
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Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
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BIN
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/doxygen.png
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BIN
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/doxygen.png
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/driver_api_doxygen.css
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/driver_api_doxygen.css
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
a:visited {
|
||||
color: #3D2185;
|
||||
}
|
||||
32
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/files.html
Executable file
32
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/files.html
Executable file
|
|
@ -0,0 +1,32 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
File Index
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
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|
||||
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|
||||
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|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
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|
||||
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|
||||
<ul>
|
||||
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|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>File List</h1>Here is a list of all files with brief descriptions:<table>
|
||||
<tr><td class="indexkey"><a class="el" href="xqspipsu_8c.html">xqspipsu.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xqspipsu_8h.html">xqspipsu.h</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xqspipsu__g_8c.html">xqspipsu_g.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xqspipsu__hw_8h.html">xqspipsu_hw.h</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xqspipsu__options_8c.html">xqspipsu_options.c</a></td><td class="indexvalue"></td></tr>
|
||||
<tr><td class="indexkey"><a class="el" href="xqspipsu__sinit_8c.html">xqspipsu_sinit.c</a></td><td class="indexvalue"></td></tr>
|
||||
</table>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
63
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/functions.html
Executable file
63
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/functions.html
Executable file
|
|
@ -0,0 +1,63 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
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|
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|
||||
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|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
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|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li id="current"><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
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|
||||
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|
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|
||||
<li><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
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|
||||
</div>
|
||||
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|
||||
<p>
|
||||
<ul>
|
||||
<li>BaseAddress
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#4fe2b57911aede873cac306ec0b295ad">XQspiPsu_Config</a><li>BusWidth
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#fb9b153a78b4112212d7850efd1c6add">XQspiPsu_Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#e4dae8ba728f7da9b6f31bb39c62b81f">XQspiPsu_Msg</a><li>ByteCount
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg</a><li>Config
|
||||
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|
||||
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|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#5b4a0fe7ce081acb816e56ea139fd0b8">XQspiPsu_Config</a><li>Flags
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg</a><li>GenFifoBufferPtr
|
||||
: <a class="el" href="struct_x_qspi_psu.html#dc71282aafc4eb9a8f37e672bf3bec51">XQspiPsu</a><li>GenFifoBus
|
||||
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|
||||
: <a class="el" href="struct_x_qspi_psu.html#dbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu</a><li>GenFifoEntries
|
||||
: <a class="el" href="struct_x_qspi_psu.html#c22878c102c9a449ccbef8992a32740e">XQspiPsu</a><li>InputClockHz
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#630de071c5c249ec4bf502fff7f8daaa">XQspiPsu_Config</a><li>IsBusy
|
||||
: <a class="el" href="struct_x_qspi_psu.html#b6f2b5a35423f4a2c34053eaeec3dcd6">XQspiPsu</a><li>IsReady
|
||||
: <a class="el" href="struct_x_qspi_psu.html#e6039f5b4f8cdf2e528931ec383deb31">XQspiPsu</a><li>IsUnaligned
|
||||
: <a class="el" href="struct_x_qspi_psu.html#85e0ab38f87032835095e2a0b8a26afd">XQspiPsu</a><li>Mask
|
||||
: <a class="el" href="struct_options_map.html#15a0d89a22cb9514acce100647e9d7e1">OptionsMap</a><li>Msg
|
||||
: <a class="el" href="struct_x_qspi_psu.html#29f89d26e8b2046a17065912e1a7b365">XQspiPsu</a><li>MsgCnt
|
||||
: <a class="el" href="struct_x_qspi_psu.html#529c4bf3c3d29b235b81a9465478ba03">XQspiPsu</a><li>NumMsg
|
||||
: <a class="el" href="struct_x_qspi_psu.html#99fdefe256f67980d0c49a564e0fa0de">XQspiPsu</a><li>Option
|
||||
: <a class="el" href="struct_options_map.html#802f63f679817760b3c4c1b8a72f229f">OptionsMap</a><li>ReadMode
|
||||
: <a class="el" href="struct_x_qspi_psu.html#bcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu</a><li>RecvBufferPtr
|
||||
: <a class="el" href="struct_x_qspi_psu.html#5464cdad6cf047e5228f13cb3a761c3f">XQspiPsu</a><li>RxBfrPtr
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg</a><li>RxBytes
|
||||
: <a class="el" href="struct_x_qspi_psu.html#8b125949249aea53706a9bfc4fd736d0">XQspiPsu</a><li>SendBufferPtr
|
||||
: <a class="el" href="struct_x_qspi_psu.html#2a11cb56ad7d4b388a4669359156ab0b">XQspiPsu</a><li>StatusHandler
|
||||
: <a class="el" href="struct_x_qspi_psu.html#2ebf04ce847da29d6069795db26fbccc">XQspiPsu</a><li>StatusRef
|
||||
: <a class="el" href="struct_x_qspi_psu.html#af2ea17aa1aae667ccc6190222e218f7">XQspiPsu</a><li>TxBfrPtr
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#09fc20d95cb26f29a649207d0b495f58">XQspiPsu_Msg</a><li>TxBytes
|
||||
: <a class="el" href="struct_x_qspi_psu.html#b2d95514007cb4fc72b4427f476cdb44">XQspiPsu</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
63
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/functions_vars.html
Executable file
63
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/functions_vars.html
Executable file
|
|
@ -0,0 +1,63 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members - Variables
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
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|
||||
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|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
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<div class="tabs">
|
||||
<ul>
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<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li id="current"><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="functions.html"><span>All</span></a></li>
|
||||
<li id="current"><a href="functions_vars.html"><span>Variables</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>BaseAddress
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#4fe2b57911aede873cac306ec0b295ad">XQspiPsu_Config</a><li>BusWidth
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#fb9b153a78b4112212d7850efd1c6add">XQspiPsu_Config</a>, <a class="el" href="struct_x_qspi_psu___msg.html#e4dae8ba728f7da9b6f31bb39c62b81f">XQspiPsu_Msg</a><li>ByteCount
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg</a><li>Config
|
||||
: <a class="el" href="struct_x_qspi_psu.html#9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu</a><li>ConnectionMode
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#a771e1e018426eb1f68fe5241ed45e71">XQspiPsu_Config</a><li>DeviceId
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#5b4a0fe7ce081acb816e56ea139fd0b8">XQspiPsu_Config</a><li>Flags
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg</a><li>GenFifoBufferPtr
|
||||
: <a class="el" href="struct_x_qspi_psu.html#dc71282aafc4eb9a8f37e672bf3bec51">XQspiPsu</a><li>GenFifoBus
|
||||
: <a class="el" href="struct_x_qspi_psu.html#04675183fe2c3b312d0866a2a2f9b906">XQspiPsu</a><li>GenFifoCS
|
||||
: <a class="el" href="struct_x_qspi_psu.html#dbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu</a><li>GenFifoEntries
|
||||
: <a class="el" href="struct_x_qspi_psu.html#c22878c102c9a449ccbef8992a32740e">XQspiPsu</a><li>InputClockHz
|
||||
: <a class="el" href="struct_x_qspi_psu___config.html#630de071c5c249ec4bf502fff7f8daaa">XQspiPsu_Config</a><li>IsBusy
|
||||
: <a class="el" href="struct_x_qspi_psu.html#b6f2b5a35423f4a2c34053eaeec3dcd6">XQspiPsu</a><li>IsReady
|
||||
: <a class="el" href="struct_x_qspi_psu.html#e6039f5b4f8cdf2e528931ec383deb31">XQspiPsu</a><li>IsUnaligned
|
||||
: <a class="el" href="struct_x_qspi_psu.html#85e0ab38f87032835095e2a0b8a26afd">XQspiPsu</a><li>Mask
|
||||
: <a class="el" href="struct_options_map.html#15a0d89a22cb9514acce100647e9d7e1">OptionsMap</a><li>Msg
|
||||
: <a class="el" href="struct_x_qspi_psu.html#29f89d26e8b2046a17065912e1a7b365">XQspiPsu</a><li>MsgCnt
|
||||
: <a class="el" href="struct_x_qspi_psu.html#529c4bf3c3d29b235b81a9465478ba03">XQspiPsu</a><li>NumMsg
|
||||
: <a class="el" href="struct_x_qspi_psu.html#99fdefe256f67980d0c49a564e0fa0de">XQspiPsu</a><li>Option
|
||||
: <a class="el" href="struct_options_map.html#802f63f679817760b3c4c1b8a72f229f">OptionsMap</a><li>ReadMode
|
||||
: <a class="el" href="struct_x_qspi_psu.html#bcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu</a><li>RecvBufferPtr
|
||||
: <a class="el" href="struct_x_qspi_psu.html#5464cdad6cf047e5228f13cb3a761c3f">XQspiPsu</a><li>RxBfrPtr
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg</a><li>RxBytes
|
||||
: <a class="el" href="struct_x_qspi_psu.html#8b125949249aea53706a9bfc4fd736d0">XQspiPsu</a><li>SendBufferPtr
|
||||
: <a class="el" href="struct_x_qspi_psu.html#2a11cb56ad7d4b388a4669359156ab0b">XQspiPsu</a><li>StatusHandler
|
||||
: <a class="el" href="struct_x_qspi_psu.html#2ebf04ce847da29d6069795db26fbccc">XQspiPsu</a><li>StatusRef
|
||||
: <a class="el" href="struct_x_qspi_psu.html#af2ea17aa1aae667ccc6190222e218f7">XQspiPsu</a><li>TxBfrPtr
|
||||
: <a class="el" href="struct_x_qspi_psu___msg.html#09fc20d95cb26f29a649207d0b495f58">XQspiPsu_Msg</a><li>TxBytes
|
||||
: <a class="el" href="struct_x_qspi_psu.html#b2d95514007cb4fc72b4427f476cdb44">XQspiPsu</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
47
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals.html
Executable file
47
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals.html
Executable file
|
|
@ -0,0 +1,47 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals.html#index__"><span>_</span></a></li>
|
||||
<li><a href="globals_0x78.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
Here is a list of all file members with links to the files they belong to:
|
||||
<p>
|
||||
<h3><a class="anchor" name="index__">- _ -</a></h3><ul>
|
||||
<li>_XQSPIPSU_H_
|
||||
: <a class="el" href="xqspipsu_8h.html#e5d98c694fbec45e03ac8ac7a0bf9012">xqspipsu.h</a><li>_XQSPIPSU_HW_H_
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3366a39fc10295ec9048d83899e58dfa">xqspipsu_hw.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
543
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_0x78.html
Executable file
543
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_0x78.html
Executable file
|
|
@ -0,0 +1,543 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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<hl>Software Drivers</hl>
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<h3><a class="anchor" name="index_x">- x -</a></h3><ul>
|
||||
<li>XQSPIPS_BASEADDR
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#49734e127e6359b15c1ce7f117748c36">xqspipsu_hw.h</a><li>XQSPIPS_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#96889f957fdaacfd54de755e5ee65d63">xqspipsu_hw.h</a><li>XQSPIPS_EN_REG
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b5bb698f82719c1ffdf5055dd5ebf939">xqspipsu_hw.h</a><li>XQSPIPS_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#125c3a3536e6dca9a5f07f44d2d1e01a">xqspipsu_hw.h</a><li>XQSPIPS_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2313fb0e43c0f5eb2c95bd9a1260e22d">xqspipsu_hw.h</a><li>XQspiPsu_Abort()
|
||||
: <a class="el" href="xqspipsu_8h.html#aa69ec6da90deb760954ea3dcfd55d7f">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#aa69ec6da90deb760954ea3dcfd55d7f">xqspipsu.c</a><li>XQSPIPSU_BASEADDR
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#137198cf9ed99131ff88af7201399ebe">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_BAUD_RATE_DIV_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#48b3cc8b2d9935034b039aabfb073dd1">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d64ffc186724c821d7cc55b4aeb49be1">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_BAUD_RATE_DIV_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#37f707d372fbcfc37c745ff62cd8fb8c">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_PHA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9fccb70fc5ea29d98c3f50dfe17c4e2b">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_PHA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7187578088d1971acb50346b19635461">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_PHA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30ce08292eb1293db101b2dda35c9788">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_POL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0ba50355ead654fc778b5a499d1b0fcd">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_POL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#554d9029242094a23d3431e968d6c8c3">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_POL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#16ef5f7f509807b0b13ad5726d9f74e8">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_EN_POLL_TO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d33bcd2c755cb68771f24f4734be5f33">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_EN_POLL_TO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#81dae524dc35a12cfbb4651bb9560f0e">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_EN_POLL_TO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f2ddbd54acd18f02b4672c2186312a0b">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_ENDIAN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eac40499ca4034f931b2ea531a6013fc">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_ENDIAN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d6ed4a02784f14b06fac16a09b68642c">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_ENDIAN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#95de107fc3ee72382e02fd1adbb9fbd3">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f73da674276d7ba7aca39bfe08f6b284">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_GEN_FIFO_START_MODE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e9d42317afd1df665f226893db2c415a">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_GEN_FIFO_START_MODE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6a23207d51d07830c00518b58c25b5a6">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_DMA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#014fda4357af943315be062a5076c250">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#60acbb4fc55232d1fdcf12f88b7642a6">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d2fafa33e883a7f13ddeecc632296253">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#49938026c5a387a152326b1d6b873f2f">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1d76a2f706f3988da79345132e484303">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_START_GEN_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ee84f57a34e2430e16738110aa975deb">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_START_GEN_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cb3f588d757d3e0c4747df0cfc57317d">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_START_GEN_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c786c85b0506ab185104e641fc951715">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_WP_HOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#84bdb1d6152946bdcd559ea1b602356f">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_WP_HOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#771373ef1eae2f3c9a82a04d3c0c358a">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_WP_HOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#95b22cb1e6ee4b22d96555e11a0347db">xqspipsu_hw.h</a><li>XQspiPsu_CfgInitialize()
|
||||
: <a class="el" href="xqspipsu_8h.html#3c23b3bb935cf4238301444cdcc2e810">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#3c23b3bb935cf4238301444cdcc2e810">xqspipsu.c</a><li>XQspiPsu_ClearOptions()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#e64c9da28908fe94db0c2890fcd97679">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#e64c9da28908fe94db0c2890fcd97679">xqspipsu.h</a><li>XQSPIPSU_CLK_ACTIVE_LOW_OPTION
|
||||
: <a class="el" href="xqspipsu_8h.html#5f92c1428dba9ddfbe53c5322ab85f60">xqspipsu.h</a><li>XQSPIPSU_CLK_PHASE_1_OPTION
|
||||
: <a class="el" href="xqspipsu_8h.html#af184726885a8746f3491828cf567789">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_128
|
||||
: <a class="el" href="xqspipsu_8h.html#a2b9483e70d14d8c089d5ea8137493bb">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_16
|
||||
: <a class="el" href="xqspipsu_8h.html#eb4ea545b7f20a35517850210c69f8eb">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_2
|
||||
: <a class="el" href="xqspipsu_8h.html#282e0a0766d2bb5d1394f988822f705b">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_256
|
||||
: <a class="el" href="xqspipsu_8h.html#d11dc937000484649724060d0bcdf00c">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_32
|
||||
: <a class="el" href="xqspipsu_8h.html#1bb7e07e34628bde17347f45665d658d">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_4
|
||||
: <a class="el" href="xqspipsu_8h.html#f20988bd132defabd58b714360e2d900">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_64
|
||||
: <a class="el" href="xqspipsu_8h.html#617bfea4aaac9e96cf64dc511b5e1571">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_8
|
||||
: <a class="el" href="xqspipsu_8h.html#37ca68c0fddda883028f393eb5626437">xqspipsu.h</a><li>XQspiPsu_ConfigTable
|
||||
: <a class="el" href="xqspipsu__sinit_8c.html#07435c645a3bde95933d0461713e4e57">xqspipsu_sinit.c</a>, <a class="el" href="xqspipsu__g_8c.html#0a1440bbf114a2e065b65bca531a14c3">xqspipsu_g.c</a><li>XQSPIPSU_CONNECTION_MODE_PARALLEL
|
||||
: <a class="el" href="xqspipsu_8h.html#493629a6f3d8fb0312dbcaf3e9cbe0e8">xqspipsu.h</a><li>XQSPIPSU_CONNECTION_MODE_SINGLE
|
||||
: <a class="el" href="xqspipsu_8h.html#19d7a74e6402f4ba3cd33fe08602447d">xqspipsu.h</a><li>XQSPIPSU_CONNECTION_MODE_STACKED
|
||||
: <a class="el" href="xqspipsu_8h.html#cddf674343015377edb4198800b6549b">xqspipsu.h</a><li>XQSPIPSU_CR_PRESC_MAXIMUM
|
||||
: <a class="el" href="xqspipsu_8h.html#e53e5d9f18e5fe950d0ce0165880bb7f">xqspipsu.h</a><li>XQspiPsu_Disable
|
||||
: <a class="el" href="xqspipsu_8h.html#06dd7ccdefd898567875836018f87dcb">xqspipsu.h</a><li>XQSPIPSU_DMA_BYTES_MAX
|
||||
: <a class="el" href="xqspipsu_8h.html#fa633d08d4bcacadc20f2696665edb75">xqspipsu.h</a><li>XQSPIPSU_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#977552f11dd3e4420b3b561de0750157">xqspipsu_hw.h</a><li>XQSPIPSU_EN_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5b7b95790bfeb5bfb3dfd63e4a5e76cc">xqspipsu_hw.h</a><li>XQSPIPSU_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#af14751d681194856cd71ce71f72e170">xqspipsu_hw.h</a><li>XQSPIPSU_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f1993fd33601de8e57bb2c9c33dd0ef6">xqspipsu_hw.h</a><li>XQspiPsu_Enable
|
||||
: <a class="el" href="xqspipsu_8h.html#a44815f385a69052a3f637f57428f506">xqspipsu.h</a><li>XQSPIPSU_FIFO_CTRL_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c14f429fa7d15b5c4bf2808ed08e7120">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#636d32a41e6eb12228ab4544c8a89dd8">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8aa72ade570a1a72ac2fab8dde1e1b8d">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c1c84b7591852289757c0c12f19f6824">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cf6c7a98e1c31d8c041efac8b94eeb52">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ad90f62d7eec225ddc1c3f295ca97f12">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f91054c38b75882abb7ae5d175eeca5d">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d8ec48f6a6bdafe46c76289e9c11f877">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4438ebabb66d07f63394c60474cb9a5b">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1f0ff603545f3c59f2ae76c2e00be87c">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_DATA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#07331f7d9961866bde081f89fe2c45c7">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_DATA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d18171abd29f127020e30dcdc01f2bc2">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_DATA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fea2a1db0d2754b88eee5bda086319cc">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3bfe2023b6a6ce56e9d13f130bd1c86d">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#64f95a614341a1767e27cf852998c3c4">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b1a0209b2e67ec12bdbca254b3eb4bf7">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6d5959168d250e4f7494732ed29d65ce">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6cda67575b7282414c10d9ca86a014e6">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_BOTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#055def1a338a7bd5775e0aa4f8d703ae">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_LOWER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9140bced719aeb6650ee67bd82bb7bca">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4b229d9980f3c61a508e61e97130dd93">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_UPPER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#90863432a0e1c93a8d3c4840a5046312">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_CS_HOLD
|
||||
: <a class="el" href="xqspipsu_8h.html#74b7854d095af4f443a976b426cfde7e">xqspipsu.h</a><li>XQSPIPSU_GENFIFO_CS_LOWER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0c7666c8ca9186ce3f3d280ab860abde">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_CS_SETUP
|
||||
: <a class="el" href="xqspipsu_8h.html#a18ef26888b9b8f28135654a310b5924">xqspipsu.h</a><li>XQSPIPSU_GENFIFO_CS_UPPER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d075b4d54b892f2e754bbd2ecb9eb2c4">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_DATA_XFER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8930f017944733f989480fc03e46e955">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_EXP
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1e6b755ed1a7cae36ad77edb1d2056f9">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_EXP_START
|
||||
: <a class="el" href="xqspipsu_8h.html#9910c1e3f79127836cade9970a9df537">xqspipsu.h</a><li>XQSPIPSU_GENFIFO_IMM_DATA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a8a6c468b32dd07920d5a47ec6294d79">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_DUALSPI
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8261c65f81af4f5d8f8d8419bd9ce16a">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b6c734f8a89112c745ae85724c0f9198">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_QUADSPI
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#76cec7e7ee7d81ad88cac1519ccdb793">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_SPI
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2312f75bef62f389637acc6c0fe98203">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_POLL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#03a9a23c73098ede8c47263911488e37">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_RX
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cea0675b723cf9ad3f5eeaca3fb4d743">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_STRIPE
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b0b8b2f60b373ed19a823ff11cdefc7f">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_TX
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c63b41003c934914f57ec8da23faf1b">xqspipsu_hw.h</a><li>XQspiPsu_GetOptions()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#4a71a2847d3d2e11d9c69c29084e38df">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#4a71a2847d3d2e11d9c69c29084e38df">xqspipsu.h</a><li>XQSPIPSU_GF_SNAPSHOT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fdd5572319c31ce9e0a4e2e34622c1d6">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dda8c30c269feb26bc40f588da2c6097">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#93a3cc75451b27f6559983b76e18911e">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6ca954e0863135e1ba9b64cddc764f60">xqspipsu_hw.h</a><li>XQSPIPSU_GF_THRESHOLD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5a8034417fd3c9846c968679c1cad859">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d50a54ee932051b2fed093ef6f2e8a12">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_WP_N_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fc706224e94b8b9aae93d1bb14d244bd">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_WP_N_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3718ed0573cff80c1dc16b604e4653b8">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_WP_N_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eca62214455d6d5098a81d1ce1237a04">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_ALL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c5ad3237e06b306dd09f876dc8a2445f">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7ff79fdfb738b1aa9da7da1b69efaf53">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b8cd142762c6f566ea03bfb9dd9e26ee">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#69f98bbda5d969b0e344d1b214b12e94">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3aa9bfb67d633f855cf6309467b52fc5">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#713fffdd4fc3974eacf87cf57bef4d3f">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8ff53f8472bc264a8e11fc23d98e8dcd">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30efac42afa9c679fcb58d8a2b3fb5c5">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#049c752447cb8923454ec7cb11a77bac">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#627a709f65e7776f529d69ffc2013d7b">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5eb684785dfb0a249b18126089624b91">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8e9d89f1bda9e54e94ff046d3ecc7bae">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8cd4e034aa2fef80f18f13ed427054a7">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92255aa3166be0f92ad40cdfb118b641">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dec77ed3456965cb1d5eff277ee3d033">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#02b4569f0b80bf6f60ff2a71a2dc39b9">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ebc9edf79074885ff77e4f985095fd50">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ee75941a2e175942356db9716a116df7">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#198b57421e658f174db74fe7de2aee54">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#afbbe1eabc3697e78f35cfef8c95dd24">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c2702dd262b8a4d08c70a4b1f9eaac7e">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c558673fbec3d68729349ce4330cbecb">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d5a663c93d8e3be7ac427fc24643a5f0">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bc6a96e745d9dadc68a8703a0ca46136">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a852f2d66139b8f643e0d7229d0fc678">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a12869c10c832ce654fc31128ef422c2">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b5ccffba2efc6db9680052c18cfa6762">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f096ed6387f093582d64c738bf432c9f">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6485347e92b591d67a46a58801cfb76d">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d8264f6b3a67886b80e596935393e2ad">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c199858ca94fddec314c837c6e012dc2">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c4a1915b0626096a00265c1d6574ffac">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0ca8a77a99447ebec472fa5616aaf075">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#18a196026bbb30c0be2b7f563f1ef514">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8832469d79138702ee460d8dfdc39cd5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3917dc8f00c02319d3d388cf7053f12d">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c8c577496c48738f26eca00fbeb2997">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6f92b0d136c51e7566363fe3398dcda7">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92a75418a3aaf26104c0a013ddabad19">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1b49b036b952ff81f0e74a5ab4d03e8b">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#86506cfcdd6165f72907eacd01e649c5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b8e3a4621239cb556fc8acdd0a6d10b6">xqspipsu_hw.h</a><li>XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7e56e82bc0cf983a788abf916a648244">xqspipsu_hw.h</a><li>XQSPIPSU_IER_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#344cae10f68de138962c4fae7746880d">xqspipsu_hw.h</a><li>XQSPIPSU_IER_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#41dd4af0f034e73ab8508450efb110df">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#83d2877403883d73ba27978f8a66af0d">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9f244e10a82deaa7faf6b30480aea7e5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7e54d921015916bccc3dc9d808962218">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a5280c9a17c4e4d407af7bdf9fbb9e65">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6ebb4704d617d04ca285b961a5f71314">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#317fad3c0f08202172d5ac7828ba5761">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b0db03f42761412d147a24f70d622bef">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#37c907c28cfac57681aac4f3d2cc800e">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8cbd7d48ffb1fec6de2e0f1d4021b1eb">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6c158b9b577de62df32984fa3277239c">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9a5c54481edf87eafb22dacb3a5f43b4">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92cbce0e114256e442411b5aec9511f8">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4cdf7f8891dbc5262b863311e861d0f5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#61d414723ff949466d8262cb09aa1d6c">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#94ef816765a6bc8ed702a9509181e88c">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#15b5075d4c943c71682b5aec6265e3ec">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1ed916045c6867cc83765192cb2e0de4">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#95c3565a4276ddc0d8e12215eec7b4aa">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#168b7548d332ccdbbdc64cda2e5b7264">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6c763dd851fea56cc4ad4621c80ab00c">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4355b784b5fa03e0e1e6bb71082ca9bb">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1d82132b380817721395622000d6174d">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb9c7061650a9e261fe30871e9957281">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#df9c01b9a4478556933082bc03189e3e">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#31959d17fdf5bffc0ec12b9b2ae9a1f1">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#890cda7177e5295b10615e1464e74bdf">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0cde2c77110d998919e66d3cb2c9f65d">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1711ff533a11dd37b3d72056050025e5">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6b1f2d368f0fd7b06adf8781d1a9837e">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#01e8bf0051bc67f9806ea33866163a9c">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#81be6689170270886c5deea126e8faff">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a05f1119dc47f4e498017a0ec00cf7f6">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5981d36a9fe0e865d504f31a8d639c0f">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c9d661b97c366df6fbbe75a86c510bfb">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc2b998de7a0553d2a7fbf46ed7a77a4">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ec1a53dee68e0b14842ec9f41079d45a">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7a363be77ba1868e042eab54175f4e8f">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e7dbd0d93d57a53e985eac025e204891">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#252089511474b376379e21d03324b338">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1d8de28ed67afd33cefe17c5218a331a">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bfb51b6802fff87a97635bff17bfda93">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4c58fb9c4d2200e242ff450126ec16e8">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b084b88249b77c770060053bd181a792">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#62c0013d297f0e5d341514fa3dbdfc4a">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#59e00c301549fa522b7eb40dd9e25171">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e36a91f727b1d1f5b675407c3e00b1b1">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6249d92bfccaccc3680ad8287d34ad05">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ff16e4c8ff170a151a1bd453730f6ac5">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#af29b6f35625908251f087f7b797c5a0">xqspipsu_hw.h</a><li>XQspiPsu_In32
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c15438de9bb521c5731be71e6bc31ebb">xqspipsu_hw.h</a><li>XQspiPsu_InterruptHandler()
|
||||
: <a class="el" href="xqspipsu_8h.html#8a8f3a75fb4cb75c943245c7b9fccfd5">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#8a8f3a75fb4cb75c943245c7b9fccfd5">xqspipsu.c</a><li>XQspiPsu_InterruptTransfer()
|
||||
: <a class="el" href="xqspipsu_8h.html#7c466797e1ee111cea006766a5547eee">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#7c466797e1ee111cea006766a5547eee">xqspipsu.c</a><li>XQspiPsu_IsManualStart
|
||||
: <a class="el" href="xqspipsu_8h.html#1f18d2f96e456164200f407fef9bec94">xqspipsu.h</a><li>XQSPIPSU_ISR_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e7928789ab182d71a0360c50c04cfb64">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a27a4168a18193d5afee00109049a4dc">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e8dfd0d31ed4afd6d6a31c822ffe9d0c">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cfa64727ceb72b9607544e92c4076582">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f4d2280070de1ccdfcb84868bbcb71ff">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c041cc59a45645cddfa6d642e72ff1c">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#391f5e49d75dcfa36e3a87602f8bd041">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#858bc0bec834ca6fbd0391344f05baf3">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f91ae38e48600a5e5bdbdcd7c87ac916">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dae24d033fb12577e3e4eda5427a950a">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#52002b54521a589354a12413d6037f55">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6aeff30c8cc063b806b28cafcfef970e">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6670316b327a116df182dae3c7ef14b5">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fa1357dd40fff82a11471d589edc8c24">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cd6a2bb2a65244bdd203cb9d6106f9bd">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bca87ef79796944b674376eb004962aa">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b7c9ec748efb6603c9e08ab6c4a19562">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5614fb7c43f2295625a1d8ee93a6e0ce">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#68214e35f32f4ce49ab14967949a07ed">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fbb29916b8d3ac4a6a09d4a414f712c8">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1f4f968a1d2a9c7b9134e34a4828160a">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#139c17d2d7819552d7d46dda45b2705e">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b83d8828517dda57f65d558cc4b11a40">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a4941eb6f67e9800ed4f03418b04c81e">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a914a82f6076b9a807d5dd4e0565e69f">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1e41fe64461cbcea181cbde6ee2d0600">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2cfc1ec9759ece536ea32c8061995bf2">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f1aca5a1f9aa8633ffd3e021f5e8247f">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3775f12bac4f69e6a69425ff820835e9">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#94f57e0a7160e9f6564c6ff409645928">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cb31ee1a6fc9072ee369761a82f86f3a">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_WR_TO_CLR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1f6d8d8245874f422d990d496a48c288">xqspipsu_hw.h</a><li>XQspiPsu_LookupConfig()
|
||||
: <a class="el" href="xqspipsu__sinit_8c.html#604c468e86aab21cab0b93ee8c0d8942">xqspipsu_sinit.c</a>, <a class="el" href="xqspipsu_8h.html#604c468e86aab21cab0b93ee8c0d8942">xqspipsu.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY0_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#24c6a6af0561ac726f1f10ab22751a40">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY0_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cd127a1cd42af0e1ecff5851417697f2">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY0_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5b5b0de93e54b1d188ea9b6bc16b416e">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY1_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c07884e55a0a90c2cbc08ff0a6b6e6dc">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY1_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6498ea584162316020932c24ce29b668">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY1_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9c6bcfe12e4f33075c937620ad54d1a5">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4636d144794bb35424cacd6f6d49781a">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4c386f9e3a0e70f604cbf64ab89a7383">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7c26771c8e2384b52323d84f44b2fac6">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6f55f2f44799611f946baf8b8e71d76f">xqspipsu_hw.h</a><li>XQSPIPSU_MANUAL_START_OPTION
|
||||
: <a class="el" href="xqspipsu_8h.html#47c246bab4c5d4f6c8ff84e44049adc9">xqspipsu.h</a><li>XQSPIPSU_MOD_ID_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#33cc8bc84990ebd02f0c3ce61d1b6b33">xqspipsu_hw.h</a><li>XQSPIPSU_MOD_ID_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9dae139fcca838438b3e14f4306f1f06">xqspipsu_hw.h</a><li>XQSPIPSU_MOD_ID_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc9f034e70b42b5416121e711a0cbe95">xqspipsu_hw.h</a><li>XQSPIPSU_MOD_ID_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5ece64f34919ab3b1e9cb10cf1c01df2">xqspipsu_hw.h</a><li>XQSPIPSU_MSG_FLAG_STRIPE
|
||||
: <a class="el" href="xqspipsu_8h.html#767a4572b5fe31cd9ff390c44d25e968">xqspipsu.h</a><li>XQSPIPSU_NUM_OPTIONS
|
||||
: <a class="el" href="xqspipsu__options_8c.html#7270573aac2e897d40123dcb0a181aac">xqspipsu_options.c</a><li>XQSPIPSU_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#31c5986aae494ee1e370e7aa1cb9fecc">xqspipsu_hw.h</a><li>XQspiPsu_Out32
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f9672b4f2ec43ccf15204998ff3df728">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#311de6f25e5cf64057e9ba429cf86507">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_VALUE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#67e9f14a5632e5c8504c7ba185f6b377">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_VALUE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e85c78b01490ee607527f2147ebf9a4e">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_VALUE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ca4d95388925cc92cd116fccf9220164">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_DATA_VALUE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1b8d3a39d3a1ede6b87bb11bf3e15a43">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_DATA_VALUE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#138a8001a0f62594564c96e6398ecd5a">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_DATA_VALUE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7f2421588a71d5104922416e8b9469a0">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_LOWER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0f7280cd0f8624b6de99fec9d9a469a5">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_LOWER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b62983c1bfe390cd7adc042fb91cbb5a">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_LOWER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c786ce45963aa797cb95b91c8b9b62d6">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_UPPER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#651ea64178b92b0811c55c6c03f086e0">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_UPPER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#05f3a78b23efc4e8cdc730bff2f35330">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_UPPER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#13569fde078dbbfaac679afaaef4c2b1">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_MASK_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#29d0864253150436c689d353adb40cf5">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_MASK_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fccf7cc820b6e40f393c30e8476952b4">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_MASK_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f073fca2ff52723f8f23808430dcedc0">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f657fc3a38e22e512c0f7cf03bda1ad7">xqspipsu_hw.h</a><li>XQspiPsu_PolledTransfer()
|
||||
: <a class="el" href="xqspipsu_8h.html#17d058fa58b8599c1db27092f444d0d0">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#17d058fa58b8599c1db27092f444d0d0">xqspipsu.c</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cb00be2007021a12b97d6282fb2bca5a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f4839ea4b806727ffd8cbd72c96eb82e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#39b0151b1cd09cb2da8d67efeb8ec0cb">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb726c5a408170ae0e1f00661a4bf41c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#26f769aa9e3c62220857e6db8c1e2212">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3b9c82ef758ea9e8bfda707130051091">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b993adfc8d3e5fd256f46c9543ce7299">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c6ab554d9ab60514d9e9b22260d9f6e5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#723b7c6f984082e38c0bf95437f7af2f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2a1f9350cc7eeed3a973be727ab648e1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8ea8b60dbc73aa86862346d22ed39b1f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cd88b1d57388f468a09208ed57e002aa">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0389e85e43dc1dda200917545858b8b9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#523751055658607c8b40048ef550c80c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d11e1e53c55440afa41685846b74c9c7">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#99d0e899aaaa748f7d862dc1b81d6320">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_SHIFT
|
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: <a class="el" href="xqspipsu__hw_8h.html#f2944b6cc7145d005fc5c2b18224b587">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0a1af0bab0712b0e003d5349988a4c7d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b75d9101cd044cf3df45c81f304811e3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_SHIFT
|
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: <a class="el" href="xqspipsu__hw_8h.html#b2098e43b3d2b1be9d24ad18510c92a1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#98632b410fbfefd80e247d3c8f7d93ab">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fb77b58d816db5e0a21a532a1f9280fb">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f6ba9bfc54f1b6247e7472ae40399229">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#674b6e955b0141456482625acfbbf8b8">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f24745d9cf69ffc80acee7e67f156d3d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a64694cd2bf08584586602226da3e9a6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9bb0cac2e01610356e88015c4d2f3b07">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9b985b0ced7d6e790eaa6f5804efca84">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eaa0a80cbb576e4a7aa4d00e99b02a86">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ea4fa96349afdb779cd1f88829bad949">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#faa404a9e4a5137615a1bb0205d54798">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#863cb44339ed10347558e304166e7b1e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ed4d839a0b110c93ba907ed2d39de3b6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#48d0c63798b35da7ca3c4a4e5eb93c1e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#809ad867b6ee031e5a54445d077edc14">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#561e23d469b3e62a22b70de380173d66">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bd1f950015647ad4badc0554b06f4d33">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bb6c6d1f62756a0c22fc8caae2cf5187">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#179fa006eced0e96ae2ec3f6e54350f0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ab8f3ed04924c50ac623beda99450b20">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#45cdc6111be74e160ff566dc0c070ee3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#83c7d22d0a1cad6eb84224213cc6124d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a7191f7e5faad4dffadbdc79efdf8d47">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f63e637aca6336a6fbe5a026c3702061">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7d2c335236305825a111a0e305395cba">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1c49b7d688c394b3bb37d4293fa34df5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a0e3712ff717b419843ea20623863af2">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1846046a5f9ffba61acf652a3081bbe0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c1979f187af54cc81bcddd06edefc478">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#074bc57011bb0c5fe75d8a7f44951bb3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#74792d5b8a9b48737a53582af3c07cb1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4ed1ef3c1fcff8b217df6f68ea606989">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ad22182c1fdd3c41fcf9566816dc7492">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b33bc2f0ad94595f39219b3d95646e1e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4c73d6f9e015b79b55d3fc23f87ae548">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2258b69501bd844fd3e03a89dd574bfd">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#99b75e585ce2840824d1e9d790105db1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#317eb7eada64f4e30315f49657a38949">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7663feb16b8ad4dba7f262a748af9652">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8d696592ac957f47bafe4522797f3952">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b1cfba74030795a9d9bd4981a96edd6a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ec84e5cfb4961bf4c918440383cbb273">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6a0eaa5b293018f854824ee538194c78">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8a0771952a47a3b817903fbd5baad380">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#41c4a11ea36f466400462ea557008b41">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cdd5cb03cc493cd30b30e4202ad0a0b2">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c8c0f19580b0e6d06669bf52f822d059">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9e71ff58ed3e7e2aa529b49cbba83610">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#04b009825df34055ec8a92ac44e651fa">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cc7bfa23946433439d9a2ebf6fa08958">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a7f286e160286a6d8275f72b1c39f67c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fec736ade882155c77d6b9b078e0f99b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0bab75d14eb5f6ed8bea76df90208dbe">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e6f974fefd9737e3b0e28fa107567370">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#948b1efee1450bf418b0708599b82a9d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5d445cbbacf5e7f7814394a647048753">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#553d272b3998c4103f8602a134dd3416">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#38d3e72de424d610d1a4ba7e756a7a41">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#70120d7049eaf1741c8902becc96f50e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e2cea755593f666377dfce271e60499a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#306f7011313e063194221ba4823510e6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc22f2f22d9ac9d2d3be226df47f2a84">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#42e3880df5843995d386c500477ebf24">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1e2e78c77a5c920471fb2cf7b63fac7b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9ef920a2ca9559640e049c486f506b7e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b4bb114c18507d855e39395599afe055">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#33a308d0a889646f28aa0a31b8285e22">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cc7f56136d37bdadfdda20df8571f116">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9fbfb47d04bae2a58d88ee13d4abf980">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a8839687248a33847a620830bb21d879">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ceea2425458ac2a40305f93e496865a9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4147df2e80f4fdfba4de8fc946c5a4a8">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#721a8a2b89756ed4dee65f326f8190e3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#429256ef7cc7687d1b9b9f261ebf6a2e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2fdae9274badf87d8fdc5bb4fc55e9ba">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2c4740f4a8272c26e9564702caaa3b87">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fb77ec57bb54dc1e53551f09000be329">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30c384a6eca64dbe879b97924f8a3ae6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e05f33092a03442ea36b4a82c3e1df9f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6d301fde1ea17e539a1c9b2278cae604">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#27b3f49a7be4fcab512bda09e1e7f976">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#546e993922e83328c49b6fa468aa846f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a6a36e8c399c969a51831dd177526fbe">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#591b2137dac813735469255cba68749d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#74faac5b286e02108369509b546155c5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#294a5f389f295aad3a5e54bea0d1cdf0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a967c18f241c334ea60d5c98657e9dfe">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a23b3052d4c6762a67fbc212d25c0e5a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3757aa7e6983e1c19871d5cafec6ca2a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5cb54bb71036339bce5ae6df3a6ec99b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dd8254fc73e4a1b233eb88ce163fa5d3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f9b1bb347caae6dc1ab1340e84916c93">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7fcb2a02499c783baa52e6dbba23e228">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5ee3ff80b86830bde5b35441f808f416">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ae98816a716a3630e824c3cb852724ad">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#38acae16f287336c83a7babd6ae297ff">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3e7292c9caa78358c6e02145c3b299a1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#60086f4b73b4d45996735a980d68a2b3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1ab05b39f2d21706cb689ae5c5671cd1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#966cce1d707de11d6f8a02f6d5cfe3b3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cf8bc3fbac292bd7353067dcb547828c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#09935c1cd7063013d4d7880606a04c3b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92dae3bbaf433837decaf2230f98a349">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#984702f55e65c5642b5167ecabfbc8bd">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0516b4f83c13a92b9a1fb573bc76ee3b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7cab8cf8712279ec34decec6b6539095">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c0c24155205170453c5dbd63b18846fc">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#73b84eeb2e5b5cae116d482e6a55b5bd">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b3a0e6796ca7fec16f480bf634851261">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#36001fb8f1e1114d177df1509e1c3740">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3948a56db7c8931eb274ace756b8d14f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b6c4685faa0de3fde0197afd7a78524a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb05ec0712faeb5750de793e5b253d1d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bfcd19f2bb7aff5f17d8c35ffe4ac774">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30ca967a9288020ef44470e6f09c2b6b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f247424d4cf6853321661c1877da9be2">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4664b7dfcd237f2d5d978943a5656767">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5e2523f73d68d423a45f5bfadc9b950d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3d646ef6c15472ce4f88938f7f2dccd9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d480db440b9c2807d461ba1ba56d4bb5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a736fba149e752cdde498124580e55d1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a7e0f93ceb34aaf37b4857a97ae672aa">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4980e2d421892b46b5cbfc210dd87729">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ebb5419ad726384a6848b0b55f0f4dd5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_INTR_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7fcc65f1804a3b09d2578888a6ac1278">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c3a77c17cdc599e640dadd63d60b21ab">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b2dea188a0404d6e555c4ff2839eb86a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b9af3b60b2f5305ab70b70c430e695de">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c70ae2a63d008b335e51d9e3f71c4c9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_BUSY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#28a7180c7ddc44364157dd75666718d4">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_BUSY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ecec61c2aace2c0586f5c9b0491c65f3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_BUSY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#19664047f57d0b6d5897c97927367978">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#93dc8fe59720d81079c993682e5bf310">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92c00900dc411f8f09b99913f96dd37e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#964e0fee9789a290fcace60880702ad0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc2dbd0dfe87b5adf440e9001c4658b3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a5a88d98f9a05c1b3636a81a93f6c2e3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#751c35c56034073e8e1ca0dd8d9f9bfb">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8fd8100c320c3da46a93af5adf6592f0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fd6f55d877c432a60099d8b4d8734e39">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7f20515e77a83b8acb0010b7d788fe75">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d51955f7901e0a5b8b62fb0f614be027">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4332dd0868d1843ae3a49d74844d2a8f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#706a6f83a128361fb2cf5383ede70157">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bdb224d4fe165442dd8bb5a86215a522">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#07a8c2c8600afaaabed4bf1bd9899205">xqspipsu_hw.h</a><li>XQSPIPSU_READMODE_DMA
|
||||
: <a class="el" href="xqspipsu_8h.html#6e5ef224ee243dc64228ad60155a3f8b">xqspipsu.h</a><li>XQSPIPSU_READMODE_IO
|
||||
: <a class="el" href="xqspipsu_8h.html#fd11c8b8f44530c3670d2ac7497fb2fc">xqspipsu.h</a><li>XQspiPsu_ReadReg
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b88bcdb0f53b21b79cd0805cfd14cb89">xqspipsu_hw.h</a><li>XQspiPsu_Reset()
|
||||
: <a class="el" href="xqspipsu_8h.html#799b60ee7157ed46b84475677aa0dc03">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#799b60ee7157ed46b84475677aa0dc03">xqspipsu.c</a><li>XQSPIPSU_RX_COPY_LOWER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ee37c159c17dec939074401a938d66ee">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_LOWER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#993052dd4aa7866b3dcbf7490149193b">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_LOWER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#957493785248c5762016e67eb2ecc8e6">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#419ba63e8028ea7e8aa833523ea3a785">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_UPPER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ab88c2334a6c2daa47aef99b8a274f18">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_UPPER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fda8bb05c3ae9966da0a4ee2912b4d9e">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_UPPER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7e2db1ba9f810863b5b5931c14f5624b">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1852adc164161e4766176ecd534dc0ae">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cece9a81e11ead6c13917b2a3a556b00">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#910b62e23ccb5ecd6da94be71650fc01">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0b160809c8a8f8c95ba37c69e8ced2e2">xqspipsu_hw.h</a><li>XQSPIPSU_RX_THRESHOLD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#97be55c27b71a154877fb5f919d627f1">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#17d0aaf5e8072f155042fc5189c6808c">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#68b0b4316693414546980dea7baaf0a4">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3812e16ad9153e4c2346531ad88ff01d">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#85e6c7585d7b8d4ddb96cafc3cba1eea">xqspipsu_hw.h</a><li>XQSPIPSU_RXFIFO_THRESHOLD_OPT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0c7a9a125726f6b42fe5fd0aadc5307f">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b11050c94363ad8c387653784d2a58ce">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#84156abbc51d17b988b1e82c584be10d">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#85886e9529a62ca0971ca35dd7181dc1">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#578d77a8da91f669cc31b9582aaf6e51">xqspipsu_hw.h</a><li>XQspiPsu_Select
|
||||
: <a class="el" href="xqspipsu_8h.html#3206beea9e70b6903f998c21bbdb1ab6">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_BUS_BOTH
|
||||
: <a class="el" href="xqspipsu_8h.html#5d8490a76bf6be3a4655e3fa8e90a19f">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_BUS_LOWER
|
||||
: <a class="el" href="xqspipsu_8h.html#2d896ad5edf8b15e6dbd4d7a87517a35">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_BUS_UPPER
|
||||
: <a class="el" href="xqspipsu_8h.html#9eeab1d9cd47c4a0281d9188d3072444">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_CS_BOTH
|
||||
: <a class="el" href="xqspipsu_8h.html#b8fb3a2887dbf0331cc9057afea0ec53">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_CS_LOWER
|
||||
: <a class="el" href="xqspipsu_8h.html#4c5dd4c0387f6ae12a78b86c653bb74d">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_CS_UPPER
|
||||
: <a class="el" href="xqspipsu_8h.html#2211df126779f654595c9663f5624ba4">xqspipsu.h</a><li>XQSPIPSU_SELECT_MODE_DUALSPI
|
||||
: <a class="el" href="xqspipsu_8h.html#a57e6e6b6efaaa981a9a81ae9db3d78a">xqspipsu.h</a><li>XQSPIPSU_SELECT_MODE_QUADSPI
|
||||
: <a class="el" href="xqspipsu_8h.html#6750df2d9d9169fdef76bfc957ae501c">xqspipsu.h</a><li>XQSPIPSU_SELECT_MODE_SPI
|
||||
: <a class="el" href="xqspipsu_8h.html#185ba58041ded76c03bb18ad69e783af">xqspipsu.h</a><li>XQspiPsu_SelectFlash()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#28338ae42ed4f7d2685ab18de2d21128">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#28338ae42ed4f7d2685ab18de2d21128">xqspipsu.h</a><li>XQspiPsu_SetClkPrescaler()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#22b18488a0529eeaadc3b5966f18855d">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#22b18488a0529eeaadc3b5966f18855d">xqspipsu.h</a><li>XQspiPsu_SetOptions()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#489dc7a54f66696b3cc98b74ec3d0276">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#489dc7a54f66696b3cc98b74ec3d0276">xqspipsu.h</a><li>XQspiPsu_SetReadMode()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#9f08409af64f221800e065b4fd31cd75">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#9f08409af64f221800e065b4fd31cd75">xqspipsu.h</a><li>XQspiPsu_SetStatusHandler()
|
||||
: <a class="el" href="xqspipsu_8h.html#7b78484a0a6c8b30976a911a2a6c805a">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#7b78484a0a6c8b30976a911a2a6c805a">xqspipsu.c</a><li>XQspiPsu_StatusHandler
|
||||
: <a class="el" href="xqspipsu_8h.html#a8a9e7bc144fabb62eb6a2d3d2ec7b0e">xqspipsu.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb2831272c645a1b392e4f62eaea1448">xqspipsu_hw.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9cc4bdd124b82ebee27c06e2af91e884">xqspipsu_hw.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#190f5bd11574e5fd648a40d31ba308db">xqspipsu_hw.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#31718b5d33dfb588ae195a6ece1ae996">xqspipsu_hw.h</a><li>XQSPIPSU_TX_THRESHOLD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#33bc760357127168b3a665f969036421">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_DEPTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#caedfa6d1462da9c4542f6ece2bf3536">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f3cc923bfcdf939e66395b7b01a54093">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4884f0160746c6696598ef6dda1fc9ff">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7ff98d251534141c0caa6e4ce9f490a6">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8524a39fa5536400dd8f54a15d91f0b8">xqspipsu_hw.h</a><li>XQspiPsu_WriteReg
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#584ee0482b95d3f49353438ca58fb180">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4951a0b7d9ce35780f74864a196092e4">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_PEND_BYTES_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f924c241bb415ac88853733bc975ed12">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_PEND_BYTES_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1fd56f9440b15af05ac96a196b4c4650">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_PEND_BYTES_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c8022ff211d2c8ff3c13bff6728dfb26">xqspipsu_hw.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
47
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_defs.html
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47
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_defs.html
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|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li id="current"><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li id="current"><a href="globals_defs.html#index__"><span>_</span></a></li>
|
||||
<li><a href="globals_defs_0x78.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
|
||||
<p>
|
||||
<h3><a class="anchor" name="index__">- _ -</a></h3><ul>
|
||||
<li>_XQSPIPSU_H_
|
||||
: <a class="el" href="xqspipsu_8h.html#e5d98c694fbec45e03ac8ac7a0bf9012">xqspipsu.h</a><li>_XQSPIPSU_HW_H_
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3366a39fc10295ec9048d83899e58dfa">xqspipsu_hw.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
527
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_defs_0x78.html
Executable file
527
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_defs_0x78.html
Executable file
|
|
@ -0,0 +1,527 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
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<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li id="current"><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals_defs.html#index__"><span>_</span></a></li>
|
||||
<li id="current"><a href="globals_defs_0x78.html#index_x"><span>x</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
|
||||
<p>
|
||||
<h3><a class="anchor" name="index_x">- x -</a></h3><ul>
|
||||
<li>XQSPIPS_BASEADDR
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#49734e127e6359b15c1ce7f117748c36">xqspipsu_hw.h</a><li>XQSPIPS_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#96889f957fdaacfd54de755e5ee65d63">xqspipsu_hw.h</a><li>XQSPIPS_EN_REG
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b5bb698f82719c1ffdf5055dd5ebf939">xqspipsu_hw.h</a><li>XQSPIPS_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#125c3a3536e6dca9a5f07f44d2d1e01a">xqspipsu_hw.h</a><li>XQSPIPS_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2313fb0e43c0f5eb2c95bd9a1260e22d">xqspipsu_hw.h</a><li>XQSPIPSU_BASEADDR
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#137198cf9ed99131ff88af7201399ebe">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_BAUD_RATE_DIV_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#48b3cc8b2d9935034b039aabfb073dd1">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d64ffc186724c821d7cc55b4aeb49be1">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_BAUD_RATE_DIV_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#37f707d372fbcfc37c745ff62cd8fb8c">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_PHA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9fccb70fc5ea29d98c3f50dfe17c4e2b">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_PHA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7187578088d1971acb50346b19635461">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_PHA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30ce08292eb1293db101b2dda35c9788">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_POL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0ba50355ead654fc778b5a499d1b0fcd">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_POL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#554d9029242094a23d3431e968d6c8c3">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_CLK_POL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#16ef5f7f509807b0b13ad5726d9f74e8">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_EN_POLL_TO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d33bcd2c755cb68771f24f4734be5f33">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_EN_POLL_TO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#81dae524dc35a12cfbb4651bb9560f0e">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_EN_POLL_TO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f2ddbd54acd18f02b4672c2186312a0b">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_ENDIAN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eac40499ca4034f931b2ea531a6013fc">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_ENDIAN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d6ed4a02784f14b06fac16a09b68642c">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_ENDIAN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#95de107fc3ee72382e02fd1adbb9fbd3">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f73da674276d7ba7aca39bfe08f6b284">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_GEN_FIFO_START_MODE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e9d42317afd1df665f226893db2c415a">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_GEN_FIFO_START_MODE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6a23207d51d07830c00518b58c25b5a6">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_DMA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#014fda4357af943315be062a5076c250">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#60acbb4fc55232d1fdcf12f88b7642a6">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d2fafa33e883a7f13ddeecc632296253">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_MODE_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#49938026c5a387a152326b1d6b873f2f">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1d76a2f706f3988da79345132e484303">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_START_GEN_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ee84f57a34e2430e16738110aa975deb">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_START_GEN_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cb3f588d757d3e0c4747df0cfc57317d">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_START_GEN_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c786c85b0506ab185104e641fc951715">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_WP_HOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#84bdb1d6152946bdcd559ea1b602356f">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_WP_HOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#771373ef1eae2f3c9a82a04d3c0c358a">xqspipsu_hw.h</a><li>XQSPIPSU_CFG_WP_HOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#95b22cb1e6ee4b22d96555e11a0347db">xqspipsu_hw.h</a><li>XQSPIPSU_CLK_ACTIVE_LOW_OPTION
|
||||
: <a class="el" href="xqspipsu_8h.html#5f92c1428dba9ddfbe53c5322ab85f60">xqspipsu.h</a><li>XQSPIPSU_CLK_PHASE_1_OPTION
|
||||
: <a class="el" href="xqspipsu_8h.html#af184726885a8746f3491828cf567789">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_128
|
||||
: <a class="el" href="xqspipsu_8h.html#a2b9483e70d14d8c089d5ea8137493bb">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_16
|
||||
: <a class="el" href="xqspipsu_8h.html#eb4ea545b7f20a35517850210c69f8eb">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_2
|
||||
: <a class="el" href="xqspipsu_8h.html#282e0a0766d2bb5d1394f988822f705b">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_256
|
||||
: <a class="el" href="xqspipsu_8h.html#d11dc937000484649724060d0bcdf00c">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_32
|
||||
: <a class="el" href="xqspipsu_8h.html#1bb7e07e34628bde17347f45665d658d">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_4
|
||||
: <a class="el" href="xqspipsu_8h.html#f20988bd132defabd58b714360e2d900">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_64
|
||||
: <a class="el" href="xqspipsu_8h.html#617bfea4aaac9e96cf64dc511b5e1571">xqspipsu.h</a><li>XQSPIPSU_CLK_PRESCALE_8
|
||||
: <a class="el" href="xqspipsu_8h.html#37ca68c0fddda883028f393eb5626437">xqspipsu.h</a><li>XQSPIPSU_CONNECTION_MODE_PARALLEL
|
||||
: <a class="el" href="xqspipsu_8h.html#493629a6f3d8fb0312dbcaf3e9cbe0e8">xqspipsu.h</a><li>XQSPIPSU_CONNECTION_MODE_SINGLE
|
||||
: <a class="el" href="xqspipsu_8h.html#19d7a74e6402f4ba3cd33fe08602447d">xqspipsu.h</a><li>XQSPIPSU_CONNECTION_MODE_STACKED
|
||||
: <a class="el" href="xqspipsu_8h.html#cddf674343015377edb4198800b6549b">xqspipsu.h</a><li>XQSPIPSU_CR_PRESC_MAXIMUM
|
||||
: <a class="el" href="xqspipsu_8h.html#e53e5d9f18e5fe950d0ce0165880bb7f">xqspipsu.h</a><li>XQspiPsu_Disable
|
||||
: <a class="el" href="xqspipsu_8h.html#06dd7ccdefd898567875836018f87dcb">xqspipsu.h</a><li>XQSPIPSU_DMA_BYTES_MAX
|
||||
: <a class="el" href="xqspipsu_8h.html#fa633d08d4bcacadc20f2696665edb75">xqspipsu.h</a><li>XQSPIPSU_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#977552f11dd3e4420b3b561de0750157">xqspipsu_hw.h</a><li>XQSPIPSU_EN_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5b7b95790bfeb5bfb3dfd63e4a5e76cc">xqspipsu_hw.h</a><li>XQSPIPSU_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#af14751d681194856cd71ce71f72e170">xqspipsu_hw.h</a><li>XQSPIPSU_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f1993fd33601de8e57bb2c9c33dd0ef6">xqspipsu_hw.h</a><li>XQspiPsu_Enable
|
||||
: <a class="el" href="xqspipsu_8h.html#a44815f385a69052a3f637f57428f506">xqspipsu.h</a><li>XQSPIPSU_FIFO_CTRL_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c14f429fa7d15b5c4bf2808ed08e7120">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#636d32a41e6eb12228ab4544c8a89dd8">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8aa72ade570a1a72ac2fab8dde1e1b8d">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c1c84b7591852289757c0c12f19f6824">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cf6c7a98e1c31d8c041efac8b94eeb52">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ad90f62d7eec225ddc1c3f295ca97f12">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f91054c38b75882abb7ae5d175eeca5d">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d8ec48f6a6bdafe46c76289e9c11f877">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4438ebabb66d07f63394c60474cb9a5b">xqspipsu_hw.h</a><li>XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1f0ff603545f3c59f2ae76c2e00be87c">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_DATA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#07331f7d9961866bde081f89fe2c45c7">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_DATA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d18171abd29f127020e30dcdc01f2bc2">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_DATA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fea2a1db0d2754b88eee5bda086319cc">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3bfe2023b6a6ce56e9d13f130bd1c86d">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#64f95a614341a1767e27cf852998c3c4">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b1a0209b2e67ec12bdbca254b3eb4bf7">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6d5959168d250e4f7494732ed29d65ce">xqspipsu_hw.h</a><li>XQSPIPSU_GEN_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6cda67575b7282414c10d9ca86a014e6">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_BOTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#055def1a338a7bd5775e0aa4f8d703ae">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_LOWER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9140bced719aeb6650ee67bd82bb7bca">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4b229d9980f3c61a508e61e97130dd93">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_BUS_UPPER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#90863432a0e1c93a8d3c4840a5046312">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_CS_HOLD
|
||||
: <a class="el" href="xqspipsu_8h.html#74b7854d095af4f443a976b426cfde7e">xqspipsu.h</a><li>XQSPIPSU_GENFIFO_CS_LOWER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0c7666c8ca9186ce3f3d280ab860abde">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_CS_SETUP
|
||||
: <a class="el" href="xqspipsu_8h.html#a18ef26888b9b8f28135654a310b5924">xqspipsu.h</a><li>XQSPIPSU_GENFIFO_CS_UPPER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d075b4d54b892f2e754bbd2ecb9eb2c4">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_DATA_XFER
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8930f017944733f989480fc03e46e955">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_EXP
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1e6b755ed1a7cae36ad77edb1d2056f9">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_EXP_START
|
||||
: <a class="el" href="xqspipsu_8h.html#9910c1e3f79127836cade9970a9df537">xqspipsu.h</a><li>XQSPIPSU_GENFIFO_IMM_DATA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a8a6c468b32dd07920d5a47ec6294d79">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_DUALSPI
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8261c65f81af4f5d8f8d8419bd9ce16a">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b6c734f8a89112c745ae85724c0f9198">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_QUADSPI
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#76cec7e7ee7d81ad88cac1519ccdb793">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_MODE_SPI
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2312f75bef62f389637acc6c0fe98203">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_POLL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#03a9a23c73098ede8c47263911488e37">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_RX
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cea0675b723cf9ad3f5eeaca3fb4d743">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_STRIPE
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b0b8b2f60b373ed19a823ff11cdefc7f">xqspipsu_hw.h</a><li>XQSPIPSU_GENFIFO_TX
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c63b41003c934914f57ec8da23faf1b">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fdd5572319c31ce9e0a4e2e34622c1d6">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dda8c30c269feb26bc40f588da2c6097">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#93a3cc75451b27f6559983b76e18911e">xqspipsu_hw.h</a><li>XQSPIPSU_GF_SNAPSHOT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6ca954e0863135e1ba9b64cddc764f60">xqspipsu_hw.h</a><li>XQSPIPSU_GF_THRESHOLD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5a8034417fd3c9846c968679c1cad859">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d50a54ee932051b2fed093ef6f2e8a12">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_WP_N_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fc706224e94b8b9aae93d1bb14d244bd">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_WP_N_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3718ed0573cff80c1dc16b604e4653b8">xqspipsu_hw.h</a><li>XQSPIPSU_GPIO_WP_N_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eca62214455d6d5098a81d1ce1237a04">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_ALL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c5ad3237e06b306dd09f876dc8a2445f">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7ff79fdfb738b1aa9da7da1b69efaf53">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b8cd142762c6f566ea03bfb9dd9e26ee">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#69f98bbda5d969b0e344d1b214b12e94">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3aa9bfb67d633f855cf6309467b52fc5">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#713fffdd4fc3974eacf87cf57bef4d3f">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8ff53f8472bc264a8e11fc23d98e8dcd">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30efac42afa9c679fcb58d8a2b3fb5c5">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#049c752447cb8923454ec7cb11a77bac">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#627a709f65e7776f529d69ffc2013d7b">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5eb684785dfb0a249b18126089624b91">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8e9d89f1bda9e54e94ff046d3ecc7bae">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8cd4e034aa2fef80f18f13ed427054a7">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92255aa3166be0f92ad40cdfb118b641">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dec77ed3456965cb1d5eff277ee3d033">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#02b4569f0b80bf6f60ff2a71a2dc39b9">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ebc9edf79074885ff77e4f985095fd50">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ee75941a2e175942356db9716a116df7">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#198b57421e658f174db74fe7de2aee54">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#afbbe1eabc3697e78f35cfef8c95dd24">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c2702dd262b8a4d08c70a4b1f9eaac7e">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c558673fbec3d68729349ce4330cbecb">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d5a663c93d8e3be7ac427fc24643a5f0">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bc6a96e745d9dadc68a8703a0ca46136">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a852f2d66139b8f643e0d7229d0fc678">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a12869c10c832ce654fc31128ef422c2">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b5ccffba2efc6db9680052c18cfa6762">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f096ed6387f093582d64c738bf432c9f">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6485347e92b591d67a46a58801cfb76d">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d8264f6b3a67886b80e596935393e2ad">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c199858ca94fddec314c837c6e012dc2">xqspipsu_hw.h</a><li>XQSPIPSU_IDR_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c4a1915b0626096a00265c1d6574ffac">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0ca8a77a99447ebec472fa5616aaf075">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#18a196026bbb30c0be2b7f563f1ef514">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8832469d79138702ee460d8dfdc39cd5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3917dc8f00c02319d3d388cf7053f12d">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c8c577496c48738f26eca00fbeb2997">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6f92b0d136c51e7566363fe3398dcda7">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92a75418a3aaf26104c0a013ddabad19">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1b49b036b952ff81f0e74a5ab4d03e8b">xqspipsu_hw.h</a><li>XQSPIPSU_IER_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#86506cfcdd6165f72907eacd01e649c5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b8e3a4621239cb556fc8acdd0a6d10b6">xqspipsu_hw.h</a><li>XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7e56e82bc0cf983a788abf916a648244">xqspipsu_hw.h</a><li>XQSPIPSU_IER_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#344cae10f68de138962c4fae7746880d">xqspipsu_hw.h</a><li>XQSPIPSU_IER_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#41dd4af0f034e73ab8508450efb110df">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#83d2877403883d73ba27978f8a66af0d">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9f244e10a82deaa7faf6b30480aea7e5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7e54d921015916bccc3dc9d808962218">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a5280c9a17c4e4d407af7bdf9fbb9e65">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6ebb4704d617d04ca285b961a5f71314">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#317fad3c0f08202172d5ac7828ba5761">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b0db03f42761412d147a24f70d622bef">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#37c907c28cfac57681aac4f3d2cc800e">xqspipsu_hw.h</a><li>XQSPIPSU_IER_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8cbd7d48ffb1fec6de2e0f1d4021b1eb">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6c158b9b577de62df32984fa3277239c">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9a5c54481edf87eafb22dacb3a5f43b4">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92cbce0e114256e442411b5aec9511f8">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4cdf7f8891dbc5262b863311e861d0f5">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#61d414723ff949466d8262cb09aa1d6c">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#94ef816765a6bc8ed702a9509181e88c">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#15b5075d4c943c71682b5aec6265e3ec">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1ed916045c6867cc83765192cb2e0de4">xqspipsu_hw.h</a><li>XQSPIPSU_IER_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#95c3565a4276ddc0d8e12215eec7b4aa">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#168b7548d332ccdbbdc64cda2e5b7264">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6c763dd851fea56cc4ad4621c80ab00c">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4355b784b5fa03e0e1e6bb71082ca9bb">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1d82132b380817721395622000d6174d">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb9c7061650a9e261fe30871e9957281">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#df9c01b9a4478556933082bc03189e3e">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#31959d17fdf5bffc0ec12b9b2ae9a1f1">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#890cda7177e5295b10615e1464e74bdf">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0cde2c77110d998919e66d3cb2c9f65d">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1711ff533a11dd37b3d72056050025e5">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6b1f2d368f0fd7b06adf8781d1a9837e">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#01e8bf0051bc67f9806ea33866163a9c">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#81be6689170270886c5deea126e8faff">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a05f1119dc47f4e498017a0ec00cf7f6">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5981d36a9fe0e865d504f31a8d639c0f">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c9d661b97c366df6fbbe75a86c510bfb">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc2b998de7a0553d2a7fbf46ed7a77a4">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ec1a53dee68e0b14842ec9f41079d45a">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7a363be77ba1868e042eab54175f4e8f">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e7dbd0d93d57a53e985eac025e204891">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#252089511474b376379e21d03324b338">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1d8de28ed67afd33cefe17c5218a331a">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bfb51b6802fff87a97635bff17bfda93">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4c58fb9c4d2200e242ff450126ec16e8">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b084b88249b77c770060053bd181a792">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#62c0013d297f0e5d341514fa3dbdfc4a">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#59e00c301549fa522b7eb40dd9e25171">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e36a91f727b1d1f5b675407c3e00b1b1">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6249d92bfccaccc3680ad8287d34ad05">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ff16e4c8ff170a151a1bd453730f6ac5">xqspipsu_hw.h</a><li>XQSPIPSU_IMR_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#af29b6f35625908251f087f7b797c5a0">xqspipsu_hw.h</a><li>XQspiPsu_In32
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c15438de9bb521c5731be71e6bc31ebb">xqspipsu_hw.h</a><li>XQspiPsu_IsManualStart
|
||||
: <a class="el" href="xqspipsu_8h.html#1f18d2f96e456164200f407fef9bec94">xqspipsu.h</a><li>XQSPIPSU_ISR_GENFIFOEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e7928789ab182d71a0360c50c04cfb64">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a27a4168a18193d5afee00109049a4dc">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e8dfd0d31ed4afd6d6a31c822ffe9d0c">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cfa64727ceb72b9607544e92c4076582">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f4d2280070de1ccdfcb84868bbcb71ff">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFOFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c041cc59a45645cddfa6d642e72ff1c">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFONOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#391f5e49d75dcfa36e3a87602f8bd041">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFONOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#858bc0bec834ca6fbd0391344f05baf3">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_GENFIFONOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f91ae38e48600a5e5bdbdcd7c87ac916">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dae24d033fb12577e3e4eda5427a950a">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_POLL_TIME_EXPIRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#52002b54521a589354a12413d6037f55">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_POLL_TIME_EXPIRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6aeff30c8cc063b806b28cafcfef970e">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_POLL_TIME_EXPIRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6670316b327a116df182dae3c7ef14b5">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fa1357dd40fff82a11471d589edc8c24">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cd6a2bb2a65244bdd203cb9d6106f9bd">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bca87ef79796944b674376eb004962aa">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b7c9ec748efb6603c9e08ab6c4a19562">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5614fb7c43f2295625a1d8ee93a6e0ce">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#68214e35f32f4ce49ab14967949a07ed">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXNEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fbb29916b8d3ac4a6a09d4a414f712c8">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXNEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1f4f968a1d2a9c7b9134e34a4828160a">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_RXNEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#139c17d2d7819552d7d46dda45b2705e">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXEMPTY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b83d8828517dda57f65d558cc4b11a40">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXEMPTY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a4941eb6f67e9800ed4f03418b04c81e">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXEMPTY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a914a82f6076b9a807d5dd4e0565e69f">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXFULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1e41fe64461cbcea181cbde6ee2d0600">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXFULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2cfc1ec9759ece536ea32c8061995bf2">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXFULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f1aca5a1f9aa8633ffd3e021f5e8247f">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXNOT_FULL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3775f12bac4f69e6a69425ff820835e9">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXNOT_FULL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#94f57e0a7160e9f6564c6ff409645928">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_TXNOT_FULL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cb31ee1a6fc9072ee369761a82f86f3a">xqspipsu_hw.h</a><li>XQSPIPSU_ISR_WR_TO_CLR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1f6d8d8245874f422d990d496a48c288">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY0_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#24c6a6af0561ac726f1f10ab22751a40">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY0_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cd127a1cd42af0e1ecff5851417697f2">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY0_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5b5b0de93e54b1d188ea9b6bc16b416e">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY1_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c07884e55a0a90c2cbc08ff0a6b6e6dc">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY1_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6498ea584162316020932c24ce29b668">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_DLY1_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9c6bcfe12e4f33075c937620ad54d1a5">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4636d144794bb35424cacd6f6d49781a">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4c386f9e3a0e70f604cbf64ab89a7383">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7c26771c8e2384b52323d84f44b2fac6">xqspipsu_hw.h</a><li>XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6f55f2f44799611f946baf8b8e71d76f">xqspipsu_hw.h</a><li>XQSPIPSU_MANUAL_START_OPTION
|
||||
: <a class="el" href="xqspipsu_8h.html#47c246bab4c5d4f6c8ff84e44049adc9">xqspipsu.h</a><li>XQSPIPSU_MOD_ID_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#33cc8bc84990ebd02f0c3ce61d1b6b33">xqspipsu_hw.h</a><li>XQSPIPSU_MOD_ID_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9dae139fcca838438b3e14f4306f1f06">xqspipsu_hw.h</a><li>XQSPIPSU_MOD_ID_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc9f034e70b42b5416121e711a0cbe95">xqspipsu_hw.h</a><li>XQSPIPSU_MOD_ID_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5ece64f34919ab3b1e9cb10cf1c01df2">xqspipsu_hw.h</a><li>XQSPIPSU_MSG_FLAG_STRIPE
|
||||
: <a class="el" href="xqspipsu_8h.html#767a4572b5fe31cd9ff390c44d25e968">xqspipsu.h</a><li>XQSPIPSU_NUM_OPTIONS
|
||||
: <a class="el" href="xqspipsu__options_8c.html#7270573aac2e897d40123dcb0a181aac">xqspipsu_options.c</a><li>XQSPIPSU_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#31c5986aae494ee1e370e7aa1cb9fecc">xqspipsu_hw.h</a><li>XQspiPsu_Out32
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f9672b4f2ec43ccf15204998ff3df728">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#311de6f25e5cf64057e9ba429cf86507">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_VALUE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#67e9f14a5632e5c8504c7ba185f6b377">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_VALUE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e85c78b01490ee607527f2147ebf9a4e">xqspipsu_hw.h</a><li>XQSPIPSU_P_TO_VALUE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ca4d95388925cc92cd116fccf9220164">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_DATA_VALUE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1b8d3a39d3a1ede6b87bb11bf3e15a43">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_DATA_VALUE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#138a8001a0f62594564c96e6398ecd5a">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_DATA_VALUE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7f2421588a71d5104922416e8b9469a0">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_LOWER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0f7280cd0f8624b6de99fec9d9a469a5">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_LOWER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b62983c1bfe390cd7adc042fb91cbb5a">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_LOWER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c786ce45963aa797cb95b91c8b9b62d6">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_UPPER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#651ea64178b92b0811c55c6c03f086e0">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_UPPER_SHIFT
|
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: <a class="el" href="xqspipsu__hw_8h.html#05f3a78b23efc4e8cdc730bff2f35330">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_EN_MASK_UPPER_WIDTH
|
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: <a class="el" href="xqspipsu__hw_8h.html#13569fde078dbbfaac679afaaef4c2b1">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_MASK_EN_MASK
|
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: <a class="el" href="xqspipsu__hw_8h.html#29d0864253150436c689d353adb40cf5">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_MASK_EN_SHIFT
|
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: <a class="el" href="xqspipsu__hw_8h.html#fccf7cc820b6e40f393c30e8476952b4">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_MASK_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f073fca2ff52723f8f23808430dcedc0">xqspipsu_hw.h</a><li>XQSPIPSU_POLL_CFG_OFFSET
|
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: <a class="el" href="xqspipsu__hw_8h.html#f657fc3a38e22e512c0f7cf03bda1ad7">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cb00be2007021a12b97d6282fb2bca5a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_MASK
|
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: <a class="el" href="xqspipsu__hw_8h.html#f4839ea4b806727ffd8cbd72c96eb82e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET
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: <a class="el" href="xqspipsu__hw_8h.html#39b0151b1cd09cb2da8d67efeb8ec0cb">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_SHIFT
|
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: <a class="el" href="xqspipsu__hw_8h.html#eb726c5a408170ae0e1f00661a4bf41c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_MSB_WIDTH
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: <a class="el" href="xqspipsu__hw_8h.html#26f769aa9e3c62220857e6db8c1e2212">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3b9c82ef758ea9e8bfda707130051091">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b993adfc8d3e5fd256f46c9543ce7299">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_ADDR_WIDTH
|
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: <a class="el" href="xqspipsu__hw_8h.html#c6ab554d9ab60514d9e9b22260d9f6e5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#723b7c6f984082e38c0bf95437f7af2f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2a1f9350cc7eeed3a973be727ab648e1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8ea8b60dbc73aa86862346d22ed39b1f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cd88b1d57388f468a09208ed57e002aa">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0389e85e43dc1dda200917545858b8b9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#523751055658607c8b40048ef550c80c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d11e1e53c55440afa41685846b74c9c7">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#99d0e899aaaa748f7d862dc1b81d6320">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f2944b6cc7145d005fc5c2b18224b587">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0a1af0bab0712b0e003d5349988a4c7d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b75d9101cd044cf3df45c81f304811e3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b2098e43b3d2b1be9d24ad18510c92a1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#98632b410fbfefd80e247d3c8f7d93ab">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fb77b58d816db5e0a21a532a1f9280fb">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f6ba9bfc54f1b6247e7472ae40399229">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#674b6e955b0141456482625acfbbf8b8">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f24745d9cf69ffc80acee7e67f156d3d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a64694cd2bf08584586602226da3e9a6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9bb0cac2e01610356e88015c4d2f3b07">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9b985b0ced7d6e790eaa6f5804efca84">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eaa0a80cbb576e4a7aa4d00e99b02a86">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ea4fa96349afdb779cd1f88829bad949">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#faa404a9e4a5137615a1bb0205d54798">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#863cb44339ed10347558e304166e7b1e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ed4d839a0b110c93ba907ed2d39de3b6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#48d0c63798b35da7ca3c4a4e5eb93c1e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#809ad867b6ee031e5a54445d077edc14">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#561e23d469b3e62a22b70de380173d66">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bd1f950015647ad4badc0554b06f4d33">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bb6c6d1f62756a0c22fc8caae2cf5187">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#179fa006eced0e96ae2ec3f6e54350f0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ab8f3ed04924c50ac623beda99450b20">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#45cdc6111be74e160ff566dc0c070ee3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#83c7d22d0a1cad6eb84224213cc6124d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a7191f7e5faad4dffadbdc79efdf8d47">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f63e637aca6336a6fbe5a026c3702061">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7d2c335236305825a111a0e305395cba">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1c49b7d688c394b3bb37d4293fa34df5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a0e3712ff717b419843ea20623863af2">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1846046a5f9ffba61acf652a3081bbe0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c1979f187af54cc81bcddd06edefc478">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#074bc57011bb0c5fe75d8a7f44951bb3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#74792d5b8a9b48737a53582af3c07cb1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4ed1ef3c1fcff8b217df6f68ea606989">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ad22182c1fdd3c41fcf9566816dc7492">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b33bc2f0ad94595f39219b3d95646e1e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4c73d6f9e015b79b55d3fc23f87ae548">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2258b69501bd844fd3e03a89dd574bfd">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#99b75e585ce2840824d1e9d790105db1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#317eb7eada64f4e30315f49657a38949">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7663feb16b8ad4dba7f262a748af9652">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8d696592ac957f47bafe4522797f3952">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b1cfba74030795a9d9bd4981a96edd6a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ec84e5cfb4961bf4c918440383cbb273">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6a0eaa5b293018f854824ee538194c78">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8a0771952a47a3b817903fbd5baad380">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#41c4a11ea36f466400462ea557008b41">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cdd5cb03cc493cd30b30e4202ad0a0b2">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c8c0f19580b0e6d06669bf52f822d059">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9e71ff58ed3e7e2aa529b49cbba83610">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#04b009825df34055ec8a92ac44e651fa">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cc7bfa23946433439d9a2ebf6fa08958">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a7f286e160286a6d8275f72b1c39f67c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fec736ade882155c77d6b9b078e0f99b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0bab75d14eb5f6ed8bea76df90208dbe">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e6f974fefd9737e3b0e28fa107567370">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#948b1efee1450bf418b0708599b82a9d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5d445cbbacf5e7f7814394a647048753">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#553d272b3998c4103f8602a134dd3416">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#38d3e72de424d610d1a4ba7e756a7a41">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#70120d7049eaf1741c8902becc96f50e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e2cea755593f666377dfce271e60499a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#306f7011313e063194221ba4823510e6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc22f2f22d9ac9d2d3be226df47f2a84">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#42e3880df5843995d386c500477ebf24">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1e2e78c77a5c920471fb2cf7b63fac7b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9ef920a2ca9559640e049c486f506b7e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b4bb114c18507d855e39395599afe055">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#33a308d0a889646f28aa0a31b8285e22">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cc7f56136d37bdadfdda20df8571f116">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9fbfb47d04bae2a58d88ee13d4abf980">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a8839687248a33847a620830bb21d879">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ceea2425458ac2a40305f93e496865a9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4147df2e80f4fdfba4de8fc946c5a4a8">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#721a8a2b89756ed4dee65f326f8190e3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#429256ef7cc7687d1b9b9f261ebf6a2e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2fdae9274badf87d8fdc5bb4fc55e9ba">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#2c4740f4a8272c26e9564702caaa3b87">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fb77ec57bb54dc1e53551f09000be329">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30c384a6eca64dbe879b97924f8a3ae6">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#e05f33092a03442ea36b4a82c3e1df9f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#6d301fde1ea17e539a1c9b2278cae604">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#27b3f49a7be4fcab512bda09e1e7f976">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#546e993922e83328c49b6fa468aa846f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a6a36e8c399c969a51831dd177526fbe">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#591b2137dac813735469255cba68749d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#74faac5b286e02108369509b546155c5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#294a5f389f295aad3a5e54bea0d1cdf0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a967c18f241c334ea60d5c98657e9dfe">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a23b3052d4c6762a67fbc212d25c0e5a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3757aa7e6983e1c19871d5cafec6ca2a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5cb54bb71036339bce5ae6df3a6ec99b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dd8254fc73e4a1b233eb88ce163fa5d3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f9b1bb347caae6dc1ab1340e84916c93">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7fcb2a02499c783baa52e6dbba23e228">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5ee3ff80b86830bde5b35441f808f416">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ae98816a716a3630e824c3cb852724ad">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#38acae16f287336c83a7babd6ae297ff">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3e7292c9caa78358c6e02145c3b299a1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#60086f4b73b4d45996735a980d68a2b3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1ab05b39f2d21706cb689ae5c5671cd1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#966cce1d707de11d6f8a02f6d5cfe3b3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cf8bc3fbac292bd7353067dcb547828c">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#09935c1cd7063013d4d7880606a04c3b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92dae3bbaf433837decaf2230f98a349">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#984702f55e65c5642b5167ecabfbc8bd">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0516b4f83c13a92b9a1fb573bc76ee3b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_DONE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7cab8cf8712279ec34decec6b6539095">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_DONE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c0c24155205170453c5dbd63b18846fc">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_DONE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#73b84eeb2e5b5cae116d482e6a55b5bd">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b3a0e6796ca7fec16f480bf634851261">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#36001fb8f1e1114d177df1509e1c3740">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3948a56db7c8931eb274ace756b8d14f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b6c4685faa0de3fde0197afd7a78524a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb05ec0712faeb5750de793e5b253d1d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bfcd19f2bb7aff5f17d8c35ffe4ac774">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#30ca967a9288020ef44470e6f09c2b6b">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f247424d4cf6853321661c1877da9be2">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4664b7dfcd237f2d5d978943a5656767">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5e2523f73d68d423a45f5bfadc9b950d">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3d646ef6c15472ce4f88938f7f2dccd9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d480db440b9c2807d461ba1ba56d4bb5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a736fba149e752cdde498124580e55d1">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a7e0f93ceb34aaf37b4857a97ae672aa">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4980e2d421892b46b5cbfc210dd87729">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ebb5419ad726384a6848b0b55f0f4dd5">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_INTR_ERR_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7fcc65f1804a3b09d2578888a6ac1278">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c3a77c17cdc599e640dadd63d60b21ab">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b2dea188a0404d6e555c4ff2839eb86a">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b9af3b60b2f5305ab70b70c430e695de">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_SIZE_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#5c70ae2a63d008b335e51d9e3f71c4c9">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_BUSY_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#28a7180c7ddc44364157dd75666718d4">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_BUSY_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ecec61c2aace2c0586f5c9b0491c65f3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_BUSY_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#19664047f57d0b6d5897c97927367978">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#93dc8fe59720d81079c993682e5bf310">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#92c00900dc411f8f09b99913f96dd37e">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#964e0fee9789a290fcace60880702ad0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#dc2dbd0dfe87b5adf440e9001c4658b3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#a5a88d98f9a05c1b3636a81a93f6c2e3">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#751c35c56034073e8e1ca0dd8d9f9bfb">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8fd8100c320c3da46a93af5adf6592f0">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fd6f55d877c432a60099d8b4d8734e39">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7f20515e77a83b8acb0010b7d788fe75">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#d51955f7901e0a5b8b62fb0f614be027">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4332dd0868d1843ae3a49d74844d2a8f">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#706a6f83a128361fb2cf5383ede70157">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#bdb224d4fe165442dd8bb5a86215a522">xqspipsu_hw.h</a><li>XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#07a8c2c8600afaaabed4bf1bd9899205">xqspipsu_hw.h</a><li>XQSPIPSU_READMODE_DMA
|
||||
: <a class="el" href="xqspipsu_8h.html#6e5ef224ee243dc64228ad60155a3f8b">xqspipsu.h</a><li>XQSPIPSU_READMODE_IO
|
||||
: <a class="el" href="xqspipsu_8h.html#fd11c8b8f44530c3670d2ac7497fb2fc">xqspipsu.h</a><li>XQspiPsu_ReadReg
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b88bcdb0f53b21b79cd0805cfd14cb89">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_LOWER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ee37c159c17dec939074401a938d66ee">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_LOWER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#993052dd4aa7866b3dcbf7490149193b">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_LOWER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#957493785248c5762016e67eb2ecc8e6">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#419ba63e8028ea7e8aa833523ea3a785">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_UPPER_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#ab88c2334a6c2daa47aef99b8a274f18">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_UPPER_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#fda8bb05c3ae9966da0a4ee2912b4d9e">xqspipsu_hw.h</a><li>XQSPIPSU_RX_COPY_UPPER_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7e2db1ba9f810863b5b5931c14f5624b">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1852adc164161e4766176ecd534dc0ae">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#cece9a81e11ead6c13917b2a3a556b00">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#910b62e23ccb5ecd6da94be71650fc01">xqspipsu_hw.h</a><li>XQSPIPSU_RX_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0b160809c8a8f8c95ba37c69e8ced2e2">xqspipsu_hw.h</a><li>XQSPIPSU_RX_THRESHOLD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#97be55c27b71a154877fb5f919d627f1">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#17d0aaf5e8072f155042fc5189c6808c">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#68b0b4316693414546980dea7baaf0a4">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#3812e16ad9153e4c2346531ad88ff01d">xqspipsu_hw.h</a><li>XQSPIPSU_RXD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#85e6c7585d7b8d4ddb96cafc3cba1eea">xqspipsu_hw.h</a><li>XQSPIPSU_RXFIFO_THRESHOLD_OPT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#0c7a9a125726f6b42fe5fd0aadc5307f">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#b11050c94363ad8c387653784d2a58ce">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#84156abbc51d17b988b1e82c584be10d">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#85886e9529a62ca0971ca35dd7181dc1">xqspipsu_hw.h</a><li>XQSPIPSU_SEL_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#578d77a8da91f669cc31b9582aaf6e51">xqspipsu_hw.h</a><li>XQspiPsu_Select
|
||||
: <a class="el" href="xqspipsu_8h.html#3206beea9e70b6903f998c21bbdb1ab6">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_BUS_BOTH
|
||||
: <a class="el" href="xqspipsu_8h.html#5d8490a76bf6be3a4655e3fa8e90a19f">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_BUS_LOWER
|
||||
: <a class="el" href="xqspipsu_8h.html#2d896ad5edf8b15e6dbd4d7a87517a35">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_BUS_UPPER
|
||||
: <a class="el" href="xqspipsu_8h.html#9eeab1d9cd47c4a0281d9188d3072444">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_CS_BOTH
|
||||
: <a class="el" href="xqspipsu_8h.html#b8fb3a2887dbf0331cc9057afea0ec53">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_CS_LOWER
|
||||
: <a class="el" href="xqspipsu_8h.html#4c5dd4c0387f6ae12a78b86c653bb74d">xqspipsu.h</a><li>XQSPIPSU_SELECT_FLASH_CS_UPPER
|
||||
: <a class="el" href="xqspipsu_8h.html#2211df126779f654595c9663f5624ba4">xqspipsu.h</a><li>XQSPIPSU_SELECT_MODE_DUALSPI
|
||||
: <a class="el" href="xqspipsu_8h.html#a57e6e6b6efaaa981a9a81ae9db3d78a">xqspipsu.h</a><li>XQSPIPSU_SELECT_MODE_QUADSPI
|
||||
: <a class="el" href="xqspipsu_8h.html#6750df2d9d9169fdef76bfc957ae501c">xqspipsu.h</a><li>XQSPIPSU_SELECT_MODE_SPI
|
||||
: <a class="el" href="xqspipsu_8h.html#185ba58041ded76c03bb18ad69e783af">xqspipsu.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#eb2831272c645a1b392e4f62eaea1448">xqspipsu_hw.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_RESET_VAL
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#9cc4bdd124b82ebee27c06e2af91e884">xqspipsu_hw.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#190f5bd11574e5fd648a40d31ba308db">xqspipsu_hw.h</a><li>XQSPIPSU_TX_FIFO_THRESHOLD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#31718b5d33dfb588ae195a6ece1ae996">xqspipsu_hw.h</a><li>XQSPIPSU_TX_THRESHOLD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#33bc760357127168b3a665f969036421">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_DEPTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#caedfa6d1462da9c4542f6ece2bf3536">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f3cc923bfcdf939e66395b7b01a54093">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4884f0160746c6696598ef6dda1fc9ff">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#7ff98d251534141c0caa6e4ce9f490a6">xqspipsu_hw.h</a><li>XQSPIPSU_TXD_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#8524a39fa5536400dd8f54a15d91f0b8">xqspipsu_hw.h</a><li>XQspiPsu_WriteReg
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#584ee0482b95d3f49353438ca58fb180">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_OFFSET
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#4951a0b7d9ce35780f74864a196092e4">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_PEND_BYTES_MASK
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#f924c241bb415ac88853733bc975ed12">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_PEND_BYTES_SHIFT
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#1fd56f9440b15af05ac96a196b4c4650">xqspipsu_hw.h</a><li>XQSPIPSU_XFER_STS_PEND_BYTES_WIDTH
|
||||
: <a class="el" href="xqspipsu__hw_8h.html#c8022ff211d2c8ff3c13bff6728dfb26">xqspipsu_hw.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
51
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_func.html
Executable file
51
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_func.html
Executable file
|
|
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|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
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|
||||
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|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li id="current"><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>XQspiPsu_Abort()
|
||||
: <a class="el" href="xqspipsu_8h.html#aa69ec6da90deb760954ea3dcfd55d7f">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#aa69ec6da90deb760954ea3dcfd55d7f">xqspipsu.c</a><li>XQspiPsu_CfgInitialize()
|
||||
: <a class="el" href="xqspipsu_8h.html#3c23b3bb935cf4238301444cdcc2e810">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#3c23b3bb935cf4238301444cdcc2e810">xqspipsu.c</a><li>XQspiPsu_ClearOptions()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#e64c9da28908fe94db0c2890fcd97679">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#e64c9da28908fe94db0c2890fcd97679">xqspipsu.h</a><li>XQspiPsu_GetOptions()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#4a71a2847d3d2e11d9c69c29084e38df">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#4a71a2847d3d2e11d9c69c29084e38df">xqspipsu.h</a><li>XQspiPsu_InterruptHandler()
|
||||
: <a class="el" href="xqspipsu_8h.html#8a8f3a75fb4cb75c943245c7b9fccfd5">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#8a8f3a75fb4cb75c943245c7b9fccfd5">xqspipsu.c</a><li>XQspiPsu_InterruptTransfer()
|
||||
: <a class="el" href="xqspipsu_8h.html#7c466797e1ee111cea006766a5547eee">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#7c466797e1ee111cea006766a5547eee">xqspipsu.c</a><li>XQspiPsu_LookupConfig()
|
||||
: <a class="el" href="xqspipsu__sinit_8c.html#604c468e86aab21cab0b93ee8c0d8942">xqspipsu_sinit.c</a>, <a class="el" href="xqspipsu_8h.html#604c468e86aab21cab0b93ee8c0d8942">xqspipsu.h</a><li>XQspiPsu_PolledTransfer()
|
||||
: <a class="el" href="xqspipsu_8h.html#17d058fa58b8599c1db27092f444d0d0">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#17d058fa58b8599c1db27092f444d0d0">xqspipsu.c</a><li>XQspiPsu_Reset()
|
||||
: <a class="el" href="xqspipsu_8h.html#799b60ee7157ed46b84475677aa0dc03">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#799b60ee7157ed46b84475677aa0dc03">xqspipsu.c</a><li>XQspiPsu_SelectFlash()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#28338ae42ed4f7d2685ab18de2d21128">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#28338ae42ed4f7d2685ab18de2d21128">xqspipsu.h</a><li>XQspiPsu_SetClkPrescaler()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#22b18488a0529eeaadc3b5966f18855d">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#22b18488a0529eeaadc3b5966f18855d">xqspipsu.h</a><li>XQspiPsu_SetOptions()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#489dc7a54f66696b3cc98b74ec3d0276">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#489dc7a54f66696b3cc98b74ec3d0276">xqspipsu.h</a><li>XQspiPsu_SetReadMode()
|
||||
: <a class="el" href="xqspipsu__options_8c.html#9f08409af64f221800e065b4fd31cd75">xqspipsu_options.c</a>, <a class="el" href="xqspipsu_8h.html#9f08409af64f221800e065b4fd31cd75">xqspipsu.h</a><li>XQspiPsu_SetStatusHandler()
|
||||
: <a class="el" href="xqspipsu_8h.html#7b78484a0a6c8b30976a911a2a6c805a">xqspipsu.h</a>, <a class="el" href="xqspipsu_8c.html#7b78484a0a6c8b30976a911a2a6c805a">xqspipsu.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
38
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_type.html
Executable file
38
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_type.html
Executable file
|
|
@ -0,0 +1,38 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li id="current"><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>XQspiPsu_StatusHandler
|
||||
: <a class="el" href="xqspipsu_8h.html#a8a9e7bc144fabb62eb6a2d3d2ec7b0e">xqspipsu.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
38
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_vars.html
Executable file
38
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/globals_vars.html
Executable file
|
|
@ -0,0 +1,38 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Class Members
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
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|
||||
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|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li id="current"><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="globals.html"><span>All</span></a></li>
|
||||
<li><a href="globals_func.html"><span>Functions</span></a></li>
|
||||
<li id="current"><a href="globals_vars.html"><span>Variables</span></a></li>
|
||||
<li><a href="globals_type.html"><span>Typedefs</span></a></li>
|
||||
<li><a href="globals_defs.html"><span>Defines</span></a></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p>
|
||||
<ul>
|
||||
<li>XQspiPsu_ConfigTable
|
||||
: <a class="el" href="xqspipsu__sinit_8c.html#07435c645a3bde95933d0461713e4e57">xqspipsu_sinit.c</a>, <a class="el" href="xqspipsu__g_8c.html#0a1440bbf114a2e065b65bca531a14c3">xqspipsu_g.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
21
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/index.html
Executable file
21
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/index.html
Executable file
|
|
@ -0,0 +1,21 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Main Page
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
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||||
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|
||||
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|
||||
</ul></div>
|
||||
<h1></h1>
|
||||
<p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
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|
||||
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|
||||
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|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>OptionsMap Member List</h1>This is the complete list of members for <a class="el" href="struct_options_map.html">OptionsMap</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_options_map.html#15a0d89a22cb9514acce100647e9d7e1">Mask</a></td><td><a class="el" href="struct_options_map.html">OptionsMap</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_options_map.html#802f63f679817760b3c4c1b8a72f229f">Option</a></td><td><a class="el" href="struct_options_map.html">OptionsMap</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
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|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
OptionsMap Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
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|
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<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>OptionsMap Struct Reference</h1><!-- doxytag: class="OptionsMap" --><a href="struct_options_map-members.html">List of all members.</a><table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_options_map.html#802f63f679817760b3c4c1b8a72f229f">Option</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_options_map.html#15a0d89a22cb9514acce100647e9d7e1">Mask</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="15a0d89a22cb9514acce100647e9d7e1"></a><!-- doxytag: member="OptionsMap::Mask" ref="15a0d89a22cb9514acce100647e9d7e1" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_options_map.html#15a0d89a22cb9514acce100647e9d7e1">OptionsMap::Mask</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="802f63f679817760b3c4c1b8a72f229f"></a><!-- doxytag: member="OptionsMap::Option" ref="802f63f679817760b3c4c1b8a72f229f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_options_map.html#802f63f679817760b3c4c1b8a72f229f">OptionsMap::Option</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xqspipsu__options_8c.html">xqspipsu_options.c</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
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@ -0,0 +1,43 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XQspiPsu Member List</h1>This is the complete list of members for <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#9b3aa272eb335fecaaa8f47fd2ed9241">Config</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#dc71282aafc4eb9a8f37e672bf3bec51">GenFifoBufferPtr</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#04675183fe2c3b312d0866a2a2f9b906">GenFifoBus</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#dbe5c279e1de1f98d3f63bc30cd2d2a4">GenFifoCS</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#c22878c102c9a449ccbef8992a32740e">GenFifoEntries</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#b6f2b5a35423f4a2c34053eaeec3dcd6">IsBusy</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#e6039f5b4f8cdf2e528931ec383deb31">IsReady</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#85e0ab38f87032835095e2a0b8a26afd">IsUnaligned</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#29f89d26e8b2046a17065912e1a7b365">Msg</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#529c4bf3c3d29b235b81a9465478ba03">MsgCnt</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#99fdefe256f67980d0c49a564e0fa0de">NumMsg</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#bcf49b02b0b90a7eecf9fb5ba40ac0b3">ReadMode</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#5464cdad6cf047e5228f13cb3a761c3f">RecvBufferPtr</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#8b125949249aea53706a9bfc4fd736d0">RxBytes</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#2a11cb56ad7d4b388a4669359156ab0b">SendBufferPtr</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#2ebf04ce847da29d6069795db26fbccc">StatusHandler</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#af2ea17aa1aae667ccc6190222e218f7">StatusRef</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu.html#b2d95514007cb4fc72b4427f476cdb44">TxBytes</a></td><td><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
342
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/struct_x_qspi_psu.html
Executable file
342
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/struct_x_qspi_psu.html
Executable file
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|
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|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XQspiPsu Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
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<div class="tabs">
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<ul>
|
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<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
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|
||||
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|
||||
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|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XQspiPsu Struct Reference</h1><!-- doxytag: class="XQspiPsu" --><code>#include <xqspipsu.h></code>
|
||||
<p>
|
||||
<a href="struct_x_qspi_psu-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
The <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> driver instance data. The user is required to allocate a variable of this type for every QSPIPSU device in the system. A pointer to a variable of this type is then passed to the driver API functions.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#9b3aa272eb335fecaaa8f47fd2ed9241">Config</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#e6039f5b4f8cdf2e528931ec383deb31">IsReady</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#2a11cb56ad7d4b388a4669359156ab0b">SendBufferPtr</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#5464cdad6cf047e5228f13cb3a761c3f">RecvBufferPtr</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#dc71282aafc4eb9a8f37e672bf3bec51">GenFifoBufferPtr</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#b2d95514007cb4fc72b4427f476cdb44">TxBytes</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#8b125949249aea53706a9bfc4fd736d0">RxBytes</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#c22878c102c9a449ccbef8992a32740e">GenFifoEntries</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#b6f2b5a35423f4a2c34053eaeec3dcd6">IsBusy</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#bcf49b02b0b90a7eecf9fb5ba40ac0b3">ReadMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#dbe5c279e1de1f98d3f63bc30cd2d2a4">GenFifoCS</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#04675183fe2c3b312d0866a2a2f9b906">GenFifoBus</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#99fdefe256f67980d0c49a564e0fa0de">NumMsg</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#529c4bf3c3d29b235b81a9465478ba03">MsgCnt</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#85e0ab38f87032835095e2a0b8a26afd">IsUnaligned</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#29f89d26e8b2046a17065912e1a7b365">Msg</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="xqspipsu_8h.html#a8a9e7bc144fabb62eb6a2d3d2ec7b0e">XQspiPsu_StatusHandler</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#2ebf04ce847da29d6069795db26fbccc">StatusHandler</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu.html#af2ea17aa1aae667ccc6190222e218f7">StatusRef</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="9b3aa272eb335fecaaa8f47fd2ed9241"></a><!-- doxytag: member="XQspiPsu::Config" ref="9b3aa272eb335fecaaa8f47fd2ed9241" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> <a class="el" href="struct_x_qspi_psu.html#9b3aa272eb335fecaaa8f47fd2ed9241">XQspiPsu::Config</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configuration structure
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="dc71282aafc4eb9a8f37e672bf3bec51"></a><!-- doxytag: member="XQspiPsu::GenFifoBufferPtr" ref="dc71282aafc4eb9a8f37e672bf3bec51" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8* <a class="el" href="struct_x_qspi_psu.html#dc71282aafc4eb9a8f37e672bf3bec51">XQspiPsu::GenFifoBufferPtr</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Gen FIFO entries
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="04675183fe2c3b312d0866a2a2f9b906"></a><!-- doxytag: member="XQspiPsu::GenFifoBus" ref="04675183fe2c3b312d0866a2a2f9b906" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_qspi_psu.html#04675183fe2c3b312d0866a2a2f9b906">XQspiPsu::GenFifoBus</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="dbe5c279e1de1f98d3f63bc30cd2d2a4"></a><!-- doxytag: member="XQspiPsu::GenFifoCS" ref="dbe5c279e1de1f98d3f63bc30cd2d2a4" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_qspi_psu.html#dbe5c279e1de1f98d3f63bc30cd2d2a4">XQspiPsu::GenFifoCS</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="c22878c102c9a449ccbef8992a32740e"></a><!-- doxytag: member="XQspiPsu::GenFifoEntries" ref="c22878c102c9a449ccbef8992a32740e" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int <a class="el" href="struct_x_qspi_psu.html#c22878c102c9a449ccbef8992a32740e">XQspiPsu::GenFifoEntries</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Number of Gen FIFO entries remaining
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b6f2b5a35423f4a2c34053eaeec3dcd6"></a><!-- doxytag: member="XQspiPsu::IsBusy" ref="b6f2b5a35423f4a2c34053eaeec3dcd6" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_qspi_psu.html#b6f2b5a35423f4a2c34053eaeec3dcd6">XQspiPsu::IsBusy</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
A transfer is in progress (state)
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="e6039f5b4f8cdf2e528931ec383deb31"></a><!-- doxytag: member="XQspiPsu::IsReady" ref="e6039f5b4f8cdf2e528931ec383deb31" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_qspi_psu.html#e6039f5b4f8cdf2e528931ec383deb31">XQspiPsu::IsReady</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Device is initialized and ready
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="85e0ab38f87032835095e2a0b8a26afd"></a><!-- doxytag: member="XQspiPsu::IsUnaligned" ref="85e0ab38f87032835095e2a0b8a26afd" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int <a class="el" href="struct_x_qspi_psu.html#85e0ab38f87032835095e2a0b8a26afd">XQspiPsu::IsUnaligned</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="29f89d26e8b2046a17065912e1a7b365"></a><!-- doxytag: member="XQspiPsu::Msg" ref="29f89d26e8b2046a17065912e1a7b365" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a>* <a class="el" href="struct_x_qspi_psu.html#29f89d26e8b2046a17065912e1a7b365">XQspiPsu::Msg</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="529c4bf3c3d29b235b81a9465478ba03"></a><!-- doxytag: member="XQspiPsu::MsgCnt" ref="529c4bf3c3d29b235b81a9465478ba03" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int <a class="el" href="struct_x_qspi_psu.html#529c4bf3c3d29b235b81a9465478ba03">XQspiPsu::MsgCnt</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="99fdefe256f67980d0c49a564e0fa0de"></a><!-- doxytag: member="XQspiPsu::NumMsg" ref="99fdefe256f67980d0c49a564e0fa0de" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int <a class="el" href="struct_x_qspi_psu.html#99fdefe256f67980d0c49a564e0fa0de">XQspiPsu::NumMsg</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="bcf49b02b0b90a7eecf9fb5ba40ac0b3"></a><!-- doxytag: member="XQspiPsu::ReadMode" ref="bcf49b02b0b90a7eecf9fb5ba40ac0b3" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_qspi_psu.html#bcf49b02b0b90a7eecf9fb5ba40ac0b3">XQspiPsu::ReadMode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
DMA or IO mode
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5464cdad6cf047e5228f13cb3a761c3f"></a><!-- doxytag: member="XQspiPsu::RecvBufferPtr" ref="5464cdad6cf047e5228f13cb3a761c3f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8* <a class="el" href="struct_x_qspi_psu.html#5464cdad6cf047e5228f13cb3a761c3f">XQspiPsu::RecvBufferPtr</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Buffer to receive (state)
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8b125949249aea53706a9bfc4fd736d0"></a><!-- doxytag: member="XQspiPsu::RxBytes" ref="8b125949249aea53706a9bfc4fd736d0" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int <a class="el" href="struct_x_qspi_psu.html#8b125949249aea53706a9bfc4fd736d0">XQspiPsu::RxBytes</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Number of bytes left to transfer(state)
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2a11cb56ad7d4b388a4669359156ab0b"></a><!-- doxytag: member="XQspiPsu::SendBufferPtr" ref="2a11cb56ad7d4b388a4669359156ab0b" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8* <a class="el" href="struct_x_qspi_psu.html#2a11cb56ad7d4b388a4669359156ab0b">XQspiPsu::SendBufferPtr</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Buffer to send (state)
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="2ebf04ce847da29d6069795db26fbccc"></a><!-- doxytag: member="XQspiPsu::StatusHandler" ref="2ebf04ce847da29d6069795db26fbccc" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="xqspipsu_8h.html#a8a9e7bc144fabb62eb6a2d3d2ec7b0e">XQspiPsu_StatusHandler</a> <a class="el" href="struct_x_qspi_psu.html#2ebf04ce847da29d6069795db26fbccc">XQspiPsu::StatusHandler</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="af2ea17aa1aae667ccc6190222e218f7"></a><!-- doxytag: member="XQspiPsu::StatusRef" ref="af2ea17aa1aae667ccc6190222e218f7" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void* <a class="el" href="struct_x_qspi_psu.html#af2ea17aa1aae667ccc6190222e218f7">XQspiPsu::StatusRef</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Callback reference for status handler
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="b2d95514007cb4fc72b4427f476cdb44"></a><!-- doxytag: member="XQspiPsu::TxBytes" ref="b2d95514007cb4fc72b4427f476cdb44" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int <a class="el" href="struct_x_qspi_psu.html#b2d95514007cb4fc72b4427f476cdb44">XQspiPsu::TxBytes</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Number of bytes to transfer (state)
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xqspipsu_8h.html">xqspipsu.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XQspiPsu_Config Member List</h1>This is the complete list of members for <a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___config.html#4fe2b57911aede873cac306ec0b295ad">BaseAddress</a></td><td><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___config.html#fb9b153a78b4112212d7850efd1c6add">BusWidth</a></td><td><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___config.html#a771e1e018426eb1f68fe5241ed45e71">ConnectionMode</a></td><td><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___config.html#5b4a0fe7ce081acb816e56ea139fd0b8">DeviceId</a></td><td><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___config.html#630de071c5c249ec4bf502fff7f8daaa">InputClockHz</a></td><td><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,121 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
XQspiPsu_Config Struct Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li id="current"><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="annotated.html"><span>Class List</span></a></li>
|
||||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XQspiPsu_Config Struct Reference</h1><!-- doxytag: class="XQspiPsu_Config" --><code>#include <xqspipsu.h></code>
|
||||
<p>
|
||||
<a href="struct_x_qspi_psu___config-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains configuration information for the device.
|
||||
<p>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u16 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___config.html#5b4a0fe7ce081acb816e56ea139fd0b8">DeviceId</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___config.html#4fe2b57911aede873cac306ec0b295ad">BaseAddress</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___config.html#630de071c5c249ec4bf502fff7f8daaa">InputClockHz</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___config.html#a771e1e018426eb1f68fe5241ed45e71">ConnectionMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___config.html#fb9b153a78b4112212d7850efd1c6add">BusWidth</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="4fe2b57911aede873cac306ec0b295ad"></a><!-- doxytag: member="XQspiPsu_Config::BaseAddress" ref="4fe2b57911aede873cac306ec0b295ad" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_qspi_psu___config.html#4fe2b57911aede873cac306ec0b295ad">XQspiPsu_Config::BaseAddress</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Base address of the device
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="fb9b153a78b4112212d7850efd1c6add"></a><!-- doxytag: member="XQspiPsu_Config::BusWidth" ref="fb9b153a78b4112212d7850efd1c6add" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_qspi_psu___config.html#fb9b153a78b4112212d7850efd1c6add">XQspiPsu_Config::BusWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Bus width available on board
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="a771e1e018426eb1f68fe5241ed45e71"></a><!-- doxytag: member="XQspiPsu_Config::ConnectionMode" ref="a771e1e018426eb1f68fe5241ed45e71" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_qspi_psu___config.html#a771e1e018426eb1f68fe5241ed45e71">XQspiPsu_Config::ConnectionMode</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Single, Stacked and Parallel mode
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="5b4a0fe7ce081acb816e56ea139fd0b8"></a><!-- doxytag: member="XQspiPsu_Config::DeviceId" ref="5b4a0fe7ce081acb816e56ea139fd0b8" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
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|
||||
<tr>
|
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<td class="memname">u16 <a class="el" href="struct_x_qspi_psu___config.html#5b4a0fe7ce081acb816e56ea139fd0b8">XQspiPsu_Config::DeviceId</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Unique ID of device
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="630de071c5c249ec4bf502fff7f8daaa"></a><!-- doxytag: member="XQspiPsu_Config::InputClockHz" ref="630de071c5c249ec4bf502fff7f8daaa" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
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|
||||
<tr>
|
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<td class="memname">u32 <a class="el" href="struct_x_qspi_psu___config.html#630de071c5c249ec4bf502fff7f8daaa">XQspiPsu_Config::InputClockHz</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Input clock frequency
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xqspipsu_8h.html">xqspipsu.h</a></ul>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
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|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
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<title>
|
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Member List
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
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|
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<!-- Generated by Doxygen 1.4.7 -->
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|
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|
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<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XQspiPsu_Msg Member List</h1>This is the complete list of members for <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___msg.html#e4dae8ba728f7da9b6f31bb39c62b81f">BusWidth</a></td><td><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___msg.html#420a0720c6eb8d77aae09c829185b160">ByteCount</a></td><td><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___msg.html#2c11ea724a05dd7d68b8e4adcb7ac46e">Flags</a></td><td><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___msg.html#1fb697c64fd14580822f4baf50f26df1">RxBfrPtr</a></td><td><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_qspi_psu___msg.html#09fc20d95cb26f29a649207d0b495f58">TxBfrPtr</a></td><td><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
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<html>
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|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
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<title>
|
||||
XQspiPsu_Msg Struct Reference
|
||||
</title>
|
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<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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|
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|
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|
||||
<h1>XQspiPsu_Msg Struct Reference</h1><!-- doxytag: class="XQspiPsu_Msg" --><code>#include <xqspipsu.h></code>
|
||||
<p>
|
||||
<a href="struct_x_qspi_psu___msg-members.html">List of all members.</a><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This typedef contains configuration information for a flash message.
|
||||
<p>
|
||||
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|
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|
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<tr><td colspan="2"><br><h2>Public Attributes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___msg.html#09fc20d95cb26f29a649207d0b495f58">TxBfrPtr</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___msg.html#1fb697c64fd14580822f4baf50f26df1">RxBfrPtr</a></td></tr>
|
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|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___msg.html#420a0720c6eb8d77aae09c829185b160">ByteCount</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___msg.html#e4dae8ba728f7da9b6f31bb39c62b81f">BusWidth</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_qspi_psu___msg.html#2c11ea724a05dd7d68b8e4adcb7ac46e">Flags</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="e4dae8ba728f7da9b6f31bb39c62b81f"></a><!-- doxytag: member="XQspiPsu_Msg::BusWidth" ref="e4dae8ba728f7da9b6f31bb39c62b81f" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
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|
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|
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<td class="memname">u32 <a class="el" href="struct_x_qspi_psu___msg.html#e4dae8ba728f7da9b6f31bb39c62b81f">XQspiPsu_Msg::BusWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="420a0720c6eb8d77aae09c829185b160"></a><!-- doxytag: member="XQspiPsu_Msg::ByteCount" ref="420a0720c6eb8d77aae09c829185b160" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
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|
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|
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<td class="memname">u32 <a class="el" href="struct_x_qspi_psu___msg.html#420a0720c6eb8d77aae09c829185b160">XQspiPsu_Msg::ByteCount</a> </td>
|
||||
</tr>
|
||||
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|
||||
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|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
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|
||||
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|
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</div><p>
|
||||
<a class="anchor" name="2c11ea724a05dd7d68b8e4adcb7ac46e"></a><!-- doxytag: member="XQspiPsu_Msg::Flags" ref="2c11ea724a05dd7d68b8e4adcb7ac46e" args="" -->
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<div class="memitem">
|
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<div class="memproto">
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|
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<td class="memname">u32 <a class="el" href="struct_x_qspi_psu___msg.html#2c11ea724a05dd7d68b8e4adcb7ac46e">XQspiPsu_Msg::Flags</a> </td>
|
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|
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<div class="memdoc">
|
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|
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<p>
|
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|
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</div>
|
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</div><p>
|
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<a class="anchor" name="1fb697c64fd14580822f4baf50f26df1"></a><!-- doxytag: member="XQspiPsu_Msg::RxBfrPtr" ref="1fb697c64fd14580822f4baf50f26df1" args="" -->
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<div class="memitem">
|
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<div class="memproto">
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<td class="memname">u8* <a class="el" href="struct_x_qspi_psu___msg.html#1fb697c64fd14580822f4baf50f26df1">XQspiPsu_Msg::RxBfrPtr</a> </td>
|
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</tr>
|
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|
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<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="09fc20d95cb26f29a649207d0b495f58"></a><!-- doxytag: member="XQspiPsu_Msg::TxBfrPtr" ref="09fc20d95cb26f29a649207d0b495f58" args="" -->
|
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<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
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<tr>
|
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<td class="memname">u8* <a class="el" href="struct_x_qspi_psu___msg.html#09fc20d95cb26f29a649207d0b495f58">XQspiPsu_Msg::TxBfrPtr</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
<li><a class="el" href="xqspipsu_8h.html">xqspipsu.h</a></ul>
|
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Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
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xqspipsu.c File Reference
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|
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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|
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|
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<h1>xqspipsu.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file implements the functions required to use the QSPIPSU hardware to perform a transfer. These are accessible to the user via <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.<p>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- --- -------- -----------------------------------------------
|
||||
1.0 hk 08/21/14 First release
|
||||
sk 03/13/15 Added IO mode support.</pre><p>
|
||||
<pre> </pre>
|
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<p>
|
||||
<code>#include "<a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
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<tr><td></td></tr>
|
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<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#3c23b3bb935cf4238301444cdcc2e810">XQspiPsu_CfgInitialize</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> *ConfigPtr, u32 EffectiveAddr)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#799b60ee7157ed46b84475677aa0dc03">XQspiPsu_Reset</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#aa69ec6da90deb760954ea3dcfd55d7f">XQspiPsu_Abort</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#17d058fa58b8599c1db27092f444d0d0">XQspiPsu_PolledTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, unsigned NumMsg)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#7c466797e1ee111cea006766a5547eee">XQspiPsu_InterruptTransfer</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, unsigned NumMsg)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#8a8f3a75fb4cb75c943245c7b9fccfd5">XQspiPsu_InterruptHandler</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu_8c.html#7b78484a0a6c8b30976a911a2a6c805a">XQspiPsu_SetStatusHandler</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, void *CallBackRef, <a class="el" href="xqspipsu_8h.html#a8a9e7bc144fabb62eb6a2d3d2ec7b0e">XQspiPsu_StatusHandler</a> FuncPtr)</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="aa69ec6da90deb760954ea3dcfd55d7f"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_Abort" ref="aa69ec6da90deb760954ea3dcfd55d7f" args="(XQspiPsu *InstancePtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XQspiPsu_Abort </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Aborts a transfer in progress by<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd></dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="3c23b3bb935cf4238301444cdcc2e810"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_CfgInitialize" ref="3c23b3bb935cf4238301444cdcc2e810" args="(XQspiPsu *InstancePtr, XQspiPsu_Config *ConfigPtr, u32 EffectiveAddr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_CfgInitialize </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> * </td>
|
||||
<td class="paramname"> <em>ConfigPtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u32 </td>
|
||||
<td class="paramname"> <em>EffectiveAddr</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Initializes a specific <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance such that the driver is ready to use.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>ConfigPtr</em> </td><td>is a reference to a structure containing information about a specific QSPIPSU device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>EffectiveAddr</em> </td><td>is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use ConfigPtr->Config.BaseAddress for this device.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if successful.</li><li>XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8a8f3a75fb4cb75c943245c7b9fccfd5"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_InterruptHandler" ref="8a8f3a75fb4cb75c943245c7b9fccfd5" args="(XQspiPsu *InstancePtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_InterruptHandler </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Handles interrupt based transfers by acting on GENFIFO and DMA interurpts.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if successful.</li><li>XST_FAILURE if transfer fails.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7c466797e1ee111cea006766a5547eee"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_InterruptTransfer" ref="7c466797e1ee111cea006766a5547eee" args="(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg, unsigned NumMsg)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_InterruptTransfer </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> * </td>
|
||||
<td class="paramname"> <em>Msg</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">unsigned </td>
|
||||
<td class="paramname"> <em>NumMsg</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function initiates a transfer on the bus and enables interrupts. The transfer is completed by the interrupt handler. The messages passed are all transferred on the bus between one CS assert and de-assert.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Msg</em> </td><td>is a pointer to the structure containing transfer data. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>NumMsg</em> </td><td>is the number of messages to be transferred.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if successful.</li><li>XST_FAILURE if transfer fails.</li><li>XST_DEVICE_BUSY if a transfer is already in progress.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="17d058fa58b8599c1db27092f444d0d0"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_PolledTransfer" ref="17d058fa58b8599c1db27092f444d0d0" args="(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg, unsigned NumMsg)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_PolledTransfer </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> * </td>
|
||||
<td class="paramname"> <em>Msg</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">unsigned </td>
|
||||
<td class="paramname"> <em>NumMsg</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function performs a transfer on the bus in polled mode. The messages passed are all transferred on the bus between one CS assert and de-assert.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Msg</em> </td><td>is a pointer to the structure containing transfer data. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>NumMsg</em> </td><td>is the number of messages to be transferred.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if successful.</li><li>XST_FAILURE if transfer fails.</li><li>XST_DEVICE_BUSY if a transfer is already in progress.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="799b60ee7157ed46b84475677aa0dc03"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_Reset" ref="799b60ee7157ed46b84475677aa0dc03" args="(XQspiPsu *InstancePtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XQspiPsu_Reset </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Resets the QSPIPSU device. Reset must only be called after the driver has been initialized. Any data transfer that is in progress is aborted.<p>
|
||||
The upper layer software is responsible for re-configuring (if necessary) and restarting the QSPIPSU device after the reset.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7b78484a0a6c8b30976a911a2a6c805a"></a><!-- doxytag: member="xqspipsu.c::XQspiPsu_SetStatusHandler" ref="7b78484a0a6c8b30976a911a2a6c805a" args="(XQspiPsu *InstancePtr, void *CallBackRef, XQspiPsu_StatusHandler FuncPtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XQspiPsu_SetStatusHandler </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">void * </td>
|
||||
<td class="paramname"> <em>CallBackRef</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype"><a class="el" href="xqspipsu_8h.html#a8a9e7bc144fabb62eb6a2d3d2ec7b0e">XQspiPsu_StatusHandler</a> </td>
|
||||
<td class="paramname"> <em>FuncPtr</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. The handler executes in an interrupt context, so it must minimize the amount of processing performed. One of the following status events is passed to the status handler.<p>
|
||||
<pre></pre><p>
|
||||
<pre> XST_SPI_TRANSFER_DONE The requested data transfer is done</pre><p>
|
||||
<pre> XST_SPI_TRANSMIT_UNDERRUN As a slave device, the master clocked data
|
||||
but there were none available in the transmit
|
||||
register/FIFO. This typically means the slave
|
||||
application did not issue a transfer request
|
||||
fast enough, or the processor/driver could not
|
||||
fill the transmit register/FIFO fast enough.</pre><p>
|
||||
<pre> XST_SPI_RECEIVE_OVERRUN The QSPIPSU device lost data. Data was received
|
||||
but the receive data register/FIFO was full.</pre><p>
|
||||
<pre> </pre> <dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>CallBackRef</em> </td><td>is the upper layer callback reference passed back when the callback function is invoked. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>FuncPtr</em> </td><td>is the pointer to the callback function.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd>None.</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd></dd></dl>
|
||||
The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread.
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/xqspipsu_8h.html
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/xqspipsu__g_8c.html
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|
|
@ -0,0 +1,65 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xqspipsu_g.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xqspipsu_g.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file contains a configuration table that specifies the configuration of QSPIPSU devices in the system.<p>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- --- -------- -----------------------------------------------
|
||||
1.0 hk 08/21/14 First release
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>"</code><br>
|
||||
<code>#include "xparameters.h"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Variables</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__g_8c.html#0a1440bbf114a2e065b65bca531a14c3">XQspiPsu_ConfigTable</a> [XPAR_XQSPIPSU_NUM_INSTANCES]</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Variable Documentation</h2>
|
||||
<a class="anchor" name="0a1440bbf114a2e065b65bca531a14c3"></a><!-- doxytag: member="xqspipsu_g.c::XQspiPsu_ConfigTable" ref="0a1440bbf114a2e065b65bca531a14c3" args="[XPAR_XQSPIPSU_NUM_INSTANCES]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> <a class="el" href="xqspipsu__sinit_8c.html#07435c645a3bde95933d0461713e4e57">XQspiPsu_ConfigTable</a>[XPAR_XQSPIPSU_NUM_INSTANCES] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
<b>Initial value:</b><div class="fragment"><pre class="fragment"> {
|
||||
{
|
||||
XPAR_XQSPIPSU_0_DEVICE_ID,
|
||||
XPAR_XQSPIPSU_0_BASEADDR,
|
||||
XPAR_XQSPIPSU_0_QSPI_CLK_FREQ_HZ,
|
||||
XPAR_XQSPIPSU_0_QSPI_MODE
|
||||
},
|
||||
}
|
||||
</pre></div>This table contains configuration information for each QSPIPSU device in the system.
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
7679
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/xqspipsu__hw_8h.html
Executable file
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XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/xqspipsu__hw_8h.html
Executable file
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310
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/xqspipsu__options_8c.html
Executable file
310
XilinxProcessorIPLib/drivers/qspipsu_v1_1/doc/html/api/xqspipsu__options_8c.html
Executable file
|
|
@ -0,0 +1,310 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xqspipsu_options.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xqspipsu_options.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
This file implements funcitons to configure the QSPIPSU component, specifically some optional settings, clock and flash related information.<p>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- --- -------- -----------------------------------------------
|
||||
1.0 hk 08/21/14 First release
|
||||
sk 03/13/15 Added IO mode support.</pre><p>
|
||||
<pre> </pre>
|
||||
<p>
|
||||
<code>#include "<a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Classes</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">struct </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_options_map.html">OptionsMap</a></td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Defines</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#7270573aac2e897d40123dcb0a181aac">XQSPIPSU_NUM_OPTIONS</a> (sizeof(OptionsTable) / sizeof(<a class="el" href="struct_options_map.html">OptionsMap</a>))</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#489dc7a54f66696b3cc98b74ec3d0276">XQspiPsu_SetOptions</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Options)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#e64c9da28908fe94db0c2890fcd97679">XQspiPsu_ClearOptions</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Options)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#4a71a2847d3d2e11d9c69c29084e38df">XQspiPsu_GetOptions</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#22b18488a0529eeaadc3b5966f18855d">XQspiPsu_SetClkPrescaler</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u8 Prescaler)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#28338ae42ed4f7d2685ab18de2d21128">XQspiPsu_SelectFlash</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u8 FlashCS, u8 FlashBus)</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__options_8c.html#9f08409af64f221800e065b4fd31cd75">XQspiPsu_SetReadMode</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, u32 Mode)</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Define Documentation</h2>
|
||||
<a class="anchor" name="7270573aac2e897d40123dcb0a181aac"></a><!-- doxytag: member="xqspipsu_options.c::XQSPIPSU_NUM_OPTIONS" ref="7270573aac2e897d40123dcb0a181aac" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XQSPIPSU_NUM_OPTIONS (sizeof(OptionsTable) / sizeof(<a class="el" href="struct_options_map.html">OptionsMap</a>)) </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="e64c9da28908fe94db0c2890fcd97679"></a><!-- doxytag: member="xqspipsu_options.c::XQspiPsu_ClearOptions" ref="e64c9da28908fe94db0c2890fcd97679" args="(XQspiPsu *InstancePtr, u32 Options)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_ClearOptions </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u32 </td>
|
||||
<td class="paramname"> <em>Options</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function resets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus. The device must be idle rather than busy transferring data before setting these device options.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Options</em> </td><td>contains the specified options to be set. This is a bit mask where a 1 indicates the option should be turned OFF and a 0 indicates no action. One or more bit values may be contained in the mask. See the bit definitions named XQSPIPSU_*_OPTIONS in the file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if options are successfully set.</li><li>XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>This function is not thread-safe. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="4a71a2847d3d2e11d9c69c29084e38df"></a><!-- doxytag: member="xqspipsu_options.c::XQspiPsu_GetOptions" ref="4a71a2847d3d2e11d9c69c29084e38df" args="(XQspiPsu *InstancePtr)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 XQspiPsu_GetOptions </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function gets the options for the QSPIPSU device. The options control how the device behaves relative to the QSPIPSU bus.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd></dd></dl>
|
||||
Options contains the specified options currently set. This is a bit value where a 1 means the option is on, and a 0 means the option is off. See the bit definitions named XQSPIPSU_*_OPTIONS in file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="28338ae42ed4f7d2685ab18de2d21128"></a><!-- doxytag: member="xqspipsu_options.c::XQspiPsu_SelectFlash" ref="28338ae42ed4f7d2685ab18de2d21128" args="(XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">void XQspiPsu_SelectFlash </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>FlashCS</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>FlashBus</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This funciton should be used to tell the QSPIPSU driver the HW flash configuration being used. This API should be called atleast once in the application. If desired, it can be called multiple times when switching between communicating to different flahs devices/using different configs.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>FlashCS</em> </td><td>- Flash Chip Select. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>FlashBus</em> </td><td>- Flash Bus (Upper, Lower or Both).</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if successful.</li><li>XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>If this funciton is not called atleast once in the application, the driver assumes there is a single flash connected to the lower bus and CS line. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="22b18488a0529eeaadc3b5966f18855d"></a><!-- doxytag: member="xqspipsu_options.c::XQspiPsu_SetClkPrescaler" ref="22b18488a0529eeaadc3b5966f18855d" args="(XQspiPsu *InstancePtr, u8 Prescaler)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_SetClkPrescaler </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u8 </td>
|
||||
<td class="paramname"> <em>Prescaler</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Configures the clock according to the prescaler passed.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Prescaler</em> </td><td>- clock prescaler to be set.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if successful.</li><li>XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="489dc7a54f66696b3cc98b74ec3d0276"></a><!-- doxytag: member="xqspipsu_options.c::XQspiPsu_SetOptions" ref="489dc7a54f66696b3cc98b74ec3d0276" args="(XQspiPsu *InstancePtr, u32 Options)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_SetOptions </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u32 </td>
|
||||
<td class="paramname"> <em>Options</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function sets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus. The device must be idle rather than busy transferring data before setting these device options.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Options</em> </td><td>contains the specified options to be set. This is a bit mask where a 1 indicates the option should be turned ON and a 0 indicates no action. One or more bit values may be contained in the mask. See the bit definitions named XQSPIPSU_*_OPTIONS in the file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if options are successfully set.</li><li>XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>This function is not thread-safe. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="9f08409af64f221800e065b4fd31cd75"></a><!-- doxytag: member="xqspipsu_options.c::XQspiPsu_SetReadMode" ref="9f08409af64f221800e065b4fd31cd75" args="(XQspiPsu *InstancePtr, u32 Mode)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">int XQspiPsu_SetReadMode </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype"><a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> * </td>
|
||||
<td class="paramname"> <em>InstancePtr</em>, </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td class="paramkey"></td>
|
||||
<td></td>
|
||||
<td class="paramtype">u32 </td>
|
||||
<td class="paramname"> <em>Mode</em></td><td> </td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td></td>
|
||||
<td>)</td>
|
||||
<td></td><td></td><td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This function sets the Read mode for the QSPIPSU device driver.The device must be idle rather than busy transferring data before setting Read mode options.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>InstancePtr</em> </td><td>is a pointer to the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> instance. </td></tr>
|
||||
<tr><td valign="top"></td><td valign="top"><em>Mode</em> </td><td>contains the specified Mode to be set. See the bit definitions named XQSPIPSU_READMODE_* in the file <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd><ul>
|
||||
<li>XST_SUCCESS if options are successfully set.</li><li>XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting Mode.</li></ul>
|
||||
</dd></dl>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>This function is not thread-safe. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
@ -0,0 +1,91 @@
|
|||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
|
||||
<title>
|
||||
xqspipsu_sinit.c File Reference
|
||||
</title>
|
||||
<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
|
||||
</head>
|
||||
<h3 class="PageHeader">Xilinx Processor IP Library</h3>
|
||||
<hl>Software Drivers</hl>
|
||||
<hr class="whs1">
|
||||
<!-- Generated by Doxygen 1.4.7 -->
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="index.html"><span>Main Page</span></a></li>
|
||||
<li><a href="annotated.html"><span>Classes</span></a></li>
|
||||
<li id="current"><a href="files.html"><span>Files</span></a></li>
|
||||
</ul></div>
|
||||
<div class="tabs">
|
||||
<ul>
|
||||
<li><a href="files.html"><span>File List</span></a></li>
|
||||
<li><a href="globals.html"><span>File Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>xqspipsu_sinit.c File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2>
|
||||
The implementation of the <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> component's static initialization functionality.<p>
|
||||
<pre>
|
||||
MODIFICATION HISTORY:</pre><p>
|
||||
<pre> Ver Who Date Changes
|
||||
----- --- -------- -----------------------------------------------
|
||||
1.0 hk 08/21/14 First release
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "xstatus.h"</code><br>
|
||||
<code>#include "<a class="el" href="xqspipsu_8h.html">xqspipsu.h</a>"</code><br>
|
||||
<code>#include "xparameters.h"</code><br>
|
||||
<table border="0" cellpadding="0" cellspacing="0">
|
||||
<tr><td></td></tr>
|
||||
<tr><td colspan="2"><br><h2>Functions</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__sinit_8c.html#604c468e86aab21cab0b93ee8c0d8942">XQspiPsu_LookupConfig</a> (u16 DeviceId)</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Variables</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="xqspipsu__sinit_8c.html#07435c645a3bde95933d0461713e4e57">XQspiPsu_ConfigTable</a> []</td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Function Documentation</h2>
|
||||
<a class="anchor" name="604c468e86aab21cab0b93ee8c0d8942"></a><!-- doxytag: member="xqspipsu_sinit.c::XQspiPsu_LookupConfig" ref="604c468e86aab21cab0b93ee8c0d8942" args="(u16 DeviceId)" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a>* XQspiPsu_LookupConfig </td>
|
||||
<td>(</td>
|
||||
<td class="paramtype">u16 </td>
|
||||
<td class="paramname"> <em>DeviceId</em> </td>
|
||||
<td> ) </td>
|
||||
<td width="100%"></td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Looks up the device configuration based on the unique device ID. A table contains the configuration info for each device in the system.<p>
|
||||
<dl compact><dt><b>Parameters:</b></dt><dd>
|
||||
<table border="0" cellspacing="2" cellpadding="0">
|
||||
<tr><td valign="top"></td><td valign="top"><em>DeviceId</em> </td><td>contains the ID of the device to look up the configuration for.</td></tr>
|
||||
</table>
|
||||
</dl>
|
||||
<dl compact><dt><b>Returns:</b></dt><dd></dd></dl>
|
||||
A pointer to the configuration found or NULL if the specified device ID was not found. See <a class="el" href="xqspipsu_8h.html">xqspipsu.h</a> for the definition of <a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a>.<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>None. </dd></dl>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<hr><h2>Variable Documentation</h2>
|
||||
<a class="anchor" name="07435c645a3bde95933d0461713e4e57"></a><!-- doxytag: member="xqspipsu_sinit.c::XQspiPsu_ConfigTable" ref="07435c645a3bde95933d0461713e4e57" args="[]" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname"><a class="el" href="struct_x_qspi_psu___config.html">XQspiPsu_Config</a> <a class="el" href="xqspipsu__sinit_8c.html#07435c645a3bde95933d0461713e4e57">XQspiPsu_ConfigTable</a>[] </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This table contains configuration information for each QSPIPSU device in the system.
|
||||
</div>
|
||||
</div><p>
|
||||
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
40
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/Makefile
Normal file
40
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/Makefile
Normal file
|
|
@ -0,0 +1,40 @@
|
|||
COMPILER=
|
||||
ARCHIVER=
|
||||
CP=cp
|
||||
COMPILER_FLAGS=
|
||||
EXTRA_COMPILER_FLAGS=
|
||||
LIB=libxil.a
|
||||
|
||||
CC_FLAGS = $(COMPILER_FLAGS)
|
||||
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
|
||||
|
||||
RELEASEDIR=../../../lib
|
||||
INCLUDEDIR=../../../include
|
||||
INCLUDES=-I./. -I${INCLUDEDIR}
|
||||
|
||||
OUTS = *.o
|
||||
|
||||
LIBSOURCES:=*.c
|
||||
INCLUDEFILES:=*.h
|
||||
|
||||
OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
|
||||
|
||||
libs: banner xqspipsu_libs clean
|
||||
|
||||
%.o: %.c
|
||||
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
|
||||
|
||||
banner:
|
||||
echo "Compiling qspipsu"
|
||||
|
||||
xqspipsu_libs: ${OBJECTS}
|
||||
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
|
||||
|
||||
.PHONY: include
|
||||
include: xqspipsu_includes
|
||||
|
||||
xqspipsu_includes:
|
||||
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
|
||||
|
||||
clean:
|
||||
rm -rf ${OBJECTS}
|
||||
1228
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu.c
Normal file
1228
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu.c
Normal file
File diff suppressed because it is too large
Load diff
263
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu.h
Normal file
263
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu.h
Normal file
|
|
@ -0,0 +1,263 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xqspipsu.h
|
||||
*
|
||||
* This is the header file for the implementation of QSPIPSU driver.
|
||||
* Generic QSPI interface allows for communication to any QSPI slave device.
|
||||
* GQSPI contains a GENFIFO into which the bus transfers required are to be
|
||||
* pushed with appropriate configuration. The controller provides TX and RX
|
||||
* FIFO's and a DMA to be used for RX transfers. The controller executes each
|
||||
* GENFIFO entry noting the configuration and places data on the bus as required
|
||||
*
|
||||
* The different options in GENFIFO are as follows:
|
||||
* IMM_DATA : Can be one byte of data to be transmitted, number of clocks or
|
||||
* number of bytes in transfer.
|
||||
* DATA_XFER : Indicates that data/clocks need to be transmitted or received.
|
||||
* EXPONENT : e when 2^e bytes are involved in transfer.
|
||||
* SPI_MODE : SPI/Dual SPI/Quad SPI
|
||||
* CS : Lower or Upper CS or Both
|
||||
* Bus : Lower or Upper Bus or Both
|
||||
* TX : When selected, controller transmits data in IMM or fetches number of
|
||||
* bytes mentioned form TX FIFO. If not selected, dummies are pumped.
|
||||
* RX : When selected, controller receives and fills the RX FIFO/allows RX DMA
|
||||
* of requested number of bytes. If not selected, RX data is discarded.
|
||||
* Stripe : Byte stripe over lower and upper bus or not.
|
||||
* Poll : Polls response to match for to a set value (used along with POLL_CFG
|
||||
* registers) and then proceeds to next GENFIFO entry.
|
||||
* This feature is not currently used in the driver.
|
||||
*
|
||||
* GENFIFO has manual and auto start options.
|
||||
* All DMA requests need a 4-byte aligned destination address buffer and
|
||||
* size of transfer should also be a multiple of 4.
|
||||
* This driver supports DMA RX and IO RX.
|
||||
*
|
||||
* Initialization:
|
||||
* This driver uses the GQSPI controller with RX DMA. It supports both
|
||||
* interrupt and polled transfers. Manual start of GENFIFO is used.
|
||||
* XQspiPsu_CfgInitialize() initializes the instance variables.
|
||||
* Additional setting can be done using SetOptions/ClearOptions functions
|
||||
* and SelectSlave function.
|
||||
*
|
||||
* Transfer:
|
||||
* Polled or Interrupt transfers can be done. The transfer function needs the
|
||||
* message(s) to be transmitted in the form of an array of type XQspiPsu_Msg.
|
||||
* This is supposed to contain the byte count and any TX/RX buffers as required.
|
||||
* Flags can be used indicate further information such as whether the message
|
||||
* should be striped. The transfer functions form and write GENFIFO entries,
|
||||
* check the status of the transfer and report back to the application
|
||||
* when done.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- --- -------- -----------------------------------------------.
|
||||
* 1.0 hk 08/21/14 First release
|
||||
* sk 03/13/15 Added IO mode support.
|
||||
* hk 03/18/15 Switch to I/O mode before clearing RX FIFO.
|
||||
* Clear and disbale DMA interrupts/status in abort.
|
||||
* Use DMA DONE bit instead of BUSY as recommended.
|
||||
*
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef _XQSPIPSU_H_ /* prevent circular inclusions */
|
||||
#define _XQSPIPSU_H_ /* by using protection macros */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xstatus.h"
|
||||
#include "xqspipsu_hw.h"
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
/**
|
||||
* The handler data type allows the user to define a callback function to
|
||||
* handle the asynchronous processing for the QSPIPSU device. The application
|
||||
* using this driver is expected to define a handler of this type to support
|
||||
* interrupt driven mode. The handler executes in an interrupt context, so
|
||||
* only minimal processing should be performed.
|
||||
*
|
||||
* @param CallBackRef is the callback reference passed in by the upper
|
||||
* layer when setting the callback functions, and passed back to
|
||||
* the upper layer when the callback is invoked. Its type is
|
||||
* not important to the driver, so it is a void pointer.
|
||||
* @param StatusEvent holds one or more status events that have occurred.
|
||||
* See the XQspiPsu_SetStatusHandler() for details on the status
|
||||
* events that can be passed in the callback.
|
||||
* @param ByteCount indicates how many bytes of data were successfully
|
||||
* transferred. This may be less than the number of bytes
|
||||
* requested if the status event indicates an error.
|
||||
*/
|
||||
typedef void (*XQspiPsu_StatusHandler) (void *CallBackRef, u32 StatusEvent,
|
||||
unsigned ByteCount);
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information for a flash message.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 *TxBfrPtr;
|
||||
u8 *RxBfrPtr;
|
||||
u32 ByteCount;
|
||||
u32 BusWidth;
|
||||
u32 Flags;
|
||||
} XQspiPsu_Msg;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information for the device.
|
||||
*/
|
||||
typedef struct {
|
||||
u16 DeviceId; /**< Unique ID of device */
|
||||
u32 BaseAddress; /**< Base address of the device */
|
||||
u32 InputClockHz; /**< Input clock frequency */
|
||||
u8 ConnectionMode; /**< Single, Stacked and Parallel mode */
|
||||
u8 BusWidth; /**< Bus width available on board */
|
||||
} XQspiPsu_Config;
|
||||
|
||||
/**
|
||||
* The XQspiPsu driver instance data. The user is required to allocate a
|
||||
* variable of this type for every QSPIPSU device in the system. A pointer
|
||||
* to a variable of this type is then passed to the driver API functions.
|
||||
*/
|
||||
typedef struct {
|
||||
XQspiPsu_Config Config; /**< Configuration structure */
|
||||
u32 IsReady; /**< Device is initialized and ready */
|
||||
|
||||
u8 *SendBufferPtr; /**< Buffer to send (state) */
|
||||
u8 *RecvBufferPtr; /**< Buffer to receive (state) */
|
||||
u8 *GenFifoBufferPtr; /**< Gen FIFO entries */
|
||||
int TxBytes; /**< Number of bytes to transfer (state) */
|
||||
int RxBytes; /**< Number of bytes left to transfer(state) */
|
||||
int GenFifoEntries; /**< Number of Gen FIFO entries remaining */
|
||||
u32 IsBusy; /**< A transfer is in progress (state) */
|
||||
u32 ReadMode; /**< DMA or IO mode */
|
||||
u32 GenFifoCS;
|
||||
u32 GenFifoBus;
|
||||
int NumMsg;
|
||||
int MsgCnt;
|
||||
int IsUnaligned;
|
||||
XQspiPsu_Msg *Msg;
|
||||
XQspiPsu_StatusHandler StatusHandler;
|
||||
void *StatusRef; /**< Callback reference for status handler */
|
||||
} XQspiPsu;
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
#define XQSPIPSU_READMODE_DMA 0x0
|
||||
#define XQSPIPSU_READMODE_IO 0x1
|
||||
|
||||
#define XQSPIPSU_SELECT_FLASH_CS_LOWER 0x1
|
||||
#define XQSPIPSU_SELECT_FLASH_CS_UPPER 0x2
|
||||
#define XQSPIPSU_SELECT_FLASH_CS_BOTH 0x3
|
||||
|
||||
#define XQSPIPSU_SELECT_FLASH_BUS_LOWER 0x1
|
||||
#define XQSPIPSU_SELECT_FLASH_BUS_UPPER 0x2
|
||||
#define XQSPIPSU_SELECT_FLASH_BUS_BOTH 0x3
|
||||
|
||||
#define XQSPIPSU_SELECT_MODE_SPI 0x1
|
||||
#define XQSPIPSU_SELECT_MODE_DUALSPI 0x2
|
||||
#define XQSPIPSU_SELECT_MODE_QUADSPI 0x4
|
||||
|
||||
#define XQSPIPSU_GENFIFO_CS_SETUP 0x04
|
||||
#define XQSPIPSU_GENFIFO_CS_HOLD 0x03
|
||||
|
||||
#define XQSPIPSU_CLK_ACTIVE_LOW_OPTION 0x2
|
||||
#define XQSPIPSU_CLK_PHASE_1_OPTION 0x4
|
||||
#define XQSPIPSU_MANUAL_START_OPTION 0x8
|
||||
|
||||
#define XQSPIPSU_GENFIFO_EXP_START 0x100
|
||||
|
||||
#define XQSPIPSU_DMA_BYTES_MAX 0x10000000
|
||||
|
||||
#define XQSPIPSU_CLK_PRESCALE_2 0x00
|
||||
#define XQSPIPSU_CLK_PRESCALE_4 0x01
|
||||
#define XQSPIPSU_CLK_PRESCALE_8 0x02
|
||||
#define XQSPIPSU_CLK_PRESCALE_16 0x03
|
||||
#define XQSPIPSU_CLK_PRESCALE_32 0x04
|
||||
#define XQSPIPSU_CLK_PRESCALE_64 0x05
|
||||
#define XQSPIPSU_CLK_PRESCALE_128 0x06
|
||||
#define XQSPIPSU_CLK_PRESCALE_256 0x07
|
||||
#define XQSPIPSU_CR_PRESC_MAXIMUM 7
|
||||
|
||||
#define XQSPIPSU_CONNECTION_MODE_SINGLE 0
|
||||
#define XQSPIPSU_CONNECTION_MODE_STACKED 1
|
||||
#define XQSPIPSU_CONNECTION_MODE_PARALLEL 2
|
||||
|
||||
/* Add more flags as required */
|
||||
#define XQSPIPSU_MSG_FLAG_STRIPE 0x1
|
||||
|
||||
#define XQspiPsu_Select(InstancePtr) XQspiPsu_Out32((InstancePtr->Config.BaseAddress) + XQSPIPSU_SEL_OFFSET, XQSPIPSU_SEL_MASK)
|
||||
|
||||
#define XQspiPsu_Enable(InstancePtr) XQspiPsu_Out32((InstancePtr->Config.BaseAddress) + XQSPIPSU_EN_OFFSET, XQSPIPSU_EN_MASK)
|
||||
|
||||
#define XQspiPsu_Disable(InstancePtr) XQspiPsu_Out32((InstancePtr->Config.BaseAddress) + XQSPIPSU_EN_OFFSET, 0x0)
|
||||
|
||||
#define XQspiPsu_IsManualStart(InstancePtr) ((XQspiPsu_GetOptions(InstancePtr) & XQSPIPSU_MANUAL_START_OPTION) ? TRUE : FALSE)
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
/* Initialization and reset */
|
||||
XQspiPsu_Config *XQspiPsu_LookupConfig(u16 DeviceId);
|
||||
int XQspiPsu_CfgInitialize(XQspiPsu *InstancePtr, XQspiPsu_Config *ConfigPtr,
|
||||
u32 EffectiveAddr);
|
||||
void XQspiPsu_Reset(XQspiPsu *InstancePtr);
|
||||
void XQspiPsu_Abort(XQspiPsu *InstancePtr);
|
||||
|
||||
/* Transfer functions and handlers */
|
||||
int XQspiPsu_PolledTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
|
||||
unsigned NumMsg);
|
||||
int XQspiPsu_InterruptTransfer(XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg,
|
||||
unsigned NumMsg);
|
||||
int XQspiPsu_InterruptHandler(XQspiPsu *InstancePtr);
|
||||
void XQspiPsu_SetStatusHandler(XQspiPsu *InstancePtr, void *CallBackRef,
|
||||
XQspiPsu_StatusHandler FuncPtr);
|
||||
|
||||
/* Configuration functions */
|
||||
int XQspiPsu_SetClkPrescaler(XQspiPsu *InstancePtr, u8 Prescaler);
|
||||
void XQspiPsu_SelectFlash(XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus);
|
||||
int XQspiPsu_SetOptions(XQspiPsu *InstancePtr, u32 Options);
|
||||
int XQspiPsu_ClearOptions(XQspiPsu *InstancePtr, u32 Options);
|
||||
u32 XQspiPsu_GetOptions(XQspiPsu *InstancePtr);
|
||||
int XQspiPsu_SetReadMode(XQspiPsu *InstancePtr, u32 Mode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _XQSPIPSU_H_ */
|
||||
80
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu_g.c
Normal file
80
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu_g.c
Normal file
|
|
@ -0,0 +1,80 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xqspipsu_g.c
|
||||
*
|
||||
* This file contains a configuration table that specifies the configuration of
|
||||
* QSPIPSU devices in the system.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- --- -------- -----------------------------------------------
|
||||
* 1.0 hk 08/21/14 First release
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xqspipsu.h"
|
||||
#include "xparameters.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
|
||||
/************************** Variable Prototypes ******************************/
|
||||
|
||||
/**
|
||||
* This table contains configuration information for each QSPIPSU device
|
||||
* in the system.
|
||||
*/
|
||||
XQspiPsu_Config XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES] = {
|
||||
{
|
||||
XPAR_XQSPIPSU_0_DEVICE_ID, /* Device ID for instance */
|
||||
XPAR_XQSPIPSU_0_BASEADDR, /* Device base address */
|
||||
XPAR_XQSPIPSU_0_QSPI_CLK_FREQ_HZ,
|
||||
XPAR_XQSPIPSU_0_QSPI_MODE
|
||||
},
|
||||
};
|
||||
837
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu_hw.h
Normal file
837
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu_hw.h
Normal file
|
|
@ -0,0 +1,837 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xqspipsu_hw.h
|
||||
*
|
||||
* This file contains low level access funcitons using the base address
|
||||
* directly without an instance.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- --- -------- -----------------------------------------------.
|
||||
* 1.0 hk 08/21/14 First release
|
||||
* hk 03/18/15 Add DMA status register masks required.
|
||||
*
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef _XQSPIPSU_HW_H_ /* prevent circular inclusions */
|
||||
#define _XQSPIPSU_HW_H_ /* by using protection macros */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xil_types.h"
|
||||
#include "xil_assert.h"
|
||||
#include "xil_io.h"
|
||||
#include "xparameters.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
/**
|
||||
* QSPI Base Address
|
||||
*/
|
||||
#define XQSPIPS_BASEADDR 0XFF0F0000
|
||||
|
||||
/**
|
||||
* GQSPI Base Address
|
||||
*/
|
||||
#define XQSPIPSU_BASEADDR 0xFF0F0100
|
||||
#define XQSPIPSU_OFFSET 0x100
|
||||
|
||||
/**
|
||||
* Register: XQSPIPS_EN_REG
|
||||
*/
|
||||
#define XQSPIPS_EN_REG ( ( XQSPIPS_BASEADDR ) + 0X00000014 )
|
||||
|
||||
#define XQSPIPS_EN_SHIFT 0
|
||||
#define XQSPIPS_EN_WIDTH 1
|
||||
#define XQSPIPS_EN_MASK 0X00000001
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_CFG
|
||||
*/
|
||||
#define XQSPIPSU_CFG_OFFSET 0X00000000
|
||||
|
||||
#define XQSPIPSU_CFG_MODE_EN_SHIFT 30
|
||||
#define XQSPIPSU_CFG_MODE_EN_WIDTH 2
|
||||
#define XQSPIPSU_CFG_MODE_EN_MASK 0XC0000000
|
||||
#define XQSPIPSU_CFG_MODE_EN_DMA_MASK 0X80000000
|
||||
|
||||
#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_SHIFT 29
|
||||
#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_WIDTH 1
|
||||
#define XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK 0X20000000
|
||||
|
||||
#define XQSPIPSU_CFG_START_GEN_FIFO_SHIFT 28
|
||||
#define XQSPIPSU_CFG_START_GEN_FIFO_WIDTH 1
|
||||
#define XQSPIPSU_CFG_START_GEN_FIFO_MASK 0X10000000
|
||||
|
||||
#define XQSPIPSU_CFG_ENDIAN_SHIFT 26
|
||||
#define XQSPIPSU_CFG_ENDIAN_WIDTH 1
|
||||
#define XQSPIPSU_CFG_ENDIAN_MASK 0X04000000
|
||||
|
||||
#define XQSPIPSU_CFG_EN_POLL_TO_SHIFT 20
|
||||
#define XQSPIPSU_CFG_EN_POLL_TO_WIDTH 1
|
||||
#define XQSPIPSU_CFG_EN_POLL_TO_MASK 0X00100000
|
||||
|
||||
#define XQSPIPSU_CFG_WP_HOLD_SHIFT 19
|
||||
#define XQSPIPSU_CFG_WP_HOLD_WIDTH 1
|
||||
#define XQSPIPSU_CFG_WP_HOLD_MASK 0X00080000
|
||||
|
||||
#define XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT 3
|
||||
#define XQSPIPSU_CFG_BAUD_RATE_DIV_WIDTH 3
|
||||
#define XQSPIPSU_CFG_BAUD_RATE_DIV_MASK 0X00000038
|
||||
|
||||
#define XQSPIPSU_CFG_CLK_PHA_SHIFT 2
|
||||
#define XQSPIPSU_CFG_CLK_PHA_WIDTH 1
|
||||
#define XQSPIPSU_CFG_CLK_PHA_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_CFG_CLK_POL_SHIFT 1
|
||||
#define XQSPIPSU_CFG_CLK_POL_WIDTH 1
|
||||
#define XQSPIPSU_CFG_CLK_POL_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_ISR
|
||||
*/
|
||||
#define XQSPIPSU_ISR_OFFSET 0X00000004
|
||||
|
||||
#define XQSPIPSU_ISR_RXEMPTY_SHIFT 11
|
||||
#define XQSPIPSU_ISR_RXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_ISR_RXEMPTY_MASK 0X00000800
|
||||
|
||||
#define XQSPIPSU_ISR_GENFIFOFULL_SHIFT 10
|
||||
#define XQSPIPSU_ISR_GENFIFOFULL_WIDTH 1
|
||||
#define XQSPIPSU_ISR_GENFIFOFULL_MASK 0X00000400
|
||||
|
||||
#define XQSPIPSU_ISR_GENFIFONOT_FULL_SHIFT 9
|
||||
#define XQSPIPSU_ISR_GENFIFONOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_ISR_GENFIFONOT_FULL_MASK 0X00000200
|
||||
|
||||
#define XQSPIPSU_ISR_TXEMPTY_SHIFT 8
|
||||
#define XQSPIPSU_ISR_TXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_ISR_TXEMPTY_MASK 0X00000100
|
||||
|
||||
#define XQSPIPSU_ISR_GENFIFOEMPTY_SHIFT 7
|
||||
#define XQSPIPSU_ISR_GENFIFOEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_ISR_GENFIFOEMPTY_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_ISR_RXFULL_SHIFT 5
|
||||
#define XQSPIPSU_ISR_RXFULL_WIDTH 1
|
||||
#define XQSPIPSU_ISR_RXFULL_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_ISR_RXNEMPTY_SHIFT 4
|
||||
#define XQSPIPSU_ISR_RXNEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_ISR_RXNEMPTY_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_ISR_TXFULL_SHIFT 3
|
||||
#define XQSPIPSU_ISR_TXFULL_WIDTH 1
|
||||
#define XQSPIPSU_ISR_TXFULL_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_ISR_TXNOT_FULL_SHIFT 2
|
||||
#define XQSPIPSU_ISR_TXNOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_ISR_TXNOT_FULL_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_SHIFT 1
|
||||
#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_WIDTH 1
|
||||
#define XQSPIPSU_ISR_POLL_TIME_EXPIRE_MASK 0X00000002
|
||||
|
||||
#define XQSPIPSU_ISR_WR_TO_CLR_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_IER
|
||||
*/
|
||||
#define XQSPIPSU_IER_OFFSET 0X00000008
|
||||
|
||||
#define XQSPIPSU_IER_RXEMPTY_SHIFT 11
|
||||
#define XQSPIPSU_IER_RXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IER_RXEMPTY_MASK 0X00000800
|
||||
|
||||
#define XQSPIPSU_IER_GENFIFOFULL_SHIFT 10
|
||||
#define XQSPIPSU_IER_GENFIFOFULL_WIDTH 1
|
||||
#define XQSPIPSU_IER_GENFIFOFULL_MASK 0X00000400
|
||||
|
||||
#define XQSPIPSU_IER_GENFIFONOT_FULL_SHIFT 9
|
||||
#define XQSPIPSU_IER_GENFIFONOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_IER_GENFIFONOT_FULL_MASK 0X00000200
|
||||
|
||||
#define XQSPIPSU_IER_TXEMPTY_SHIFT 8
|
||||
#define XQSPIPSU_IER_TXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IER_TXEMPTY_MASK 0X00000100
|
||||
|
||||
#define XQSPIPSU_IER_GENFIFOEMPTY_SHIFT 7
|
||||
#define XQSPIPSU_IER_GENFIFOEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IER_GENFIFOEMPTY_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_IER_RXFULL_SHIFT 5
|
||||
#define XQSPIPSU_IER_RXFULL_WIDTH 1
|
||||
#define XQSPIPSU_IER_RXFULL_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_IER_RXNEMPTY_SHIFT 4
|
||||
#define XQSPIPSU_IER_RXNEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IER_RXNEMPTY_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_IER_TXFULL_SHIFT 3
|
||||
#define XQSPIPSU_IER_TXFULL_WIDTH 1
|
||||
#define XQSPIPSU_IER_TXFULL_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_IER_TXNOT_FULL_SHIFT 2
|
||||
#define XQSPIPSU_IER_TXNOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_IER_TXNOT_FULL_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_IER_POLL_TIME_EXPIRE_SHIFT 1
|
||||
#define XQSPIPSU_IER_POLL_TIME_EXPIRE_WIDTH 1
|
||||
#define XQSPIPSU_IER_POLL_TIME_EXPIRE_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_IDR
|
||||
*/
|
||||
#define XQSPIPSU_IDR_OFFSET 0X0000000C
|
||||
|
||||
#define XQSPIPSU_IDR_RXEMPTY_SHIFT 11
|
||||
#define XQSPIPSU_IDR_RXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IDR_RXEMPTY_MASK 0X00000800
|
||||
|
||||
#define XQSPIPSU_IDR_GENFIFOFULL_SHIFT 10
|
||||
#define XQSPIPSU_IDR_GENFIFOFULL_WIDTH 1
|
||||
#define XQSPIPSU_IDR_GENFIFOFULL_MASK 0X00000400
|
||||
|
||||
#define XQSPIPSU_IDR_GENFIFONOT_FULL_SHIFT 9
|
||||
#define XQSPIPSU_IDR_GENFIFONOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_IDR_GENFIFONOT_FULL_MASK 0X00000200
|
||||
|
||||
#define XQSPIPSU_IDR_TXEMPTY_SHIFT 8
|
||||
#define XQSPIPSU_IDR_TXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IDR_TXEMPTY_MASK 0X00000100
|
||||
|
||||
#define XQSPIPSU_IDR_GENFIFOEMPTY_SHIFT 7
|
||||
#define XQSPIPSU_IDR_GENFIFOEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IDR_GENFIFOEMPTY_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_IDR_RXFULL_SHIFT 5
|
||||
#define XQSPIPSU_IDR_RXFULL_WIDTH 1
|
||||
#define XQSPIPSU_IDR_RXFULL_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_IDR_RXNEMPTY_SHIFT 4
|
||||
#define XQSPIPSU_IDR_RXNEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IDR_RXNEMPTY_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_IDR_TXFULL_SHIFT 3
|
||||
#define XQSPIPSU_IDR_TXFULL_WIDTH 1
|
||||
#define XQSPIPSU_IDR_TXFULL_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_IDR_TXNOT_FULL_SHIFT 2
|
||||
#define XQSPIPSU_IDR_TXNOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_IDR_TXNOT_FULL_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_SHIFT 1
|
||||
#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_WIDTH 1
|
||||
#define XQSPIPSU_IDR_POLL_TIME_EXPIRE_MASK 0X00000002
|
||||
|
||||
#define XQSPIPSU_IDR_ALL_MASK 0X0FBE
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_IMR
|
||||
*/
|
||||
#define XQSPIPSU_IMR_OFFSET 0X00000010
|
||||
|
||||
#define XQSPIPSU_IMR_RXEMPTY_SHIFT 11
|
||||
#define XQSPIPSU_IMR_RXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IMR_RXEMPTY_MASK 0X00000800
|
||||
|
||||
#define XQSPIPSU_IMR_GENFIFOFULL_SHIFT 10
|
||||
#define XQSPIPSU_IMR_GENFIFOFULL_WIDTH 1
|
||||
#define XQSPIPSU_IMR_GENFIFOFULL_MASK 0X00000400
|
||||
|
||||
#define XQSPIPSU_IMR_GENFIFONOT_FULL_SHIFT 9
|
||||
#define XQSPIPSU_IMR_GENFIFONOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_IMR_GENFIFONOT_FULL_MASK 0X00000200
|
||||
|
||||
#define XQSPIPSU_IMR_TXEMPTY_SHIFT 8
|
||||
#define XQSPIPSU_IMR_TXEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IMR_TXEMPTY_MASK 0X00000100
|
||||
|
||||
#define XQSPIPSU_IMR_GENFIFOEMPTY_SHIFT 7
|
||||
#define XQSPIPSU_IMR_GENFIFOEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IMR_GENFIFOEMPTY_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_IMR_RXFULL_SHIFT 5
|
||||
#define XQSPIPSU_IMR_RXFULL_WIDTH 1
|
||||
#define XQSPIPSU_IMR_RXFULL_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_IMR_RXNEMPTY_SHIFT 4
|
||||
#define XQSPIPSU_IMR_RXNEMPTY_WIDTH 1
|
||||
#define XQSPIPSU_IMR_RXNEMPTY_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_IMR_TXFULL_SHIFT 3
|
||||
#define XQSPIPSU_IMR_TXFULL_WIDTH 1
|
||||
#define XQSPIPSU_IMR_TXFULL_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_IMR_TXNOT_FULL_SHIFT 2
|
||||
#define XQSPIPSU_IMR_TXNOT_FULL_WIDTH 1
|
||||
#define XQSPIPSU_IMR_TXNOT_FULL_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_SHIFT 1
|
||||
#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_WIDTH 1
|
||||
#define XQSPIPSU_IMR_POLL_TIME_EXPIRE_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_EN_REG
|
||||
*/
|
||||
#define XQSPIPSU_EN_OFFSET 0X00000014
|
||||
|
||||
#define XQSPIPSU_EN_SHIFT 0
|
||||
#define XQSPIPSU_EN_WIDTH 1
|
||||
#define XQSPIPSU_EN_MASK 0X00000001
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_TXD
|
||||
*/
|
||||
#define XQSPIPSU_TXD_OFFSET 0X0000001C
|
||||
|
||||
#define XQSPIPSU_TXD_SHIFT 0
|
||||
#define XQSPIPSU_TXD_WIDTH 32
|
||||
#define XQSPIPSU_TXD_MASK 0XFFFFFFFF
|
||||
|
||||
#define XQSPIPSU_TXD_DEPTH 32
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_RXD
|
||||
*/
|
||||
#define XQSPIPSU_RXD_OFFSET 0X00000020
|
||||
|
||||
#define XQSPIPSU_RXD_SHIFT 0
|
||||
#define XQSPIPSU_RXD_WIDTH 32
|
||||
#define XQSPIPSU_RXD_MASK 0XFFFFFFFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_TX_THRESHOLD
|
||||
*/
|
||||
#define XQSPIPSU_TX_THRESHOLD_OFFSET 0X00000028
|
||||
|
||||
#define XQSPIPSU_TX_FIFO_THRESHOLD_SHIFT 0
|
||||
#define XQSPIPSU_TX_FIFO_THRESHOLD_WIDTH 6
|
||||
#define XQSPIPSU_TX_FIFO_THRESHOLD_MASK 0X0000003F
|
||||
#define XQSPIPSU_TX_FIFO_THRESHOLD_RESET_VAL 0X01
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_RX_THRESHOLD
|
||||
*/
|
||||
#define XQSPIPSU_RX_THRESHOLD_OFFSET 0X0000002C
|
||||
|
||||
#define XQSPIPSU_RX_FIFO_THRESHOLD_SHIFT 0
|
||||
#define XQSPIPSU_RX_FIFO_THRESHOLD_WIDTH 6
|
||||
#define XQSPIPSU_RX_FIFO_THRESHOLD_MASK 0X0000003F
|
||||
#define XQSPIPSU_RX_FIFO_THRESHOLD_RESET_VAL 0X01
|
||||
|
||||
#define XQSPIPSU_RXFIFO_THRESHOLD_OPT 32
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_GPIO
|
||||
*/
|
||||
#define XQSPIPSU_GPIO_OFFSET 0X00000030
|
||||
|
||||
#define XQSPIPSU_GPIO_WP_N_SHIFT 0
|
||||
#define XQSPIPSU_GPIO_WP_N_WIDTH 1
|
||||
#define XQSPIPSU_GPIO_WP_N_MASK 0X00000001
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_LPBK_DLY_ADJ
|
||||
*/
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_OFFSET 0X00000038
|
||||
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_SHIFT 5
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_WIDTH 1
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_USE_LPBK_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_SHIFT 3
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_WIDTH 2
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_DLY1_MASK 0X00000018
|
||||
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_SHIFT 0
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_WIDTH 3
|
||||
#define XQSPIPSU_LPBK_DLY_ADJ_DLY0_MASK 0X00000007
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_GEN_FIFO
|
||||
*/
|
||||
#define XQSPIPSU_GEN_FIFO_OFFSET 0X00000040
|
||||
|
||||
#define XQSPIPSU_GEN_FIFO_DATA_SHIFT 0
|
||||
#define XQSPIPSU_GEN_FIFO_DATA_WIDTH 20
|
||||
#define XQSPIPSU_GEN_FIFO_DATA_MASK 0X000FFFFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_SEL
|
||||
*/
|
||||
#define XQSPIPSU_SEL_OFFSET 0X00000044
|
||||
|
||||
#define XQSPIPSU_SEL_SHIFT 0
|
||||
#define XQSPIPSU_SEL_WIDTH 1
|
||||
#define XQSPIPSU_SEL_MASK 0X00000001
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_FIFO_CTRL
|
||||
*/
|
||||
#define XQSPIPSU_FIFO_CTRL_OFFSET 0X0000004C
|
||||
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_SHIFT 2
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_WIDTH 1
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_RX_FIFO_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_SHIFT 1
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_WIDTH 1
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_TX_FIFO_MASK 0X00000002
|
||||
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_SHIFT 0
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_WIDTH 1
|
||||
#define XQSPIPSU_FIFO_CTRL_RST_GEN_FIFO_MASK 0X00000001
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_GF_THRESHOLD
|
||||
*/
|
||||
#define XQSPIPSU_GF_THRESHOLD_OFFSET 0X00000050
|
||||
|
||||
#define XQSPIPSU_GEN_FIFO_THRESHOLD_SHIFT 0
|
||||
#define XQSPIPSU_GEN_FIFO_THRESHOLD_WIDTH 5
|
||||
#define XQSPIPSU_GEN_FIFO_THRESHOLD_MASK 0X0000001F
|
||||
#define XQSPIPSU_GEN_FIFO_THRESHOLD_RESET_VAL 0X10
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_POLL_CFG
|
||||
*/
|
||||
#define XQSPIPSU_POLL_CFG_OFFSET 0X00000054
|
||||
|
||||
#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_SHIFT 31
|
||||
#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_WIDTH 1
|
||||
#define XQSPIPSU_POLL_CFG_EN_MASK_UPPER_MASK 0X80000000
|
||||
|
||||
#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_SHIFT 30
|
||||
#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_WIDTH 1
|
||||
#define XQSPIPSU_POLL_CFG_EN_MASK_LOWER_MASK 0X40000000
|
||||
|
||||
#define XQSPIPSU_POLL_CFG_MASK_EN_SHIFT 8
|
||||
#define XQSPIPSU_POLL_CFG_MASK_EN_WIDTH 8
|
||||
#define XQSPIPSU_POLL_CFG_MASK_EN_MASK 0X0000FF00
|
||||
|
||||
#define XQSPIPSU_POLL_CFG_DATA_VALUE_SHIFT 0
|
||||
#define XQSPIPSU_POLL_CFG_DATA_VALUE_WIDTH 8
|
||||
#define XQSPIPSU_POLL_CFG_DATA_VALUE_MASK 0X000000FF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_P_TIMEOUT
|
||||
*/
|
||||
#define XQSPIPSU_P_TO_OFFSET 0X00000058
|
||||
|
||||
#define XQSPIPSU_P_TO_VALUE_SHIFT 0
|
||||
#define XQSPIPSU_P_TO_VALUE_WIDTH 32
|
||||
#define XQSPIPSU_P_TO_VALUE_MASK 0XFFFFFFFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_XFER_STS
|
||||
*/
|
||||
#define XQSPIPSU_XFER_STS_OFFSET 0X0000005C
|
||||
|
||||
#define XQSPIPSU_XFER_STS_PEND_BYTES_SHIFT 0
|
||||
#define XQSPIPSU_XFER_STS_PEND_BYTES_WIDTH 32
|
||||
#define XQSPIPSU_XFER_STS_PEND_BYTES_MASK 0XFFFFFFFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_GF_SNAPSHOT
|
||||
*/
|
||||
#define XQSPIPSU_GF_SNAPSHOT_OFFSET 0X00000060
|
||||
|
||||
#define XQSPIPSU_GF_SNAPSHOT_SHIFT 0
|
||||
#define XQSPIPSU_GF_SNAPSHOT_WIDTH 20
|
||||
#define XQSPIPSU_GF_SNAPSHOT_MASK 0X000FFFFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_RX_COPY
|
||||
*/
|
||||
#define XQSPIPSU_RX_COPY_OFFSET 0X00000064
|
||||
|
||||
#define XQSPIPSU_RX_COPY_UPPER_SHIFT 8
|
||||
#define XQSPIPSU_RX_COPY_UPPER_WIDTH 8
|
||||
#define XQSPIPSU_RX_COPY_UPPER_MASK 0X0000FF00
|
||||
|
||||
#define XQSPIPSU_RX_COPY_LOWER_SHIFT 0
|
||||
#define XQSPIPSU_RX_COPY_LOWER_WIDTH 8
|
||||
#define XQSPIPSU_RX_COPY_LOWER_MASK 0X000000FF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_MOD_ID
|
||||
*/
|
||||
#define XQSPIPSU_MOD_ID_OFFSET 0X000000FC
|
||||
|
||||
#define XQSPIPSU_MOD_ID_SHIFT 0
|
||||
#define XQSPIPSU_MOD_ID_WIDTH 32
|
||||
#define XQSPIPSU_MOD_ID_MASK 0XFFFFFFFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_ADDR
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET 0X00000700
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_WIDTH 30
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_MASK 0XFFFFFFFC
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_SIZE
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET 0X00000704
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_SIZE_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_SIZE_WIDTH 27
|
||||
#define XQSPIPSU_QSPIDMA_DST_SIZE_MASK 0X1FFFFFFC
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_STS
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_OFFSET 0X00000708
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_SHIFT 13
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_WIDTH 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_DONE_CNT_MASK 0X0000E000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_SHIFT 5
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_WIDTH 8
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_DST_FIFO_LEVEL_MASK 0X00001FE0
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_SHIFT 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_WIDTH 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_WR_OUTSTANDING_MASK 0X0000001E
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_SHIFT 0
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_BUSY_MASK 0X00000001
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_STS_WTC 0xE000
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_CTRL
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET 0X0000070C
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_SHIFT 25
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_WIDTH 7
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_LVL_HIT_THRESHOLD_MASK 0XFE000000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_SHIFT 24
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_APB_ERR_RESP_MASK 0X01000000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_SHIFT 23
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_ENDIAN_MASK 0X00800000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_SHIFT 22
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_AXI_BRST_TYPE_MASK 0X00400000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_SHIFT 10
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_WIDTH 12
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_TO_VAL_MASK 0X003FFC00
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_WIDTH 8
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_FIFO_THRESHOLD_MASK 0X000003FC
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_SHIFT 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_STRM_MASK 0X00000002
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_SHIFT 0
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_PAUSE_MEM_MASK 0X00000001
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL_RESET_VAL 0x803FFA00
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_I_STS
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET 0X00000714
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_SHIFT 7
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_FIFO_OF_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_SHIFT 6
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_INVALID_APB_MASK 0X00000040
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_SHIFT 5
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_THRESHOLD_HIT_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_SHIFT 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_MEM_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_SHIFT 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_TO_STRM_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_AXI_BRESP_ERR_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_SHIFT 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_STS_DONE_MASK 0X00000002
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_INTR_ERR_MASK 0X000000FC
|
||||
#define XQSPIPSU_QSPIDMA_DST_INTR_ALL_MASK 0X000000FE
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_I_EN
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET 0X00000718
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_SHIFT 7
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_FIFO_OF_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_SHIFT 6
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_INVALID_APB_MASK 0X00000040
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_SHIFT 5
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_THRESHOLD_HIT_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_SHIFT 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_MEM_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_SHIFT 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_TO_STRM_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_AXI_BRESP_ERR_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_SHIFT 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_EN_DONE_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_I_DIS
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET 0X0000071C
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_SHIFT 7
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_FIFO_OF_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_SHIFT 6
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_INVALID_APB_MASK 0X00000040
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_SHIFT 5
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_THRESHOLD_HIT_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_SHIFT 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_MEM_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_SHIFT 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_TO_STRM_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_AXI_BRESP_ERR_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_SHIFT 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_I_DIS_DONE_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_IMR
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_OFFSET 0X00000720
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_SHIFT 7
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_FIFO_OF_MASK 0X00000080
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_SHIFT 6
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_INVALID_APB_MASK 0X00000040
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_SHIFT 5
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_THRESHOLD_HIT_MASK 0X00000020
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_SHIFT 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_TO_MEM_MASK 0X00000010
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_SHIFT 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_TO_STRM_MASK 0X00000008
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_SHIFT 2
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_AXI_BRESP_ERR_MASK 0X00000004
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_SHIFT 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_IMR_DONE_MASK 0X00000002
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_CTRL2
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET 0X00000724
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_SHIFT 27
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMASA_MASK 0X08000000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_SHIFT 24
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_WIDTH 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_AWCACHE_MASK 0X07000000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_SHIFT 22
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_WIDTH 1
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_EN_MASK 0X00400000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_SHIFT 19
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_WIDTH 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAB_MASK 0X00380000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_SHIFT 16
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_WIDTH 3
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_RAM_EMAA_MASK 0X00070000
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_SHIFT 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_WIDTH 12
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_TO_PRE_MASK 0X0000FFF0
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_SHIFT 0
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_WIDTH 4
|
||||
#define XQSPIPSU_QSPIDMA_DST_CTRL2_MAX_OUTS_CMDS_MASK 0X0000000F
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_DST_ADDR_MSB
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET 0X00000728
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_SHIFT 0
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_WIDTH 12
|
||||
#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_MASK 0X00000FFF
|
||||
|
||||
/**
|
||||
* Register: XQSPIPSU_QSPIDMA_FUTURE_ECO
|
||||
*/
|
||||
#define XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET 0X00000EFC
|
||||
|
||||
#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_SHIFT 0
|
||||
#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_WIDTH 32
|
||||
#define XQSPIPSU_QSPIDMA_FUTURE_ECO_VAL_MASK 0XFFFFFFFF
|
||||
|
||||
/*
|
||||
* Generic FIFO masks
|
||||
*/
|
||||
#define XQSPIPSU_GENFIFO_IMM_DATA_MASK 0xFF
|
||||
#define XQSPIPSU_GENFIFO_DATA_XFER 0x100
|
||||
#define XQSPIPSU_GENFIFO_EXP 0x200
|
||||
#define XQSPIPSU_GENFIFO_MODE_SPI 0x400
|
||||
#define XQSPIPSU_GENFIFO_MODE_DUALSPI 0x800
|
||||
#define XQSPIPSU_GENFIFO_MODE_QUADSPI 0xC00
|
||||
#define XQSPIPSU_GENFIFO_MODE_MASK 0xC00 /* And with ~MASK first */
|
||||
#define XQSPIPSU_GENFIFO_CS_LOWER 0x1000
|
||||
#define XQSPIPSU_GENFIFO_CS_UPPER 0x2000
|
||||
#define XQSPIPSU_GENFIFO_BUS_LOWER 0x4000
|
||||
#define XQSPIPSU_GENFIFO_BUS_UPPER 0x8000
|
||||
#define XQSPIPSU_GENFIFO_BUS_BOTH 0xC000 /* inverse is no bus */
|
||||
#define XQSPIPSU_GENFIFO_BUS_MASK 0xC000 /* And with ~MASK first */
|
||||
#define XQSPIPSU_GENFIFO_TX 0x10000 /* inverse is zero pump */
|
||||
#define XQSPIPSU_GENFIFO_RX 0x20000 /* inverse is RX discard */
|
||||
#define XQSPIPSU_GENFIFO_STRIPE 0x40000
|
||||
#define XQSPIPSU_GENFIFO_POLL 0x80000
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
#define XQspiPsu_In32 Xil_In32
|
||||
#define XQspiPsu_Out32 Xil_Out32
|
||||
|
||||
/****************************************************************************/
|
||||
/**
|
||||
* Read a register.
|
||||
*
|
||||
* @param BaseAddress contains the base address of the device.
|
||||
* @param RegOffset contains the offset from the 1st register of the
|
||||
* device to the target register.
|
||||
*
|
||||
* @return The value read from the register.
|
||||
*
|
||||
* @note C-Style signature:
|
||||
* u32 XQspiPsu_ReadReg(u32 BaseAddress. int RegOffset)
|
||||
*
|
||||
******************************************************************************/
|
||||
#define XQspiPsu_ReadReg(BaseAddress, RegOffset) XQspiPsu_In32((BaseAddress) + (RegOffset))
|
||||
|
||||
/***************************************************************************/
|
||||
/**
|
||||
* Write to a register.
|
||||
*
|
||||
* @param BaseAddress contains the base address of the device.
|
||||
* @param RegOffset contains the offset from the 1st register of the
|
||||
* device to target register.
|
||||
* @param RegisterValue is the value to be written to the register.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note C-Style signature:
|
||||
* void XQspiPsu_WriteReg(u32 BaseAddress, int RegOffset,
|
||||
* u32 RegisterValue)
|
||||
*
|
||||
******************************************************************************/
|
||||
#define XQspiPsu_WriteReg(BaseAddress, RegOffset, RegisterValue) XQspiPsu_Out32((BaseAddress) + (RegOffset), (RegisterValue))
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _XQSPIPSU_H_ */
|
||||
416
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu_options.c
Normal file
416
XilinxProcessorIPLib/drivers/qspipsu_v1_1/src/xqspipsu_options.c
Normal file
|
|
@ -0,0 +1,416 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xqspipsu_options.c
|
||||
*
|
||||
* This file implements funcitons to configure the QSPIPSU component,
|
||||
* specifically some optional settings, clock and flash related information.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- --- -------- -----------------------------------------------
|
||||
* 1.0 hk 08/21/14 First release
|
||||
* sk 03/13/15 Added IO mode support.
|
||||
*
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xqspipsu.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
|
||||
/*
|
||||
* Create the table of options which are processed to get/set the device
|
||||
* options. These options are table driven to allow easy maintenance and
|
||||
* expansion of the options.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 Option;
|
||||
u32 Mask;
|
||||
} OptionsMap;
|
||||
|
||||
static OptionsMap OptionsTable[] = {
|
||||
{XQSPIPSU_CLK_ACTIVE_LOW_OPTION, XQSPIPSU_CFG_CLK_POL_MASK},
|
||||
{XQSPIPSU_CLK_PHASE_1_OPTION, XQSPIPSU_CFG_CLK_PHA_MASK},
|
||||
{XQSPIPSU_MANUAL_START_OPTION, XQSPIPSU_CFG_GEN_FIFO_START_MODE_MASK},
|
||||
};
|
||||
|
||||
#define XQSPIPSU_NUM_OPTIONS (sizeof(OptionsTable) / sizeof(OptionsMap))
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function sets the options for the QSPIPSU device driver.The options
|
||||
* control how the device behaves relative to the QSPIPSU bus. The device must be
|
||||
* idle rather than busy transferring data before setting these device options.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XQspiPsu instance.
|
||||
* @param Options contains the specified options to be set. This is a bit
|
||||
* mask where a 1 indicates the option should be turned ON and
|
||||
* a 0 indicates no action. One or more bit values may be
|
||||
* contained in the mask. See the bit definitions named
|
||||
* XQSPIPSU_*_OPTIONS in the file xqspipsu.h.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if options are successfully set.
|
||||
* - XST_DEVICE_BUSY if the device is currently transferring data.
|
||||
* The transfer must complete or be aborted before setting options.
|
||||
*
|
||||
* @note
|
||||
* This function is not thread-safe.
|
||||
*
|
||||
******************************************************************************/
|
||||
int XQspiPsu_SetOptions(XQspiPsu *InstancePtr, u32 Options)
|
||||
{
|
||||
u32 ConfigReg;
|
||||
unsigned int Index;
|
||||
u32 QspiPsuOptions;
|
||||
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
/*
|
||||
* Do not allow to modify the Control Register while a transfer is in
|
||||
* progress. Not thread-safe.
|
||||
*/
|
||||
if (InstancePtr->IsBusy) {
|
||||
return XST_DEVICE_BUSY;
|
||||
}
|
||||
|
||||
ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
|
||||
XQSPIPSU_CFG_OFFSET);
|
||||
|
||||
/*
|
||||
* Loop through the options table, turning the option on
|
||||
* depending on whether the bit is set in the incoming options flag.
|
||||
*/
|
||||
for (Index = 0; Index < XQSPIPSU_NUM_OPTIONS; Index++) {
|
||||
if (Options & OptionsTable[Index].Option) {
|
||||
/* Turn it on */
|
||||
ConfigReg |= OptionsTable[Index].Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Now write the control register. Leave it to the upper layers
|
||||
* to restart the device.
|
||||
*/
|
||||
XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
|
||||
ConfigReg);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function resets the options for the QSPIPSU device driver.The options
|
||||
* control how the device behaves relative to the QSPIPSU bus. The device must be
|
||||
* idle rather than busy transferring data before setting these device options.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XQspiPsu instance.
|
||||
* @param Options contains the specified options to be set. This is a bit
|
||||
* mask where a 1 indicates the option should be turned OFF and
|
||||
* a 0 indicates no action. One or more bit values may be
|
||||
* contained in the mask. See the bit definitions named
|
||||
* XQSPIPSU_*_OPTIONS in the file xqspipsu.h.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if options are successfully set.
|
||||
* - XST_DEVICE_BUSY if the device is currently transferring data.
|
||||
* The transfer must complete or be aborted before setting options.
|
||||
*
|
||||
* @note
|
||||
* This function is not thread-safe.
|
||||
*
|
||||
******************************************************************************/
|
||||
int XQspiPsu_ClearOptions(XQspiPsu *InstancePtr, u32 Options)
|
||||
{
|
||||
u32 ConfigReg;
|
||||
unsigned int Index;
|
||||
u32 QspiPsuOptions;
|
||||
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
/*
|
||||
* Do not allow to modify the Control Register while a transfer is in
|
||||
* progress. Not thread-safe.
|
||||
*/
|
||||
if (InstancePtr->IsBusy) {
|
||||
return XST_DEVICE_BUSY;
|
||||
}
|
||||
|
||||
ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
|
||||
XQSPIPSU_CFG_OFFSET);
|
||||
|
||||
/*
|
||||
* Loop through the options table, turning the option on
|
||||
* depending on whether the bit is set in the incoming options flag.
|
||||
*/
|
||||
for (Index = 0; Index < XQSPIPSU_NUM_OPTIONS; Index++) {
|
||||
if (Options & OptionsTable[Index].Option) {
|
||||
/* Turn it off */
|
||||
ConfigReg &= ~OptionsTable[Index].Mask;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Now write the control register. Leave it to the upper layers
|
||||
* to restart the device.
|
||||
*/
|
||||
XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
|
||||
ConfigReg);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function gets the options for the QSPIPSU device. The options control how
|
||||
* the device behaves relative to the QSPIPSU bus.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XQspiPsu instance.
|
||||
*
|
||||
* @return
|
||||
*
|
||||
* Options contains the specified options currently set. This is a bit value
|
||||
* where a 1 means the option is on, and a 0 means the option is off.
|
||||
* See the bit definitions named XQSPIPSU_*_OPTIONS in file xqspipsu.h.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
******************************************************************************/
|
||||
u32 XQspiPsu_GetOptions(XQspiPsu *InstancePtr)
|
||||
{
|
||||
u32 OptionsFlag = 0;
|
||||
u32 ConfigReg;
|
||||
unsigned int Index;
|
||||
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
/*
|
||||
* Get the current options from QSPIPSU configuration register.
|
||||
*/
|
||||
ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
|
||||
XQSPIPSU_CFG_OFFSET);
|
||||
|
||||
/* Loop through the options table to grab options */
|
||||
for (Index = 0; Index < XQSPIPSU_NUM_OPTIONS; Index++) {
|
||||
if (ConfigReg & OptionsTable[Index].Mask) {
|
||||
OptionsFlag |= OptionsTable[Index].Option;
|
||||
}
|
||||
}
|
||||
|
||||
return OptionsFlag;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Configures the clock according to the prescaler passed.
|
||||
*
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XQspiPsu instance.
|
||||
* @param Prescaler - clock prescaler to be set.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if successful.
|
||||
* - XST_DEVICE_IS_STARTED if the device is already started.
|
||||
* It must be stopped to re-initialize.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
******************************************************************************/
|
||||
int XQspiPsu_SetClkPrescaler(XQspiPsu *InstancePtr, u8 Prescaler)
|
||||
{
|
||||
u32 ConfigReg;
|
||||
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertNonvoid(Prescaler <= XQSPIPSU_CR_PRESC_MAXIMUM);
|
||||
|
||||
/*
|
||||
* Do not allow the slave select to change while a transfer is in
|
||||
* progress. Not thread-safe.
|
||||
*/
|
||||
if (InstancePtr->IsBusy) {
|
||||
return XST_DEVICE_BUSY;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read the configuration register, mask out the relevant bits, and set
|
||||
* them with the shifted value passed into the function. Write the
|
||||
* results back to the configuration register.
|
||||
*/
|
||||
ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
|
||||
XQSPIPSU_CFG_OFFSET);
|
||||
|
||||
ConfigReg &= ~XQSPIPSU_CFG_BAUD_RATE_DIV_MASK;
|
||||
ConfigReg |= (u32) (Prescaler & XQSPIPSU_CR_PRESC_MAXIMUM) <<
|
||||
XQSPIPSU_CFG_BAUD_RATE_DIV_SHIFT;
|
||||
|
||||
XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress,
|
||||
XQSPIPSU_CFG_OFFSET, ConfigReg);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This funciton should be used to tell the QSPIPSU driver the HW flash
|
||||
* configuration being used. This API should be called atleast once in the
|
||||
* application. If desired, it can be called multiple times when switching
|
||||
* between communicating to different flahs devices/using different configs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XQspiPsu instance.
|
||||
* @param FlashCS - Flash Chip Select.
|
||||
* @param FlashBus - Flash Bus (Upper, Lower or Both).
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if successful.
|
||||
* - XST_DEVICE_IS_STARTED if the device is already started.
|
||||
* It must be stopped to re-initialize.
|
||||
*
|
||||
* @note If this funciton is not called atleast once in the application,
|
||||
* the driver assumes there is a single flash connected to the
|
||||
* lower bus and CS line.
|
||||
*
|
||||
******************************************************************************/
|
||||
void XQspiPsu_SelectFlash(XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus)
|
||||
{
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
/*
|
||||
* Bus and CS lines selected here will be updated in the instance and
|
||||
* used for subsequent GENFIFO entries during transfer.
|
||||
*/
|
||||
|
||||
/* Choose slave select line */
|
||||
switch (FlashCS) {
|
||||
case XQSPIPSU_SELECT_FLASH_CS_BOTH:
|
||||
InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_LOWER |
|
||||
XQSPIPSU_GENFIFO_CS_UPPER;
|
||||
break;
|
||||
case XQSPIPSU_SELECT_FLASH_CS_UPPER:
|
||||
InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_UPPER;
|
||||
break;
|
||||
case XQSPIPSU_SELECT_FLASH_CS_LOWER:
|
||||
default:
|
||||
InstancePtr->GenFifoCS = XQSPIPSU_GENFIFO_CS_LOWER;
|
||||
}
|
||||
|
||||
/* Choose bus */
|
||||
switch (FlashBus) {
|
||||
case XQSPIPSU_SELECT_FLASH_BUS_BOTH:
|
||||
InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_LOWER |
|
||||
XQSPIPSU_GENFIFO_BUS_UPPER;
|
||||
break;
|
||||
case XQSPIPSU_SELECT_FLASH_BUS_UPPER:
|
||||
InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_UPPER;
|
||||
break;
|
||||
case XQSPIPSU_SELECT_FLASH_BUS_LOWER:
|
||||
default:
|
||||
InstancePtr->GenFifoBus = XQSPIPSU_GENFIFO_BUS_LOWER;
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function sets the Read mode for the QSPIPSU device driver.The device
|
||||
* must be idle rather than busy transferring data before setting Read mode
|
||||
* options.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XQspiPsu instance.
|
||||
* @param Mode contains the specified Mode to be set. See the
|
||||
* bit definitions named XQSPIPSU_READMODE_* in the file xqspipsu.h.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if options are successfully set.
|
||||
* - XST_DEVICE_BUSY if the device is currently transferring data.
|
||||
* The transfer must complete or be aborted before setting Mode.
|
||||
*
|
||||
* @note
|
||||
* This function is not thread-safe.
|
||||
*
|
||||
******************************************************************************/
|
||||
int XQspiPsu_SetReadMode(XQspiPsu *InstancePtr, u32 Mode)
|
||||
{
|
||||
u32 ConfigReg;
|
||||
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
/*
|
||||
* Do not allow to modify the Control Register while a transfer is in
|
||||
* progress. Not thread-safe.
|
||||
*/
|
||||
if (InstancePtr->IsBusy) {
|
||||
return XST_DEVICE_BUSY;
|
||||
}
|
||||
|
||||
InstancePtr->ReadMode = Mode;
|
||||
|
||||
ConfigReg = XQspiPsu_ReadReg(InstancePtr->Config.BaseAddress,
|
||||
XQSPIPSU_CFG_OFFSET);
|
||||
|
||||
if (Mode == XQSPIPSU_READMODE_DMA) {
|
||||
ConfigReg &= ~XQSPIPSU_CFG_MODE_EN_MASK;
|
||||
ConfigReg |= XQSPIPSU_CFG_MODE_EN_DMA_MASK;
|
||||
} else {
|
||||
ConfigReg &= ~XQSPIPSU_CFG_MODE_EN_MASK;
|
||||
}
|
||||
|
||||
XQspiPsu_WriteReg(InstancePtr->Config.BaseAddress, XQSPIPSU_CFG_OFFSET,
|
||||
ConfigReg);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
|
@ -0,0 +1,97 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xqspipsu_sinit.c
|
||||
*
|
||||
* The implementation of the XQspiPsu component's static initialization
|
||||
* functionality.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- --- -------- -----------------------------------------------
|
||||
* 1.0 hk 08/21/14 First release
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
|
||||
#include "xstatus.h"
|
||||
#include "xqspipsu.h"
|
||||
#include "xparameters.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
/************************** Variable Definitions *****************************/
|
||||
|
||||
extern XQspiPsu_Config XQspiPsu_ConfigTable[];
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* Looks up the device configuration based on the unique device ID. A table
|
||||
* contains the configuration info for each device in the system.
|
||||
*
|
||||
* @param DeviceId contains the ID of the device to look up the
|
||||
* configuration for.
|
||||
*
|
||||
* @return
|
||||
*
|
||||
* A pointer to the configuration found or NULL if the specified device ID was
|
||||
* not found. See xqspipsu.h for the definition of XQspiPsu_Config.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
******************************************************************************/
|
||||
XQspiPsu_Config *XQspiPsu_LookupConfig(u16 DeviceId)
|
||||
{
|
||||
XQspiPsu_Config *CfgPtr = NULL;
|
||||
int Index;
|
||||
|
||||
for (Index = 0; Index < XPAR_XQSPIPSU_NUM_INSTANCES; Index++) {
|
||||
if (XQspiPsu_ConfigTable[Index].DeviceId == DeviceId) {
|
||||
CfgPtr = &XQspiPsu_ConfigTable[Index];
|
||||
break;
|
||||
}
|
||||
}
|
||||
return CfgPtr;
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue