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vtc: Modified vtc driver.

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Modified vtc sorce files and example file.
changed offsets in xvtc.h file.

Signed-off-by: Durga challa <vnsldurg@xilinx.com>
This commit is contained in:
Durga challa 2014-08-23 18:47:02 +05:30 • committed by Jagannadha Sutradharudu Teki
parent 4b76b9679b
commit 5050580f79
7 changed files with 957 additions and 1152 deletions
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2
XilinxProcessorIPLib/drivers/vtc/examples/vtc_selftest_example.c
View file

@ -44,7 +44,7 @@
*
* Ver Who Date Changes
* ----- ------ -------- ------------------------------------------------------
* 6.1 adk 03/03/14 First Release.
* 6.1 adk 08/23/14 First Release.
* </pre>
*
******************************************************************************/

1833
XilinxProcessorIPLib/drivers/vtc/src/xvtc.c
View file

File diff suppressed because it is too large Load diff

145
XilinxProcessorIPLib/drivers/vtc/src/xvtc.h
View file

@ -34,23 +34,22 @@
*
* @file xvtc.h
*
* This is the main header file of Xilinx Video Timing Controller (VTC) core.
* The VTC core detects video signals, independently overrides any one
* of them, re-generates video signals with +/- delay and with polarity
* inversion and generates up to 16 one cycle frame sync outputs.
* This is the main header file of Xilinx MVI Video Timing Controller (VTC)
* device driver. The VTC device detects video signals, independently
* overrides any one of them, re-generates video signals with +/- delay and
* with polarity inversion, and generates up to 16 one cycle Frame Sync outputs.
*
* <b>Core Features </b>
* The core has the following main features:
* - Detect video signals:
* The device has the following main features:
* - Detect video signals:
* - horizontal sync
* - horizontal blank
* - vertical sync
* - vertical blank
* - active video
* - field id
* - Independently override any one signal.
* - Re-generate video signals with +/- delay and with polarity inversion.
* - Generate up to 16 one cycle frame sync outputs.
* - Independently override any one signal.
* - Re-generate video signals with +/- delay and with polarity inversion.
* - Generate up to 16 one cycle Frame Sync outputs.
*
* For a full description of VTC features, please see the hardware
* specification.
@ -255,10 +254,33 @@
* XVtc_GetDetectorTiming
* XVtc_GetDetectorVideoMode
* 6.0 adk 19/12/13 Updated as per the New Tcl API's.
* 6.1 adk 03/03/14 Implemented XVtc_SelfTest in
* 6.1 adk 23/08/14 Implemented XVtc_SelfTest in
* xvtc_selftest.c.
* Defined range macro for frame sync register.
* Defined XVTC_FSYNC_NUM_FRAMES.
* Modified prototype of XVtc_GetVersion API.
*
* Modifications from xvtc.c file are:
* Modified HActiveVideo value to 1920 for
* XVTC_VMODE_1080I mode.
* Removed Major, Minor and Revision parameters from
* XVtc_GetVersion.
* Modified return type of XVtc_GetVersion from
* void to u32.
*
* Modifications from xvtc_hw.h file are:
* Removed XVTC_ERR_FIL_MASK macro because it is not
* present in latest product guide.
* Modified register offsets from XVTC_* to XVTC_*_OFFSET
* for consistency.
* Added backward compatibility macros.
*
* Modifications from xvtc_intr.c and xvtc_sinit.c files
* are:
* updated doxygen tags.
*
* Modifications from xvtc_selftest.c file are:
* First Release.
* Implemented following function:
* XVtc_SelfTest.
* </pre>
*
******************************************************************************/
@ -295,17 +317,18 @@ extern "C" {
/*@}*/
/** @name Options for enabling VTC modules
* @{
*/
* @{
*/
#define XVTC_EN_GENERATOR 1 /**< To enable generator */
#define XVTC_EN_DETECTOR 2 /**< To enable detector */
/*@}*/
/** @name Address gap between two register next to each other
* @{
*/
* @{
*/
#define XVTC_REG_ADDRGAP 4 /**< Register address gap */
#define XVTC_VMODE_720P 1 /**< Video mode 720P */
#define XVTC_VMODE_1080P 2 /**< Video mode 1080P */
#define XVTC_VMODE_480P 3 /**< Video mode 480P */
@ -321,25 +344,12 @@ extern "C" {
#define XVTC_VMODE_PAL 102 /**< Video mode PAL */
/*@}*/
/** @name Frame Sync range macros
* @{
*/
#define XVTC_FSYNC_FIRST 0 /**< Frame Sync starting value */
#define XVTC_FSYNC_LAST 4095 /**< Frame Sync ending value */
/*@}*/
/** @name Number of FSYNC frames
* @{
*/
#define XVTC_FSYNC_NUM_FRAMES 15 /**< Total number of FSYNC frames. */
/*@}*/
/**************************** Type Definitions *******************************/
/**
* This typedef contains configuration information for the VTC core.
* Each VTC device should have a configuration structure associated.
*/
* This typedef contains configuration information for a VTC core.
* Each VTC device should have a configuration structure associated
*/
typedef struct {
u16 DeviceId; /**< DeviceId is the unique ID of the VTC
* core */
@ -348,8 +358,8 @@ typedef struct {
} XVtc_Config;
/**
* This typedef contains polarity configuration information for the VTC core.
*/
* This typedef contains Polarity configuration information for a VTC core.
*/
typedef struct {
u8 ActiveChromaPol; /**< Active Chroma Output Polarity */
u8 ActiveVideoPol; /**< Active Video Output Polarity */
@ -362,9 +372,9 @@ typedef struct {
} XVtc_Polarity;
/**
* This typedef contains source selection configuration information for the
* VTC core.
*/
* This typedef contains Source Selection configuration information for a
* VTC core.
*/
typedef struct {
u8 FieldIdPolSrc; /**< Field ID Output Polarity Source */
u8 ActiveChromaPolSrc; /**< Active Chroma Output Polarity Source */
@ -394,12 +404,13 @@ typedef struct {
u8 HFrontPorchSrc; /**< Horizontal Front Porch Start Register
* Source Select */
u8 HTotalSrc; /**< Horizontal Total Register Source Select */
} XVtc_SourceSelect;
/**
* This typedef contains the VTC signal configuration used by the
* Generator/Detector modules in the VTC core.
*/
* This typedef contains the VTC signal configuration used by the
* Generator/Detector modules in a VTC device.
*/
typedef struct {
u16 OriginMode; /**< Origin Mode */
u16 HTotal; /**< Horizontal total clock cycles per Line */
@ -436,9 +447,9 @@ typedef struct {
} XVtc_Signal;
/**
* This typedef contains Detector/Generator VBlank/VSync Horizontal Offset
* configuration information for a VTC core.
*/
* This typedef contains Detector/Generator VBlank/VSync Horizontal Offset
* configuration information for a VTC device.
*/
typedef struct {
u16 V0BlankHoriStart; /**< Vertical Blank Hori Offset Start
* (field 0) */
@ -522,9 +533,9 @@ typedef void (*XVtc_CallBack)(void *CallBackRef, u32 Mask);
typedef void (*XVtc_ErrorCallBack)(void *CallBackRef, u32 ErrorMask);
/**
* The XVtc driver instance data. An instance must be allocated for each
* VTC core in use.
*/
* The XVtc driver instance data. An instance must be allocated for each
* VTC core in use.
*/
typedef struct {
XVtc_Config Config; /**< Hardware Configuration */
u32 IsReady; /**< Core and the driver instance are
@ -784,7 +795,7 @@ typedef struct {
*
******************************************************************************/
#define XVtc_StatusGetPending(InstancePtr) \
XVtc_ReadReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET)) & \
XVtc_ReadReg((InstancePtr)->Config.BaseAddress, (XVTC_ISR_OFFSET)) & \
(XVTC_IXR_ALLINTR_MASK)
/*****************************************************************************/
@ -807,9 +818,9 @@ typedef struct {
*
******************************************************************************/
#define XVtc_IntrGetPending(InstancePtr) \
XVtc_ReadReg((InstancePtr)->Config.BaseAddress, (XVTC_IER_OFFSET)) & \
(XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \
(XVTC_CTL_OFFSET)) & (XVTC_IXR_ALLINTR_MASK))
(XVtc_ReadReg((InstancePtr)->Config.BaseAddress, XVTC_IER_OFFSET) & \
XVtc_ReadReg((InstancePtr)->Config.BaseAddress, XVTC_ISR_OFFSET) & \
XVTC_IXR_ALLINTR_MASK)
/*****************************************************************************/
/**
@ -830,7 +841,7 @@ typedef struct {
*
******************************************************************************/
#define XVtc_IntrClear(InstancePtr, IntrType) \
XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \
XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_ISR_OFFSET), \
((IntrType) & (XVTC_IXR_ALLINTR_MASK)))
/*****************************************************************************/
@ -881,9 +892,9 @@ u16 XVtc_ConvTiming2VideoMode(XVtc *InstancePtr, XVtc_Timing *TimingPtr);
void XVtc_SetGeneratorTiming(XVtc *InstancePtr, XVtc_Timing * TimingPtr);
void XVtc_SetGeneratorVideoMode(XVtc *InstancePtr, u16 Mode);
void XVtc_GetGeneratorTiming(XVtc *InstancePtr, XVtc_Timing *TimingPtr);
u16 XVtc_GetGeneratorVideoMode(XVtc *InstancePtr);
u16 XVtc_GetGeneratorVideoMode(XVtc *InstancePtr);
void XVtc_GetDetectorTiming(XVtc *InstancePtr, XVtc_Timing *TimingPtr);
u16 XVtc_GetDetectorVideoMode(XVtc *InstancePtr);
u16 XVtc_GetDetectorVideoMode(XVtc *InstancePtr);
/* Polarity setting */
void XVtc_SetPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr);
@ -906,22 +917,22 @@ void XVtc_GetGenerator(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr);
void XVtc_GetDetector(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr);
/* Delay setting */
void XVtc_SetDelay(XVtc *InstancePtr, u32 VertDelay, u32 HoriDelay);
void XVtc_GetDelay(XVtc *InstancePtr, u32 *VertDelayPtr, u32 *HoriDelayPtr);
void XVtc_SetDelay(XVtc *InstancePtr, int VertDelay, int HoriDelay);
void XVtc_GetDelay(XVtc *InstancePtr, int *VertDelayPtr, int *HoriDelayPtr);
/* Frame Sync setting */
void XVtc_SetFSync(XVtc *InstancePtr, u16 FrameSyncIndex,u16 VertStart,
u16 HoriStart);
void XVtc_GetFSync(XVtc *InstancePtr, u16 FrameSyncIndex, u16 *VertStartPtr,
u16 *HoriStartPtr);
void XVtc_SetFSync(XVtc *InstancePtr, u16 FrameSyncIndex,
u16 VertStart, u16 HoriStart);
void XVtc_GetFSync(XVtc *InstancePtr, u16 FrameSyncIndex,
u16 *VertStartPtr, u16 *HoriStartPtr);
/* Horizontal Offset Setting */
void XVtc_SetGeneratorHoriOffset(XVtc *InstancePtr,
XVtc_HoriOffsets *HoriOffsets);
XVtc_HoriOffsets *HoriOffset);
void XVtc_GetGeneratorHoriOffset(XVtc *InstancePtr,
XVtc_HoriOffsets *HoriOffsets);
XVtc_HoriOffsets *HoriOffset);
void XVtc_GetDetectorHoriOffset(XVtc *InstancePtr,
XVtc_HoriOffsets *HoriOffsets);
XVtc_HoriOffsets *HoriOffset);
/* Version function */
u32 XVtc_GetVersion(XVtc *InstancePtr);
@ -929,10 +940,12 @@ u32 XVtc_GetVersion(XVtc *InstancePtr);
/* Initialization functions in xvtc_sinit.c */
XVtc_Config *XVtc_LookupConfig(u16 DeviceId);
/* Interrupt related functions in xvtc_intr.c */
/*
* Interrupt related function(s) in xvtc_intr.c
*/
void XVtc_IntrHandler(void *InstancePtr);
int XVtc_SetCallBack(XVtc *InstancePtr, u32 HandlerType, void *CallBackFunc,
void *CallBackRef);
int XVtc_SetCallBack(XVtc *InstancePtr, u32 IntrType,
void *CallBackFunc, void *CallBackRef);
/* SelfTest related function in xvtc_selftest.c */
int XVtc_SelfTest(XVtc *InstancePtr);

17
XilinxProcessorIPLib/drivers/vtc/src/xvtc_hw.h
View file

@ -141,7 +141,7 @@
* 5.00a cjm 11/03/13 Added Chroma/field parity bit masks.
* Replaced old timing bit masks/shifts with Start/End Bit
* masks/shifts.
* 6.1 adk 03/03/14 Removed XVTC_ERR_FIL_MASK macro because it is not
* 6.1 adk 08/23/14 Removed XVTC_ERR_FIL_MASK macro because it is not
* present in latest product guide.
* Modified register offsets from XVTC_* to XVTC_*_OFFSET
* for consistency.
@ -312,14 +312,13 @@ extern "C" {
* Mask */
#define XVTC_CTL_ALLSS_MASK 0x03F5EF00 /**< Bit mask for all source
* select Mask */
#define XVTC_CTL_SE_MASK 0x00000020 /**< Enable Sync with Detector
* Mask */
#define XVTC_CTL_DE_MASK 0x00000008 /**< VTC Detector Enable Mask */
#define XVTC_CTL_GE_MASK 0x00000004 /**< VTC Generator Enable Mask */
#define XVTC_CTL_RU_MASK 0x00000002 /**< VTC Register Update Mask */
#define XVTC_CTL_SW_MASK 0x00000001 /**< VTC Core Enable Mask */
* select Mask */
//#define XVTC_CTL_LP_MASK 0x00000008 /**< Lock Polarity */
#define XVTC_CTL_SE_MASK 0x00000020 /**< Enable Sync with Detector */
#define XVTC_CTL_DE_MASK 0x00000008 /**< VTC Detector Enable */
#define XVTC_CTL_GE_MASK 0x00000004 /**< VTC Generator Enable */
#define XVTC_CTL_RU_MASK 0x00000002 /**< VTC Register Update */
#define XVTC_CTL_SW_MASK 0x00000001 /**< VTC Core Enable */
/*@}*/
/** @name Interrupt Status/Enable Register Bit Definitions

91
XilinxProcessorIPLib/drivers/vtc/src/xvtc_intr.c
View file

@ -116,7 +116,7 @@
* "Xboolean" -> "int"
* "XTEST_FAILED" -> "XST_FAILURE"
* "XTEST_PASSED" -> "XST_SUCCESS"
* 6.1 adk 03/03/14 Version change as per SDK 2014.2.
* 6.1 adk 08/23/14 Alligned doxygen tags.
* </pre>
*
******************************************************************************/
@ -168,11 +168,11 @@ void XVtc_IntrHandler(void *InstancePtr)
{
u32 PendingIntr;
u32 ErrorStatus;
XVtc *XVtcPtr = (XVtc *)((void *)InstancePtr);
XVtc *XVtcPtr = (XVtc *) InstancePtr;
/* Verify arguments. */
Xil_AssertVoid(XVtcPtr != NULL);
Xil_AssertVoid(XVtcPtr->IsReady == (u32)(XIL_COMPONENT_IS_READY));
Xil_AssertVoid(XVtcPtr->IsReady == XIL_COMPONENT_IS_READY);
/* Get pending interrupts */
PendingIntr = XVtc_IntrGetPending(XVtcPtr);
@ -181,8 +181,8 @@ void XVtc_IntrHandler(void *InstancePtr)
XVtc_IntrClear(XVtcPtr, PendingIntr);
/* Spurious interrupt has happened */
if ((u32)0x0 == (PendingIntr | (XVTC_IXR_ALLINTR_MASK))) {
ErrorStatus = (u32)0x0;
if (0 == (PendingIntr | XVTC_IXR_ALLINTR_MASK)) {
ErrorStatus = 0;
XVtcPtr->ErrCallBack(XVtcPtr->ErrRef, ErrorStatus);
return;
}
@ -218,11 +218,11 @@ void XVtc_IntrHandler(void *InstancePtr)
* <pre>
* HandlerType Callback Function Type
* ----------------------- --------------------------------------------------
* (XVTC_HANDLER_FRAMESYNC) XVtc_FrameSyncCallBack
* (XVTC_HANDLER_LOCK) XVtc_LockCallBack
* (XVTC_HANDLER_DETECTOR) XVtc_DetectorCallBack
* (XVTC_HANDLER_GENERATOR) XVtc_GeneratorCallBack
* (XVTC_HANDLER_ERROR) XVtc_ErrCallBack
* XVTC_HANDLER_FRAMESYNC XVtc_FrameSyncCallBack
* XVTC_HANDLER_LOCK XVtc_LockCallBack
* XVTC_HANDLER_DETECTOR XVtc_DetectorCallBack
* XVTC_HANDLER_GENERATOR XVtc_GeneratorCallBack
* XVTC_HANDLER_ERROR XVtc_ErrCallBack
*
* HandlerType Invoked by this driver when:
* ----------------------- --------------------------------------------------
@ -251,58 +251,45 @@ void XVtc_IntrHandler(void *InstancePtr)
int XVtc_SetCallBack(XVtc *InstancePtr, u32 HandlerType,
void *CallBackFunc, void *CallBackRef)
{
int Status;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady ==
(u32)(XIL_COMPONENT_IS_READY));
Xil_AssertNonvoid((HandlerType >=(XVTC_HANDLER_FRAMESYNC)) &&
(HandlerType <= (XVTC_HANDLER_ERROR)));
Xil_AssertNonvoid(CallBackFunc != NULL);
Xil_AssertNonvoid(CallBackRef != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/* For specific handler type assigning callback function reference */
switch (HandlerType) {
case (XVTC_HANDLER_FRAMESYNC):
InstancePtr->FrameSyncCallBack =
(XVtc_CallBack)((void *)CallBackFunc);
InstancePtr->FrameSyncRef = CallBackRef;
Status = (XST_SUCCESS);
break;
case XVTC_HANDLER_FRAMESYNC:
InstancePtr->FrameSyncCallBack =
(XVtc_CallBack) CallBackFunc;
InstancePtr->FrameSyncRef = CallBackRef;
break;
case (XVTC_HANDLER_LOCK):
InstancePtr->LockCallBack =
(XVtc_CallBack)((void *)CallBackFunc);
InstancePtr->LockRef = CallBackRef;
Status = (XST_SUCCESS);
break;
case XVTC_HANDLER_LOCK:
InstancePtr->LockCallBack = (XVtc_CallBack) CallBackFunc;
InstancePtr->LockRef = CallBackRef;
break;
case (XVTC_HANDLER_DETECTOR):
InstancePtr->DetectorCallBack =
(XVtc_CallBack)((void *)CallBackFunc);
InstancePtr->DetectorRef = CallBackRef;
Status = (XST_SUCCESS);
break;
case XVTC_HANDLER_DETECTOR:
InstancePtr->DetectorCallBack =
(XVtc_CallBack) CallBackFunc;
InstancePtr->DetectorRef = CallBackRef;
break;
case (XVTC_HANDLER_GENERATOR):
InstancePtr->GeneratorCallBack =
(XVtc_CallBack)((void *)CallBackFunc);
InstancePtr->GeneratorRef = CallBackRef;
Status = (XST_SUCCESS);
break;
case XVTC_HANDLER_GENERATOR:
InstancePtr->GeneratorCallBack =
(XVtc_CallBack) CallBackFunc;
InstancePtr->GeneratorRef = CallBackRef;
break;
case (XVTC_HANDLER_ERROR):
InstancePtr->ErrCallBack =
(XVtc_ErrorCallBack)((void *)CallBackFunc);
InstancePtr->ErrRef = CallBackRef;
Status = (XST_SUCCESS);
break;
case XVTC_HANDLER_ERROR:
InstancePtr->ErrCallBack =
(XVtc_ErrorCallBack) CallBackFunc;
InstancePtr->ErrRef = CallBackRef;
break;
default:
return XST_INVALID_PARAM;
default:
Status = (XST_INVALID_PARAM);
break;
}
return Status;
return XST_SUCCESS;
}

5
XilinxProcessorIPLib/drivers/vtc/src/xvtc_selftest.c
View file

@ -42,7 +42,7 @@
*
* Ver Who Date Changes
* ----- ------ -------- --------------------------------------------------
* 6.1 adk 03/03/14 First Release.
* 6.1 adk 08/23/14 First Release.
* Implemented following function:
* XVtc_SelfTest.
* </pre>
@ -78,7 +78,8 @@
*
* @param InstancePtr is a pointer to the XVtc instance.
*
* @return - XST_SUCCESS if the Version register read test was successful.
* @return
* - XST_SUCCESS if the Version register read test was successful.
* - XST_FAILURE if the Version register read test failed.
*
* @note None.

16
XilinxProcessorIPLib/drivers/vtc/src/xvtc_sinit.c
View file

@ -50,7 +50,7 @@
* assertions to xil_io format.
* Replaced the following:
* "Xuint16" -> "u16".
* 6.1 adk 03/03/14 Version change as per SDK 2014.2.
* 6.1 adk 08/23/14 updated doxygen tags.
* </pre>
*
******************************************************************************/
@ -96,22 +96,20 @@
******************************************************************************/
XVtc_Config *XVtc_LookupConfig(u16 DeviceId)
{
extern XVtc_Config XVtc_ConfigTable[XPAR_XVTC_NUM_INSTANCES];
extern XVtc_Config XVtc_ConfigTable[];
XVtc_Config *CfgPtr = NULL;
u32 Index;
int i;
/* Checking for device id for which instance it is matching */
for (Index = (u32)0x0; Index < (u32)(XPAR_XVTC_NUM_INSTANCES);
Index++) {
for (i = 0; i < XPAR_XVTC_NUM_INSTANCES; i++) {
/* Assigning address of config table if both device ids
* are matched
*/
if (XVtc_ConfigTable[Index].DeviceId == DeviceId) {
CfgPtr = &XVtc_ConfigTable[Index];
if (XVtc_ConfigTable[i].DeviceId == DeviceId) {
CfgPtr = &XVtc_ConfigTable[i];
break;
}
}
return (XVtc_Config *)CfgPtr;
return CfgPtr;
}