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qspipsu_v1_1: Modified the ByteCount requested for ReadId.

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This patch modifies the byte count requested for ReadId and
Flash Status.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This commit is contained in:
P L Sai Krishna 2015-05-08 17:47:36 +05:30 • committed by Nava kishore Manne
parent 0eeddf5269
commit 5c1e76fb33
2 changed files with 56 additions and 56 deletions
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52
XilinxProcessorIPLib/drivers/qspipsu_v1_1/examples/xqspipsu_generic_flash_interrupt_example.c
View file

@ -313,7 +313,7 @@ static void QspiPsuDisableIntrSystem(XScuGic *IntcInstancePtr, u16 QspiPsuIntrId
void QspiPsuHandler(void *CallBackRef, u32 StatusEvent, unsigned int ByteCount);
/************************** Variable Definitions *****************************/
u8 TxBfrPtr;
u8 ReadBfrPtr[4];
u8 ReadBfrPtr[3];
FlashInfo Flash_Config_Table[24] = {
/* Spansion */
{0x10000, 0x100, 256, 0x10000, 0x1000000,
@ -682,7 +682,7 @@ int FlashReadID(XQspiPsu *QspiPsuPtr)
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = ReadBfrPtr;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 3;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
@ -831,7 +831,7 @@ int FlashWrite(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
u8 WriteCmd[5];
u32 RealAddr;
u32 CmdByteCount;
@ -922,7 +922,7 @@ int FlashWrite(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -938,18 +938,18 @@ int FlashWrite(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -979,7 +979,7 @@ int FlashErase(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 *WriteBfrPtr
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Sector;
u32 RealAddr;
u32 NumSect;
@ -1132,7 +1132,7 @@ int FlashErase(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 *WriteBfrPtr
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -1148,18 +1148,18 @@ int FlashErase(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 *WriteBfrPtr
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -1298,7 +1298,7 @@ int BulkErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Status;
WriteEnableCmd = WRITE_ENABLE_CMD;
@ -1348,7 +1348,7 @@ int BulkErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -1364,18 +1364,18 @@ int BulkErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -1403,7 +1403,7 @@ int DieErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
u8 WriteEnableCmd;
u8 DieCnt;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Status;
WriteEnableCmd = WRITE_ENABLE_CMD;
@ -1459,7 +1459,7 @@ int DieErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -1475,18 +1475,18 @@ int DieErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}

60
XilinxProcessorIPLib/drivers/qspipsu_v1_1/examples/xqspipsu_generic_flash_polled_example.c
View file

@ -309,7 +309,7 @@ int FlashRegisterWrite(XQspiPsu *QspiPsuPtr, u32 ByteCount, u8 Command,
u8 *WriteBfrPtr, u8 WrEn);
/************************** Variable Definitions *****************************/
u8 TxBfrPtr;
u8 ReadBfrPtr[4];
u8 ReadBfrPtr[3];
FlashInfo Flash_Config_Table[24] = {
/* Spansion */
{0x10000, 0x100, 256, 0x10000, 0x1000000,
@ -617,7 +617,7 @@ int FlashReadID(XQspiPsu *QspiPsuPtr)
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = ReadBfrPtr;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 3;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
@ -764,7 +764,7 @@ int FlashWrite(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
u8 WriteCmd[5];
u32 RealAddr;
u32 CmdByteCount;
@ -847,7 +847,7 @@ int FlashWrite(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -861,18 +861,18 @@ int FlashWrite(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command,
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -903,7 +903,7 @@ int FlashErase(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount,
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Sector;
u32 RealAddr;
u32 NumSect;
@ -1052,7 +1052,7 @@ int FlashErase(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount,
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -1066,18 +1066,18 @@ int FlashErase(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount,
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -1217,7 +1217,7 @@ int FlashRegisterWrite(XQspiPsu *QspiPsuPtr, u32 ByteCount, u8 Command,
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Status;
if(WrEn) {
@ -1270,7 +1270,7 @@ int FlashRegisterWrite(XQspiPsu *QspiPsuPtr, u32 ByteCount, u8 Command,
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
@ -1280,11 +1280,11 @@ int FlashRegisterWrite(XQspiPsu *QspiPsuPtr, u32 ByteCount, u8 Command,
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -1353,7 +1353,7 @@ int BulkErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
{
u8 WriteEnableCmd;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Status;
WriteEnableCmd = WRITE_ENABLE_CMD;
@ -1399,7 +1399,7 @@ int BulkErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -1413,18 +1413,18 @@ int BulkErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
}
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}
@ -1452,7 +1452,7 @@ int DieErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
u8 WriteEnableCmd;
u8 DieCnt;
u8 ReadStatusCmd;
u8 FlashStatus[4];
u8 FlashStatus[2];
int Status;
WriteEnableCmd = WRITE_ENABLE_CMD;
@ -1504,7 +1504,7 @@ int DieErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = FlashStatus;
FlashMsg[1].ByteCount = 4;
FlashMsg[1].ByteCount = 2;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].Flags = 0;
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
@ -1517,18 +1517,18 @@ int DieErase(XQspiPsu *QspiPsuPtr, u8 *WriteBfrPtr)
}
if(QspiPsuPtr->Config.ConnectionMode == XQSPIPSU_CONNECTION_MODE_PARALLEL){
if(FSRFlag) {
FlashStatus[3] &= FlashStatus[2];
FlashStatus[1] &= FlashStatus[0];
} else {
FlashStatus[3] |= FlashStatus[2];
FlashStatus[1] |= FlashStatus[0];
}
}
if(FSRFlag) {
if ((FlashStatus[3] & 0x80) != 0) {
if ((FlashStatus[1] & 0x80) != 0) {
break;
}
} else {
if ((FlashStatus[3] & 0x01) == 0) {
if ((FlashStatus[1] & 0x01) == 0) {
break;
}
}