stv0g/embeddedsw
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

video_common: edid: Fixed some lines that were exceeding 80 chars in length.

Browse source 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-01-21 13:17:33 -08:00 • committed by Nava kishore Manne
parent 43297b0ef2
commit 5f8da8a650
2 changed files with 16 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
XilinxProcessorIPLib/drivers/video_common/examples/xvidc_edid_print_example.c
View file

@ -70,8 +70,10 @@ void Edid_PrintSuppVmTable(u8 *EdidRaw)
xil_printf("Supported resolutions from video mode table:\n");
for (Index = 0; Index < XVIDC_VM_NUM_SUPPORTED; Index++) {
if (XVidC_EdidIsVideoTimingSupported(EdidRaw,
&XVidC_VideoTimingModes[Index]) == XST_SUCCESS) {
xil_printf("\t%s\n", XVidC_VideoTimingModes[Index].Name);
&XVidC_VideoTimingModes[Index]) ==
XST_SUCCESS) {
xil_printf("\t%s\n",
XVidC_VideoTimingModes[Index].Name);
}
}
}
@ -542,8 +544,8 @@ static void Edid_PrintPtm(u8 *EdidRaw)
"\tVertical sync width:\t%d px\n"
"\tVertical back porch:\t%d px\n"
"\tVertical blanking:\t%d px\n"
"\tVertical polarity:\t%d\n"
, HActive, VActive, PixelClkKhz,
"\tVertical polarity:\t%d\n",
HActive, VActive, PixelClkKhz,
HFrontPorch, HSyncWidth, HBackPorch, HBlank, HPolarity,
VFrontPorch, VSyncWidth, VBackPorch, VBlank, VPolarity);

15
XilinxProcessorIPLib/drivers/video_common/src/xvidc_edid.h
View file

@ -298,15 +298,20 @@
((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_SLS_MASK) >> \
XVIDC_EDID_BDISP_VID_ANA_SLS_SHIFT)
#define XVidC_EdidGetAnalogSigVidSetup(E) \
((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK) != 0)
((E[XVIDC_EDID_BDISP_VID] & \
XVIDC_EDID_BDISP_VID_ANA_VID_SETUP_MASK) != 0)
#define XVidC_EdidSuppAnalogSigSepSyncHv(E) \
((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK) != 0)
((E[XVIDC_EDID_BDISP_VID] & \
XVIDC_EDID_BDISP_VID_ANA_SEP_SYNC_HV_MASK) != 0)
#define XVidC_EdidSuppAnalogSigCompSyncH(E) \
((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK) != 0)
((E[XVIDC_EDID_BDISP_VID] & \
XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_H_MASK) != 0)
#define XVidC_EdidSuppAnalogSigCompSyncG(E) \
((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK) != 0)
((E[XVIDC_EDID_BDISP_VID] & \
XVIDC_EDID_BDISP_VID_ANA_COMP_SYNC_G_MASK) != 0)
#define XVidC_EdidSuppAnalogSigSerrVsync(E) \
((E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK) != 0)
((E[XVIDC_EDID_BDISP_VID] & \
XVIDC_EDID_BDISP_VID_ANA_SERR_V_SYNC_MASK) != 0)
/* XVidC_ColorDepth XVidC_EdidGetColorDepth(u8 *EdidRaw); */
#define XVidC_EdidGetDigitalSigIfaceStd(E) \
(E[XVIDC_EDID_BDISP_VID] & XVIDC_EDID_BDISP_VID_DIG_VIS_MASK)