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v_vcresampler: Program coefficients only if sampler type is FIR

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Added enumeration for supported resampling algorithms.
Coefficients needs to be programmed only for FIR mode. Bounded
coefficient programmin API with required condition.
Updated debug API to report resampler type and associated
coefficients

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This commit is contained in:
Rohit Consul 2015-08-20 14:04:05 -07:00 • committed by Nava kishore Manne
parent e09c164171
commit 61d8e9d282
3 changed files with 81 additions and 21 deletions
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16
XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_coeff.c
View file

@ -59,8 +59,8 @@ const short XV_vcrsmplrcoeff_taps4[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_
{ 0, 0, 0, 0}
},
//420->422
{{ 0, 4096, 0, 0},
{ 506, 1542, 1542, 506}
{{ 506, 1542, 1542, 506},
{ 0, 4096, 0, 0}
}
};
@ -72,8 +72,8 @@ const short XV_vcrsmplrcoeff_taps6[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_
{ 0, 0, 0, 0, 0, 0}
},
//420->422
{{ 0, 0, 4096, 0, 0, 0},
{-327, 792, 1583, 1583, 792, -327}
{{-327, 792, 1583, 1583, 792, -327},
{ 0, 0, 4096, 0, 0, 0}
}
};
@ -85,8 +85,8 @@ const short XV_vcrsmplrcoeff_taps8[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_
{ 0, 0, 0, 0, 0, 0, 0, 0}
},
//420->422
{{ 0, 0, 0, 4096, 0, 0, 0, 0},
{-423, -903, 977, 2397, 2397, 977, -903, -423}
{{-423, -903, 977, 2397, 2397, 977, -903, -423},
{ 0, 0, 0, 4096, 0, 0, 0, 0}
}
};
@ -98,7 +98,7 @@ const short XV_vcrsmplrcoeff_taps10[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
},
//420->422
{{ 0, 0, 0, 0, 4096, 0, 0, 0, 0, 0},
{ 305, -638, -586, 705, 2262, 2262, 705, -586, -638, 305}
{{ 305, -638, -586, 705, 2262, 2262, 705, -586, -638, 305},
{ 0, 0, 0, 0, 4096, 0, 0, 0, 0, 0}
}
};

76
XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c
View file

@ -213,7 +213,7 @@ void XV_VCrsmplrLoadUsrCoeff(XV_vcresampler *InstancePtr,
{
for (tap = 0; tap < num_taps; ++tap)
{
index = (conversion*XV_VCRSMPLR_MAX_PHASES*num_taps) + (phase*num_taps) + tap;
index = (conversion*XV_VCRSMPLR_MAX_PHASES*num_taps) + (phase*num_taps) + tap;
pVcrsmplL2Data->coeff[conversion][phase][tap+offset] = Coeff[index];
}
}
@ -292,19 +292,21 @@ void XV_VCrsmplSetFormat(XV_vcresampler *InstancePtr,
XV_vcresampler_Set_HwReg_input_video_format(InstancePtr, formatIn);
XV_vcresampler_Set_HwReg_output_video_format(InstancePtr, formatOut);
if((formatIn == XVIDC_CSF_YCRCB_420) &&
(formatOut == XVIDC_CSF_YCRCB_422))
if(InstancePtr->Config.ResamplingType == XV_VCRSMPLR_TYPE_FIR)
{
convType = XV_VCRSMPLR_420_TO_422;
}
else if((formatIn == XVIDC_CSF_YCRCB_422) &&
(formatOut == XVIDC_CSF_YCRCB_420))
if((formatIn == XVIDC_CSF_YCRCB_420) &&
(formatOut == XVIDC_CSF_YCRCB_422))
{
convType = XV_VCRSMPLR_420_TO_422;
}
else if((formatIn == XVIDC_CSF_YCRCB_422) &&
(formatOut == XVIDC_CSF_YCRCB_420))
{
convType = XV_VCRSMPLR_422_TO_420;
}
{
convType = XV_VCRSMPLR_422_TO_420;
XV_vcresampler_SetCoefficients(InstancePtr, pVcrsmplL2Data, convType);
}
XV_vcresampler_SetCoefficients(InstancePtr, pVcrsmplL2Data, convType);
}
/*****************************************************************************/
@ -360,6 +362,8 @@ void XV_VCrsmplDbgReportStatus(XV_vcresampler *InstancePtr)
XV_vcresampler *pVCrsmplr = InstancePtr;
u32 done, idle, ready, ctrl;
u32 vidfmtIn, vidfmtOut, height, width;
u32 baseAddr, convType;
const char *RsmplrTypeStr[] = {"Nearest Neighbor", "Fixed Coeff", "FIR"};
/*
* Assert validates the input arguments
@ -378,14 +382,60 @@ void XV_VCrsmplDbgReportStatus(XV_vcresampler *InstancePtr)
height = XV_vcresampler_Get_HwReg_height(pVCrsmplr);
width = XV_vcresampler_Get_HwReg_width(pVCrsmplr);
convType = XV_VCRSMPLR_420_TO_422;
if((vidfmtIn == XVIDC_CSF_YCRCB_420) &&
(vidfmtOut == XVIDC_CSF_YCRCB_422))
{
convType = XV_VCRSMPLR_420_TO_422;
}
else if((vidfmtIn == XVIDC_CSF_YCRCB_422) &&
(vidfmtOut == XVIDC_CSF_YCRCB_420))
{
convType = XV_VCRSMPLR_422_TO_420;
}
xil_printf("IsDone: %d\r\n", done);
xil_printf("IsIdle: %d\r\n", idle);
xil_printf("IsReady: %d\r\n", ready);
xil_printf("Ctrl: 0x%x\r\n\r\n", ctrl);
xil_printf("Video Format In: %d\r\n", vidfmtIn);
xil_printf("Video Format Out: %d\r\n", vidfmtOut);
if(pVCrsmplr->Config.ResamplingType <= XV_VCRSMPLR_TYPE_FIR)
{
xil_printf("Resampling Type: %s\r\n", RsmplrTypeStr[pVCrsmplr->Config.ResamplingType]);
}
else
{
xil_printf("Resampling Type: Unknown\r\n");
}
xil_printf("Video Format In: %s\r\n", XVidC_GetColorFormatStr(vidfmtIn));
xil_printf("Video Format Out: %s\r\n", XVidC_GetColorFormatStr(vidfmtOut));
xil_printf("Width: %d\r\n", width);
xil_printf("Height: %d\r\n", height);
if(pVCrsmplr->Config.ResamplingType == XV_VCRSMPLR_TYPE_FIR)
{
u32 numTaps, tap, phase, regcount;
u32 coeff;
numTaps = pVCrsmplr->Config.NumTaps;
xil_printf("Num Taps: %d\r\n", numTaps);
xil_printf("\r\nCoefficients:");
regcount = 0;
baseAddr = XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_0_DATA;
baseAddr += pVCrsmplr->Config.BaseAddress;
for(phase=0; phase < XV_VCRSMPLR_MAX_PHASES; ++phase)
{
xil_printf("\r\nPhase %2d: ", phase);
for(tap=0; tap < numTaps; ++tap)
{
coeff = Xil_In32((baseAddr+(regcount*8)));
xil_printf("%4d ",coeff);
++regcount;
}
}
}
}
/** @} */

10
XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h
View file

@ -137,6 +137,16 @@ extern "C" {
XV_VCRSMPLR_NUM_CONVERSIONS
}XV_VCRESAMPLER_CONVERSION;
/** This typedef enumerates the resampling algorithm
*
*/
typedef enum
{
XV_VCRSMPLR_TYPE_NEAREST_NEIGHBOR = 0,
XV_VCRSMPLR_TYPE_FIXED_COEFFICIENT,
XV_VCRSMPLR_TYPE_FIR
}XV_VCRESAMPLER_TYPE;
/**
* V Chroma Resampler Layer 2 data. The user is required to allocate a
* variable of this type for every V chroma resampler device in the system.