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xilskey: Provided conditional compilation

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To support Zynq MP platform conditional compilation
is provided.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
This commit is contained in:
VNSL Durga 2015-10-10 16:23:37 +05:30 • committed by Nava kishore Manne
parent f8ed126215
commit 66a63c151b
4 changed files with 43 additions and 15 deletions
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15
lib/sw_services/xilskey/src/include/xilskey_utils.h
View file

@ -51,6 +51,9 @@
* XSK_EFUSEPS_RSA_KEY_HASH_STRING_SIZE to
* XSK_EFUSEPL_RSA_KEY_HASH_STRING_SIZE
* Added efuse functionality for Ultrascale.
* 4.0 vns 10/01/15 Added efuse functionality for ZynqMp platform.
* Added Xsk_Ceil API. Added error code for efuse and
* bbram PS for Zynq MP.
*
*****************************************************************************/
@ -62,8 +65,14 @@
#include "xsysmon.h"
#include "xtmrctr.h"
#else
#if defined (ARMR5) || defined (__aarch64__)
/* Need to include sysmon driver's header */
#else
#include "xadcps.h"
#endif
#endif
#include "xstatus.h"
/************************** Constant Definitions ****************************/
/**************************** Type Definitions ******************************/
/***************** Macros (Inline Functions) Definitions ********************/
@ -71,6 +80,12 @@
#define XSK_MICROBLAZE_PLATFORM
#else
#define XSK_ARM_PLATFORM
#if defined (ARMR5) || (__aarch64__)
#define XSK_ZYNQ_ULTRA_MP_PLATFORM
#else
#define XSK_ZYNQ_PLATFORM
#endif
#endif
/**
* The following constants map to the XPAR parameters created in the

15
lib/sw_services/xilskey/src/xilskey_epl.c
View file

@ -48,6 +48,8 @@
* CR#768077
* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
* 3.00 vns 31/07/15 Added efuse functionality for Ultrascale.
* 4.0 vns 10/01/15 provided conditional compilation to support
* ZynqMp platform also.
*
****************************************************************************/
/***************************** Include Files *********************************/
@ -561,7 +563,7 @@ u8 XilSKey_EfusePl_ProgramBit(u8 Row, u8 Bit)
* Monitor the Voltage and temperature using XADC, if out of range return
* unique error.
*/
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
XSKEfusePs_XAdc PL_XAdc;
PL_XAdc.VType = XSK_EFUSEPS_VAUX;
@ -918,7 +920,7 @@ u8 XilSKey_EfusePl_ReadRow(u32 Row, u8 MarginOption, u8 *RowDataBytes)
* Monitor the Voltage and temperature using XADC, if out of range return
* unique error.
*/
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
XSKEfusePs_XAdc PL_XAdc;
PL_XAdc.VType = XSK_EFUSEPS_VAUX;
XilSKey_EfusePs_XAdcReadTemperatureAndVoltage(&PL_XAdc);
@ -1151,7 +1153,7 @@ u32 XilSKey_EfusePl_ReadStatus(XilSKey_EPl *InstancePtr, u32 *StatusBits)
if(!(InstancePtr->SystemInitDone))
{
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
u32 RefClk;
u32 Status;
/**
@ -1189,7 +1191,7 @@ u32 XilSKey_EfusePl_ReadStatus(XilSKey_EPl *InstancePtr, u32 *StatusBits)
PlFpgaFlag = InstancePtr->FpgaFlag;
}
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
/**
* Monitor the Voltage and temperature using XADC, if out of range return
* unique error.
@ -1221,8 +1223,9 @@ u32 XilSKey_EfusePl_ReadStatus(XilSKey_EPl *InstancePtr, u32 *StatusBits)
JtagRead(0, &RowData, 0);
*StatusBits = RowData & 0xFFFFFF;
#endif
/* For Ultrascale */
#else
#ifdef XSK_MICROBLAZE_PLATFORM
/* Monitor Temperature and voltage */
XilSKey_EfusePs_XAdcReadTemperatureAndVoltage(&PL_XAdc);
@ -1345,7 +1348,7 @@ static inline u32 XilSKey_EfusePl_ReadKey_Zynq(XilSKey_EPl *InstancePtr)
u32 RowCount;
unsigned int RowData;
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
XSKEfusePs_XAdc PL_XAdc = {0};
/**
* Monitor the Voltage and temperature using XADC, if out of range return

8
lib/sw_services/xilskey/src/xilskey_eps.c
View file

@ -48,6 +48,8 @@
* 3.00 vns 31/07/15 Removed redundant code to initialise timer.
* 4.00 vns 09/10/15 Added DFT control bits programming fecility for
* eFuse PS on Zynq. PR#862778
* Added Conditional compilation to support Zynq Mp
* also.
*
*****************************************************************************/
@ -536,7 +538,7 @@ XilSKey_EfusePs_WriteWithXadcCheckAndVerify(u32 EfuseAddress, u32 RefClk)
/**
* Check the temperature and voltage
*/
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
if ((XAdcInstancePtr.Temp < XSK_EFUSEPS_TEMP_MIN_RAW) ||
((XAdcInstancePtr.Temp > XSK_EFUSEPS_TEMP_MAX_RAW))) {
return XSK_EFUSEPS_ERROR_WRITE_TEMPERATURE_OUT_OF_RANGE;
@ -807,7 +809,7 @@ XilSKey_EfusePs_ReadWithXadcCheck(u32 EfuseAddress, u32 RefClk, u8 *Data)
/**
* Check the temperature and voltage
*/
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
if ((XAdcInstancePtr.Temp < XSK_EFUSEPS_TEMP_MIN_RAW) ||
((XAdcInstancePtr.Temp > XSK_EFUSEPS_TEMP_MAX_RAW))) {
return XSK_EFUSEPS_ERROR_READ_TMEPERATURE_OUT_OF_RANGE;
@ -861,7 +863,7 @@ static u32 XilSKey_EfusePs_VerifyWithXadcCheck(u32 EfuseAddress, u32 RefClk)
/**
* Check the temperature and voltage
*/
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
if ((XAdcInstancePtr.Temp < XSK_EFUSEPS_TEMP_MIN_RAW) ||
((XAdcInstancePtr.Temp > XSK_EFUSEPS_TEMP_MAX_RAW))) {
return XSK_EFUSEPS_ERROR_READ_TMEPERATURE_OUT_OF_RANGE;

20
lib/sw_services/xilskey/src/xilskey_utils.c
View file

@ -46,6 +46,8 @@
* CR#768077
* 2.1 kvn 04/01/15 Fixed warnings. CR#716453.
* 3.00 vns 31/07/15 Added efuse functionality for Ultrascale.
* 4.0 vns 10/01/15 Modified condtional compilation
* to support ZynqMp platform also.
*
*****************************************************************************/
@ -60,10 +62,11 @@
/***************** Macros (Inline Functions) Definitions ********************/
/************************** Variable Definitions ****************************/
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
static XAdcPs XAdcInst; /**< XADC driver instance */
u16 XAdcDeviceId; /**< XADC Device ID */
#else
#endif
#ifdef XSK_MICROBLAZE_PLATFORM
XTmrCtr XTmrCtrInst;
#endif
u32 TimerTicksfor100ns; /**< Global Variable to store ticks/100ns*/
@ -89,7 +92,7 @@ static u32 Xilskey_RowCrcCalculation(u32 PrevCRC, u32 Data, u32 Addr);
u32 XilSKey_EfusePs_XAdcInit (void )
{
u32 Status;
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
XAdcPs_Config *ConfigPtr;
XAdcPs *XAdcInstPtr = &XAdcInst;
@ -162,7 +165,8 @@ void XilSKey_EfusePs_XAdcReadTemperatureAndVoltage(XSKEfusePs_XAdc *XAdcInstance
XAdcInstancePtr->Temp = (XAdcInstancePtr->Temp) >> 6;
/* Voltage */
Jtag_Read_Sysmon(XSK_SYSMON_VOL_ROW, &(XAdcInstancePtr->V));
#else
#endif
#ifdef XSK_ZYNQ_PLATFORM
XAdcPs *XAdcInstPtr = &XAdcInst;
u8 V, VMin, VMax;
@ -236,6 +240,9 @@ void XilSKey_EfusePs_XAdcReadTemperatureAndVoltage(XSKEfusePs_XAdc *XAdcInstance
XAdcInstancePtr->V,
(int )XAdcPs_RawToVoltage(XAdcInstancePtr->V));
#endif
#ifdef XSK_ZYNQ_ULTRA_MP_PLATFORM
/* TBD */
#endif
return;
@ -810,7 +817,7 @@ u32 Xilskey_Timer_Intialise()
u32 RefClk;
#ifdef XSK_ARM_PLATFORM
#ifdef XSK_ZYNQ_PLATFORM
TimerTicksfor100ns = 0;
u32 ArmPllFdiv;
u32 ArmClkDivisor;
@ -835,7 +842,8 @@ u32 Xilskey_Timer_Intialise()
*/
TimerTicksfor100ns =
(((RefClk * ArmPllFdiv)/ArmClkDivisor)/2)/10000000;
#else
#endif
#ifdef XSK_MICROBLAZE_PLATFORM
u32 Status;
TimerTicksfor500ns = 0;