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dp: tx: The channel equalization sequence only depends on the loop counter.

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No check is done for same voltage swing.

Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-01-13 16:15:37 -08:00 • committed by Nava kishore Manne
parent 331244ad31
commit 6cdf439d02
1 changed files with 0 additions and 15 deletions
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15
XilinxProcessorIPLib/drivers/dp/src/xdptx.c
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@ -1625,8 +1625,6 @@ static XDptx_TrainingState XDptx_TrainingStateChannelEqualization(
u32 Status;
u32 DelayUs;
u32 IterationCount = 0;
u8 PrevVsLevel = 0;
u8 SameVsLevelCount = 0;
XDptx_LinkConfig *LinkConfig = &InstancePtr->LinkConfig;
/* Obtain the required delay for channel equalization as specified by
@ -1677,19 +1675,6 @@ static XDptx_TrainingState XDptx_TrainingStateChannelEqualization(
return XDPTX_TS_SUCCESS;
}
/* Check if the same voltage swing for each lane has been used 5
* consecutive times. */
if (PrevVsLevel == LinkConfig->VsLevel) {
SameVsLevelCount++;
}
else {
SameVsLevelCount = 0;
PrevVsLevel = LinkConfig->VsLevel;
}
if (SameVsLevelCount >= 5) {
break;
}
/* Adjust the drive settings as requested by the RX device. */
Status = XDptx_AdjVswingPreemp(InstancePtr);
if (Status != XST_SUCCESS) {