v_hdmirxss: Improved stability.
Contributions from Marco Groeneveld (mgroenev@xilinx.com). Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com> Acked-by: Srikanth Vemula <svemula@xilinx.com>
This commit is contained in:
parent
b695b55fcc
commit
7c05e64788
8 changed files with 679 additions and 684 deletions
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@ -39,27 +39,27 @@
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proc generate {drv_handle} {
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::hsi::utils::define_include_file $drv_handle "xparameters.h" "XV_HdmiRxSs" \
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"NUM_INSTANCES" \
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"C_BASEADDR" \
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"C_HIGHADDR" \
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"DEVICE_ID" \
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"C_INPUT_PIXELS_PER_CLOCK" \
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"C_MAX_BITS_PER_COMPONENT"
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"NUM_INSTANCES" \
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"C_BASEADDR" \
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"C_HIGHADDR" \
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"DEVICE_ID" \
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"C_INPUT_PIXELS_PER_CLOCK" \
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"C_MAX_BITS_PER_COMPONENT"
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hier_ip_define_config_file $drv_handle "xv_hdmirxss_g.c" "XV_HdmiRxSs" \
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"DEVICE_ID" \
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"C_BASEADDR" \
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"C_HIGHADDR" \
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"C_INPUT_PIXELS_PER_CLOCK" \
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"C_MAX_BITS_PER_COMPONENT"
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"DEVICE_ID" \
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"C_BASEADDR" \
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"C_HIGHADDR" \
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"C_INPUT_PIXELS_PER_CLOCK" \
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"C_MAX_BITS_PER_COMPONENT"
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::hsi::utils::define_canonical_xpars $drv_handle "xparameters.h" \
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"XV_HdmiRxSs" \
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"C_BASEADDR" \
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"C_HIGHADDR" \
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"DEVICE_ID" \
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"C_INPUT_PIXELS_PER_CLOCK" \
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"C_MAX_BITS_PER_COMPONENT"
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"XV_HdmiRxSs" \
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"C_BASEADDR" \
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"C_HIGHADDR" \
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"DEVICE_ID" \
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"C_INPUT_PIXELS_PER_CLOCK" \
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"C_MAX_BITS_PER_COMPONENT"
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}
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@ -81,11 +81,11 @@ proc hier_ip_define_config_file {drv_handle file_name drv_string args} {
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set periphs_g [::hsi::utils::get_common_driver_ips $drv_handle]
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array set sub_core_inst {
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axi_timer 1
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hdcp 1
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v_hdmi_rx 1
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}
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array set sub_core_inst {
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axi_timer 1
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hdcp 1
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v_hdmi_rx 1
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}
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#MAGS
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#foreach name [array names sub_core_inst] {
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@ -93,113 +93,113 @@ proc hier_ip_define_config_file {drv_handle file_name drv_string args} {
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#}
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foreach periph_g $periphs_g {
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set mem_ranges [::hsi::get_mem_ranges $periph_g]
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set mem_ranges [::hsi::get_mem_ranges $periph_g]
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::hsi::current_hw_instance $periph_g;
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::hsi::current_hw_instance $periph_g;
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set child_cells_g [::hsi::get_cells -hier]
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set child_cells_g [::hsi::get_cells -hier]
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foreach child_cell_g $child_cells_g {
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set child_cell_vlnv [::common::get_property VLNV $child_cell_g]
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set child_cell_name_g [common::get_property NAME $child_cell_g]
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set vlnv_arr [split $child_cell_vlnv :]
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foreach child_cell_g $child_cells_g {
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set child_cell_vlnv [::common::get_property VLNV $child_cell_g]
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set child_cell_name_g [common::get_property NAME $child_cell_g]
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set vlnv_arr [split $child_cell_vlnv :]
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lassign $vlnv_arr ip_vendor ip_library ip_name ip_version
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set ip_type_g [common::get_property IP_TYPE $child_cell_g]
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lassign $vlnv_arr ip_vendor ip_library ip_name ip_version
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set ip_type_g [common::get_property IP_TYPE $child_cell_g]
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puts "IP type $ip_type_g\n"
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if { [string compare -nocase "BUS" $ip_type_g] != 0 } {
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set interfaces [hsi::get_intf_pins -of_objects $child_cell_g]
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set is_slave 0
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puts "IP type $ip_type_g\n"
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if { [string compare -nocase "BUS" $ip_type_g] != 0 } {
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set interfaces [hsi::get_intf_pins -of_objects $child_cell_g]
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set is_slave 0
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foreach interface $interfaces {
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set intf_type [common::get_property TYPE $interface]
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#puts "Interface type $intf_type\n"
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if { [string compare -nocase "SLAVE" $intf_type] == 0 } {
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set is_slave 1
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}
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}
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if { $is_slave != 0 } {
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#puts "Processing Periph: $ip_name $child_cell_name_g"
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foreach interface $interfaces {
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set intf_type [common::get_property TYPE $interface]
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#puts "Interface type $intf_type\n"
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if { [string compare -nocase "SLAVE" $intf_type] == 0 } {
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set is_slave 1
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}
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}
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if { $is_slave != 0 } {
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#puts "Processing Periph: $ip_name $child_cell_name_g"
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#puts $config_file "//Processing Periph: $ip_name $child_cell_name_g"
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set final_child_cell_instance_name_present_g XPAR_${child_cell_name_g}_PRESENT
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_present_g]\t 1\n"
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set final_child_cell_instance_name_present_g XPAR_${child_cell_name_g}_PRESENT
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_present_g]\t 1\n"
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# create dictionary for ip name and it's instance names "ip_name {inst1_name inst2_name}"
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dict lappend ss_ip_list $ip_name $child_cell_name_g
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}
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}
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}
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# create dictionary for ip name and it's instance names "ip_name {inst1_name inst2_name}"
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dict lappend ss_ip_list $ip_name $child_cell_name_g
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}
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}
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}
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puts $config_file "\n\n/*"
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puts $config_file "* List of Sub-cores excluded from the subsystem"
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puts $config_file "* - Excluded sub-core device id is set to 255"
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puts $config_file "* - Excluded sub-core baseaddr is set to 0"
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puts $config_file "*/\n"
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puts $config_file "\n\n/*"
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puts $config_file "* List of Sub-cores excluded from the subsystem"
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puts $config_file "* - Excluded sub-core device id is set to 255"
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puts $config_file "* - Excluded sub-core baseaddr is set to 0"
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puts $config_file "*/\n"
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foreach sub_core [lsort [array names sub_core_inst]] {
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foreach sub_core [lsort [array names sub_core_inst]] {
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#puts $config_file "//sub_core_inst: $sub_core $sub_core_inst($sub_core)"
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if {[dict exists $ss_ip_list $sub_core]} {
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set max_instances $sub_core_inst($sub_core)
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#check if core can have multiple instances
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#It is possible that not all instances are used in the design
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if {$max_instances > 1} {
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set ip_instances [dict get $ss_ip_list $sub_core]
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set avail_instances [llength $ip_instances]
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if {[dict exists $ss_ip_list $sub_core]} {
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set max_instances $sub_core_inst($sub_core)
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#check if core can have multiple instances
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#It is possible that not all instances are used in the design
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if {$max_instances > 1} {
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set ip_instances [dict get $ss_ip_list $sub_core]
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set avail_instances [llength $ip_instances]
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#puts "Sub-Core: $sub_core"
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#puts "instances: $ip_instances"
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#puts "Sub-Core: $sub_core"
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#puts "instances: $ip_instances"
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#check if available instances are less than MAX
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#if yes, mark the missing instance
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#if all instances are present then skip the core
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if {$avail_instances < $max_instances} {
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if {[string compare -nocase "axi_gpio" $sub_core] == 0} {
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set ip_inst_name [lindex $ip_instances 0]
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set srcstr "${periph_g}_reset_sel_axi_mm"
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if {[string compare -nocase $srcstr $ip_inst_name] == 0} {
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set strval "RESET_SEL_AXIS"
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} else {
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set strval "RESET_SEL_AXI_MM"
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}
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} elseif {[string compare -nocase "v_vcresampler" $sub_core]} {
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set ip_inst_name [lindex $ip_instances 0]
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set srcstr "${periph_g}_v_vcresampler_in"
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if {[string compare -nocase $srcstr $ip_inst_name] == 0} {
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set strval "V_VCRESAMPLER_OUT"
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} else {
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set strval "V_VCRESAMPLER_IN"
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}
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}
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#puts "String Selected: $strval"
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set final_child_cell_instance_name_g "XPAR_${periph_g}_${strval}_PRESENT"
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set final_child_cell_instance_devid_g "XPAR_${periph_g}_${strval}_DEVICE_ID"
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set final_child_cell_instance_baseaddr_g "XPAR_${periph_g}_${strval}_BASEADDR"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_g] 0\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_devid_g] 255\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_baseaddr_g] 0\n\n"
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}
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#check if available instances are less than MAX
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#if yes, mark the missing instance
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#if all instances are present then skip the core
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if {$avail_instances < $max_instances} {
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if {[string compare -nocase "axi_gpio" $sub_core] == 0} {
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set ip_inst_name [lindex $ip_instances 0]
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set srcstr "${periph_g}_reset_sel_axi_mm"
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if {[string compare -nocase $srcstr $ip_inst_name] == 0} {
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set strval "RESET_SEL_AXIS"
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} else {
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set strval "RESET_SEL_AXI_MM"
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}
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} elseif {[string compare -nocase "v_vcresampler" $sub_core]} {
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set ip_inst_name [lindex $ip_instances 0]
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set srcstr "${periph_g}_v_vcresampler_in"
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if {[string compare -nocase $srcstr $ip_inst_name] == 0} {
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set strval "V_VCRESAMPLER_OUT"
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} else {
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set strval "V_VCRESAMPLER_IN"
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}
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}
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#puts "String Selected: $strval"
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set final_child_cell_instance_name_g "XPAR_${periph_g}_${strval}_PRESENT"
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set final_child_cell_instance_devid_g "XPAR_${periph_g}_${strval}_DEVICE_ID"
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set final_child_cell_instance_baseaddr_g "XPAR_${periph_g}_${strval}_BASEADDR"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_g] 0\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_devid_g] 255\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_baseaddr_g] 0\n\n"
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}
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}
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#puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_g] 1\n"
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} else {
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set count 0
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while {$count<$sub_core_inst($sub_core)} {
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set final_child_cell_instance_name_g "XPAR_${periph_g}_${sub_core}_${count}_PRESENT"
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set final_child_cell_instance_devid_g "XPAR_${periph_g}_${sub_core}_${count}_DEVICE_ID"
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set final_child_cell_instance_baseaddr_g "XPAR_${periph_g}_${sub_core}_${count}_BASEADDR"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_g] 0\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_devid_g] 255\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_baseaddr_g] 0\n\n"
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incr count
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}
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}
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}
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::hsi::current_hw_instance
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}
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#puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_g] 1\n"
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} else {
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set count 0
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while {$count<$sub_core_inst($sub_core)} {
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set final_child_cell_instance_name_g "XPAR_${periph_g}_${sub_core}_${count}_PRESENT"
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set final_child_cell_instance_devid_g "XPAR_${periph_g}_${sub_core}_${count}_DEVICE_ID"
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set final_child_cell_instance_baseaddr_g "XPAR_${periph_g}_${sub_core}_${count}_BASEADDR"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_name_g] 0\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_devid_g] 255\n"
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puts -nonewline $config_file "#define [string toupper $final_child_cell_instance_baseaddr_g] 0\n\n"
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incr count
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}
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}
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}
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::hsi::current_hw_instance
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}
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puts $config_file "\n\n"
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puts $config_file "\n\n"
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puts $config_file [format "%s_Config %s_ConfigTable\[\] =" $drv_string $drv_string]
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puts $config_file "\{"
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set periphs [::hsi::utils::get_common_driver_ips $drv_handle]
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@ -237,113 +237,113 @@ proc hier_ip_define_config_file {drv_handle file_name drv_string args} {
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set comma ",\n"
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}
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::hsi::current_hw_instance $periph
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set child_cells [::hsi::get_cells -hier]
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puts $config_file ",\n"
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::hsi::current_hw_instance $periph
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set child_cells [::hsi::get_cells -hier]
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puts $config_file ",\n"
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foreach sub_core [lsort [array names sub_core_inst]] {
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set max_instances $sub_core_inst($sub_core)
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#puts "\nProcessing sub-core: $sub_core"
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#puts "Max Instances: $max_instances"
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foreach sub_core [lsort [array names sub_core_inst]] {
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set max_instances $sub_core_inst($sub_core)
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#puts "\nProcessing sub-core: $sub_core"
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#puts "Max Instances: $max_instances"
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if {[dict exists $ss_ip_list $sub_core]} {
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#puts "****Sub-core found in dictionary****"
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if {[string match -nocase v_* $sub_core]} {
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set base_addr_name "BASEADDR"
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} else {
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set base_addr_name "BASEADDR"
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}
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if {[dict exists $ss_ip_list $sub_core]} {
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#puts "****Sub-core found in dictionary****"
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if {[string match -nocase v_* $sub_core]} {
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set base_addr_name "BASEADDR"
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} else {
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set base_addr_name "BASEADDR"
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}
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set ip_instances [dict get $ss_ip_list $sub_core]
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set avail_instances [llength $ip_instances]
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set ip_instances [dict get $ss_ip_list $sub_core]
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set avail_instances [llength $ip_instances]
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#check if core can have multiple instances
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#It is possible that not all instances are used in the design
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if {$max_instances > 1} {
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#check if core can have multiple instances
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#It is possible that not all instances are used in the design
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if {$max_instances > 1} {
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#check if available instances are less than MAX
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#if yes, include the missing instance
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if {$avail_instances < $max_instances} {
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set ip_inst_name [lindex $ip_instances 0]
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set count 0
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set str_name "unknown"
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#puts "IP Inst. Name: $ip_inst_name"
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while {$count < $max_instances} {
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if {[string compare -nocase "axi_gpio" $sub_core] == 0} {
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set str_name [expr {$count == 0 ? "RESET_SEL_AXI_MM" : "RESET_SEL_AXIS"}]
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} elseif {[string compare -nocase "v_vcresampler" $sub_core]} {
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set str_name [expr {$count == 0 ? "V_VCRESAMPLER_IN" : "V_VCRESAMPLER_OUT"}]
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}
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#write the ip instance entry to the table
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set final_child_cell_instance_name_present "XPAR_${periph}_${str_name}_PRESENT"
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set final_child_cell_instance_devid "XPAR_${periph}_${str_name}_DEVICE_ID"
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set final_child_cell_instance_name_baseaddr "XPAR_${periph}_${str_name}_${base_addr_name}"
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#check if available instances are less than MAX
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#if yes, include the missing instance
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if {$avail_instances < $max_instances} {
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set ip_inst_name [lindex $ip_instances 0]
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set count 0
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set str_name "unknown"
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#puts "IP Inst. Name: $ip_inst_name"
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while {$count < $max_instances} {
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if {[string compare -nocase "axi_gpio" $sub_core] == 0} {
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set str_name [expr {$count == 0 ? "RESET_SEL_AXI_MM" : "RESET_SEL_AXIS"}]
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} elseif {[string compare -nocase "v_vcresampler" $sub_core]} {
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set str_name [expr {$count == 0 ? "V_VCRESAMPLER_IN" : "V_VCRESAMPLER_OUT"}]
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}
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#write the ip instance entry to the table
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set final_child_cell_instance_name_present "XPAR_${periph}_${str_name}_PRESENT"
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set final_child_cell_instance_devid "XPAR_${periph}_${str_name}_DEVICE_ID"
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set final_child_cell_instance_name_baseaddr "XPAR_${periph}_${str_name}_${base_addr_name}"
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puts $config_file "\t\t\{"
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puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
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puts $config_file ","
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puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
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puts $config_file ","
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puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
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puts $config_file "\n\t\t\},"
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incr count
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}
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} else {
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foreach ip_inst $ip_instances {
|
||||
#puts "instance = $ip_inst"
|
||||
set final_child_cell_instance_name_present "XPAR_${ip_inst}_PRESENT"
|
||||
set final_child_cell_instance_devid "XPAR_${ip_inst}_DEVICE_ID"
|
||||
set final_child_cell_instance_name_baseaddr "XPAR_${ip_inst}_${base_addr_name}"
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
incr count
|
||||
}
|
||||
} else {
|
||||
foreach ip_inst $ip_instances {
|
||||
#puts "instance = $ip_inst"
|
||||
set final_child_cell_instance_name_present "XPAR_${ip_inst}_PRESENT"
|
||||
set final_child_cell_instance_devid "XPAR_${ip_inst}_DEVICE_ID"
|
||||
set final_child_cell_instance_name_baseaddr "XPAR_${ip_inst}_${base_addr_name}"
|
||||
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
}
|
||||
}
|
||||
} else {
|
||||
set ip_inst_name [lindex $ip_instances 0]
|
||||
#puts "instance = $ip_inst"
|
||||
set final_child_cell_instance_name_present "XPAR_${ip_inst_name}_PRESENT"
|
||||
set final_child_cell_instance_devid "XPAR_${ip_inst_name}_DEVICE_ID"
|
||||
set final_child_cell_instance_name_baseaddr "XPAR_${ip_inst_name}_${base_addr_name}"
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
}
|
||||
}
|
||||
} else {
|
||||
set ip_inst_name [lindex $ip_instances 0]
|
||||
#puts "instance = $ip_inst"
|
||||
set final_child_cell_instance_name_present "XPAR_${ip_inst_name}_PRESENT"
|
||||
set final_child_cell_instance_devid "XPAR_${ip_inst_name}_DEVICE_ID"
|
||||
set final_child_cell_instance_name_baseaddr "XPAR_${ip_inst_name}_${base_addr_name}"
|
||||
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
}
|
||||
} else {
|
||||
#puts "****sub-core not in dictionary****"
|
||||
set count 0
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
}
|
||||
} else {
|
||||
#puts "****sub-core not in dictionary****"
|
||||
set count 0
|
||||
|
||||
while {$count< $max_instances} {
|
||||
set final_child_cell_instance_name_present "XPAR_${periph}_${sub_core}_${count}_PRESENT"
|
||||
set final_child_cell_instance_devid "XPAR_${periph}_${sub_core}_${count}_DEVICE_ID"
|
||||
set final_child_cell_instance_name_baseaddr "XPAR_${periph}_${sub_core}_${count}_BASEADDR"
|
||||
while {$count< $max_instances} {
|
||||
set final_child_cell_instance_name_present "XPAR_${periph}_${sub_core}_${count}_PRESENT"
|
||||
set final_child_cell_instance_devid "XPAR_${periph}_${sub_core}_${count}_DEVICE_ID"
|
||||
set final_child_cell_instance_name_baseaddr "XPAR_${periph}_${sub_core}_${count}_BASEADDR"
|
||||
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
incr count
|
||||
}
|
||||
}
|
||||
}
|
||||
puts $config_file "\t\t\{"
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_present]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_devid]]
|
||||
puts $config_file ","
|
||||
puts -nonewline $config_file [format "\t\t\t%s" [string toupper $final_child_cell_instance_name_baseaddr]]
|
||||
puts $config_file "\n\t\t\},"
|
||||
incr count
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
::hsi::current_hw_instance
|
||||
::hsi::current_hw_instance
|
||||
|
||||
puts -nonewline $config_file "\t\}"
|
||||
set start_comma ",\n"
|
||||
puts -nonewline $config_file "\t\}"
|
||||
set start_comma ",\n"
|
||||
}
|
||||
|
||||
puts $config_file "\n\};"
|
||||
|
|
10
XilinxProcessorIPLib/drivers/v_hdmirxss/src/Makefile
Executable file → Normal file
10
XilinxProcessorIPLib/drivers/v_hdmirxss/src/Makefile
Executable file → Normal file
|
@ -22,19 +22,19 @@ OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
|
|||
libs: banner xvhdmirxss_libs clean
|
||||
|
||||
%.o: %.c
|
||||
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
|
||||
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
|
||||
|
||||
banner:
|
||||
echo "Compiling HDMI RX Subsystem"
|
||||
echo "Compiling HDMI RX Subsystem"
|
||||
|
||||
xvhdmirxss_libs: ${OBJECTS}
|
||||
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
|
||||
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
|
||||
|
||||
.PHONY: include
|
||||
include: xvhdmirxss_includes
|
||||
|
||||
xvhdmirxss_includes:
|
||||
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
|
||||
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
|
||||
|
||||
clean:
|
||||
rm -rf ${OBJECTS}
|
||||
rm -rf ${OBJECTS}
|
||||
|
|
686
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss.c
Executable file → Normal file
686
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss.c
Executable file → Normal file
File diff suppressed because it is too large
Load diff
115
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss.h
Executable file → Normal file
115
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss.h
Executable file → Normal file
|
@ -45,12 +45,12 @@
|
|||
* <b>Subsystem Driver Features</b>
|
||||
*
|
||||
* Video Subsystem supports following features
|
||||
* - AXI Stream Input/Output interface
|
||||
* - 1, 2 or 4 pixel-wide video interface
|
||||
* - 8/10/12/16 bits per component
|
||||
* - RGB & YCbCr color space
|
||||
* - Up to 4k2k 60Hz resolution at both Input and Output interface
|
||||
* - Interlaced input support (1080i 50Hz/60Hz)
|
||||
* - AXI Stream Input/Output interface
|
||||
* - 1, 2 or 4 pixel-wide video interface
|
||||
* - 8/10/12/16 bits per component
|
||||
* - RGB & YCbCr color space
|
||||
* - Up to 4k2k 60Hz resolution at both Input and Output interface
|
||||
* - Interlaced input support (1080i 50Hz/60Hz)
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
|
@ -88,15 +88,15 @@ extern "C" {
|
|||
* interrupt requests from peripheral.
|
||||
*/
|
||||
typedef enum {
|
||||
XV_HDMIRXSS_HANDLER_CONNECT = 1, /**< A connect event interrupt type */
|
||||
XV_HDMIRXSS_HANDLER_AUX, /**< Interrupt type for AUX peripheral */
|
||||
XV_HDMIRXSS_HANDLER_AUD, /**< Interrupt type for AUD peripheral */
|
||||
XV_HDMIRXSS_HANDLER_LNKSTA, /**< Interrupt type for LNKSTA peripheral */
|
||||
XV_HDMIRXSS_HANDLER_DDC, /**< Interrupt type for DDC peripheral */
|
||||
XV_HDMIRXSS_HANDLER_STREAM_DOWN, /**< Interrupt type for stream down */
|
||||
XV_HDMIRXSS_HANDLER_STREAM_INIT, /**< Interrupt type for stream init */
|
||||
XV_HDMIRXSS_HANDLER_STREAM_UP, /**< Interrupt type for stream up */
|
||||
XV_HDMIRXSS_HANDLER_HDCP /**< Interrupt type for hdcp */
|
||||
XV_HDMIRXSS_HANDLER_CONNECT = 1, /**< A connect event interrupt type */
|
||||
XV_HDMIRXSS_HANDLER_AUX, /**< Interrupt type for AUX peripheral */
|
||||
XV_HDMIRXSS_HANDLER_AUD, /**< Interrupt type for AUD peripheral */
|
||||
XV_HDMIRXSS_HANDLER_LNKSTA, /**< Interrupt type for LNKSTA peripheral */
|
||||
XV_HDMIRXSS_HANDLER_DDC, /**< Interrupt type for DDC peripheral */
|
||||
XV_HDMIRXSS_HANDLER_STREAM_DOWN, /**< Interrupt type for stream down */
|
||||
XV_HDMIRXSS_HANDLER_STREAM_INIT, /**< Interrupt type for stream init */
|
||||
XV_HDMIRXSS_HANDLER_STREAM_UP, /**< Interrupt type for stream up */
|
||||
XV_HDMIRXSS_HANDLER_HDCP /**< Interrupt type for hdcp */
|
||||
} XV_HdmiRxSs_HandlerType;
|
||||
/*@}*/
|
||||
|
||||
|
@ -118,11 +118,11 @@ typedef struct
|
|||
|
||||
typedef struct
|
||||
{
|
||||
u16 DeviceId; /**< DeviceId is the unique ID of the device */
|
||||
u32 BaseAddress; /**< BaseAddress is the physical base address of the
|
||||
subsystem address range */
|
||||
u32 HighAddress; /**< HighAddress is the physical MAX address of the
|
||||
subsystem address range */
|
||||
u16 DeviceId; /**< DeviceId is the unique ID of the device */
|
||||
u32 BaseAddress; /**< BaseAddress is the physical base address of the
|
||||
subsystem address range */
|
||||
u32 HighAddress; /**< HighAddress is the physical MAX address of the
|
||||
subsystem address range */
|
||||
XVidC_PixelsPerClock Ppc; /**< Supported Pixel per Clock */
|
||||
u8 MaxBitsPerPixel; /**< Maximum Supported Color Depth */
|
||||
XV_HdmiRxSs_SubCore HdcpTimer; /**< Sub-core instance configuration */
|
||||
|
@ -151,44 +151,44 @@ typedef void (*XV_HdmiRxSs_Callback)(void *CallbackRef);
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
XV_HdmiRxSs_Config Config; /**< Hardware configuration */
|
||||
u32 IsReady; /**< Device and the driver instance are
|
||||
XV_HdmiRxSs_Config Config; /**< Hardware configuration */
|
||||
u32 IsReady; /**< Device and the driver instance are
|
||||
initialized */
|
||||
XTmrCtr *HdcpTimerPtr; /**< handle to sub-core driver instance */
|
||||
XHdcp1x *HdcpPtr; /**< handle to sub-core driver instance */
|
||||
XV_HdmiRx *HdmiRxPtr; /**< handle to sub-core driver instance */
|
||||
|
||||
/*Callbacks */
|
||||
XV_HdmiRxSs_Callback ConnectCallback; /**< Callback for connect event
|
||||
* interrupt */
|
||||
void *ConnectRef; /**< To be passed to the connect interrupt callback */
|
||||
XV_HdmiRxSs_Callback ConnectCallback; /**< Callback for connect event
|
||||
* interrupt */
|
||||
void *ConnectRef; /**< To be passed to the connect interrupt callback */
|
||||
|
||||
XV_HdmiRxSs_Callback AuxCallback; /**< Callback for AUX event interrupt */
|
||||
void *AuxRef; /**< To be passed to the AUX interrupt callback */
|
||||
XV_HdmiRxSs_Callback AuxCallback; /**< Callback for AUX event interrupt */
|
||||
void *AuxRef; /**< To be passed to the AUX interrupt callback */
|
||||
|
||||
XV_HdmiRxSs_Callback AudCallback; /**< Callback for AUD event interrupt */
|
||||
void *AudRef; /**< To be passed to the Audio interrupt callback */
|
||||
XV_HdmiRxSs_Callback AudCallback; /**< Callback for AUD event interrupt */
|
||||
void *AudRef; /**< To be passed to the Audio interrupt callback */
|
||||
|
||||
XV_HdmiRxSs_Callback LnkStaCallback; /**< Callback for LNKSTA event
|
||||
* interrupt */
|
||||
void *LnkStaRef; /**< To be passed to the LNKSTA interrupt callback */
|
||||
XV_HdmiRxSs_Callback LnkStaCallback; /**< Callback for LNKSTA event
|
||||
* interrupt */
|
||||
void *LnkStaRef; /**< To be passed to the LNKSTA interrupt callback */
|
||||
|
||||
XV_HdmiRxSs_Callback DdcCallback; /**< Callback for PDDC interrupt */
|
||||
void *DdcRef; /**< To be passed to the DDC interrupt callback */
|
||||
XV_HdmiRxSs_Callback DdcCallback; /**< Callback for PDDC interrupt */
|
||||
void *DdcRef; /**< To be passed to the DDC interrupt callback */
|
||||
|
||||
XV_HdmiRxSs_Callback StreamDownCallback; /**< Callback for stream down
|
||||
* callback */
|
||||
void *StreamDownRef; /**< To be passed to the stream down callback */
|
||||
* callback */
|
||||
void *StreamDownRef; /**< To be passed to the stream down callback */
|
||||
|
||||
XV_HdmiRxSs_Callback StreamInitCallback; /**< Callback for stream init
|
||||
* callback */
|
||||
void *StreamInitRef; /**< To be passed to the stream start callback */
|
||||
XV_HdmiRxSs_Callback StreamInitCallback; /**< Callback for stream init
|
||||
* callback */
|
||||
void *StreamInitRef; /**< To be passed to the stream start callback */
|
||||
|
||||
XV_HdmiRxSs_Callback StreamUpCallback; /**< Callback for stream up callback */
|
||||
void *StreamUpRef; /**< To be passed to the stream up callback */
|
||||
void *StreamUpRef; /**< To be passed to the stream up callback */
|
||||
|
||||
XV_HdmiRxSs_Callback HdcpCallback; /**< Callback for hdcp callback */
|
||||
void *HdcpRef; /**< To be passed to the hdcp callback */
|
||||
XV_HdmiRxSs_Callback HdcpCallback; /**< Callback for hdcp callback */
|
||||
void *HdcpRef; /**< To be passed to the hdcp callback */
|
||||
|
||||
// Scratch pad
|
||||
u8 IsStreamConnected; /**< HDMI RX Stream Connected */
|
||||
|
@ -198,11 +198,11 @@ typedef struct
|
|||
u16 EdidLength; /**< Default Edid Length */
|
||||
u8 TMDSClockRatio; /**< HDMI RX TMDS clock ratio */
|
||||
|
||||
XVidC_DelayHandler UserTimerWaitUs; /**< Custom user function for
|
||||
delay/sleep. */
|
||||
void *UserTimerPtr; /**< Pointer to a timer instance
|
||||
used by the custom user
|
||||
delay/sleep function. */
|
||||
XVidC_DelayHandler UserTimerWaitUs; /**< Custom user function for
|
||||
delay/sleep. */
|
||||
void *UserTimerPtr; /**< Pointer to a timer instance
|
||||
used by the custom user
|
||||
delay/sleep function. */
|
||||
} XV_HdmiRxSs;
|
||||
|
||||
/************************** Macros Definitions *******************************/
|
||||
|
@ -211,31 +211,30 @@ typedef struct
|
|||
XV_HdmiRxSs_Config* XV_HdmiRxSs_LookupConfig(u32 DeviceId);
|
||||
void XV_HdmiRxSs_ReportCoreInfo(XV_HdmiRxSs *InstancePtr);
|
||||
void XV_HdmiRxSs_SetUserTimerHandler(XV_HdmiRxSs *InstancePtr,
|
||||
XVidC_DelayHandler CallbackFunc, void *CallbackRef);
|
||||
XVidC_DelayHandler CallbackFunc, void *CallbackRef);
|
||||
void XV_HdmiRxSS_HdmiRxIntrHandler(XV_HdmiRxSs *InstancePtr);
|
||||
void XV_HdmiRxSS_HdcpIntrHandler(XV_HdmiRxSs *InstancePtr);
|
||||
void XV_HdmiRxSS_HdcpTimerIntrHandler(XV_HdmiRxSs *InstancePtr);
|
||||
int XV_HdmiRxSs_CfgInitialize(XV_HdmiRxSs *InstancePtr,
|
||||
XV_HdmiRxSs_Config *CfgPtr,
|
||||
u32 EffectiveAddr);
|
||||
XV_HdmiRxSs_Config *CfgPtr,
|
||||
u32 EffectiveAddr);
|
||||
void XV_HdmiRxSs_Start(XV_HdmiRxSs *InstancePtr);
|
||||
void XV_HdmiRxSs_Stop(XV_HdmiRxSs *InstancePtr);
|
||||
void XV_HdmiRxSs_Reset(XV_HdmiRxSs *InstancePtr);
|
||||
int XV_HdmiRxSs_SetCallback(XV_HdmiRxSs *InstancePtr,
|
||||
u32 HandlerType,
|
||||
void *CallbackFunc,
|
||||
void *CallbackRef);
|
||||
u32 HandlerType,
|
||||
void *CallbackFunc,
|
||||
void *CallbackRef);
|
||||
void XV_HdmiRxSs_SetEdidParam(XV_HdmiRxSs *InstancePtr, u8 *EdidDataPtr,
|
||||
u16 Length);
|
||||
u16 Length);
|
||||
void XV_HdmiRxSs_LoadDefaultEdid(XV_HdmiRxSs *InstancePtr);
|
||||
void XV_HdmiRxSs_LoadEdid(XV_HdmiRxSs *InstancePtr, u8 *EdidDataPtr,
|
||||
u16 Length);
|
||||
u16 Length);
|
||||
void XV_HdmiRxSs_ToggleHpd(XV_HdmiRxSs *InstancePtr);
|
||||
XV_HdmiRx_Aux *XV_HdmiRxSs_GetAuxiliary(XV_HdmiRxSs *InstancePtr);
|
||||
u32 XV_HdmiRxSs_SetStream(XV_HdmiRxSs *InstancePtr,
|
||||
XVidC_PixelsPerClock Ppc,
|
||||
u32 Clock,
|
||||
u32 LineRate);
|
||||
u32 Clock,
|
||||
u32 LineRate);
|
||||
XVidC_VideoStream *XV_HdmiRxSs_GetVideoStream(XV_HdmiRxSs *InstancePtr);
|
||||
u8 XV_HdmiRxSs_GetVideoIDCode(XV_HdmiRxSs *InstancePtr);
|
||||
u8 XV_HdmiRxSs_GetVideoStreamType(XV_HdmiRxSs *InstancePtr);
|
||||
|
|
84
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_coreinit.c
Executable file → Normal file
84
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_coreinit.c
Executable file → Normal file
|
@ -63,9 +63,9 @@
|
|||
|
||||
/************************** Function Prototypes ******************************/
|
||||
static int XV_HdmiRxSs_ComputeSubcoreAbsAddr(u32 SubSys_BaseAddr,
|
||||
u32 SubSys_HighAddr,
|
||||
u32 subcore_offset,
|
||||
u32 *SubCore_BaseAddr);
|
||||
u32 SubSys_HighAddr,
|
||||
u32 subcore_offset,
|
||||
u32 *SubCore_BaseAddr);
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
|
@ -86,9 +86,9 @@ static int XV_HdmiRxSs_ComputeSubcoreAbsAddr(u32 SubSys_BaseAddr,
|
|||
*
|
||||
******************************************************************************/
|
||||
static int XV_HdmiRxSs_ComputeSubcoreAbsAddr(u32 SubSys_BaseAddr,
|
||||
u32 SubSys_HighAddr,
|
||||
u32 SubCore_Offset,
|
||||
u32 *SubCore_BaseAddr)
|
||||
u32 SubSys_HighAddr,
|
||||
u32 SubCore_Offset,
|
||||
u32 *SubCore_BaseAddr)
|
||||
{
|
||||
int Status;
|
||||
u32 absAddr;
|
||||
|
@ -101,8 +101,8 @@ static int XV_HdmiRxSs_ComputeSubcoreAbsAddr(u32 SubSys_BaseAddr,
|
|||
}
|
||||
else
|
||||
{
|
||||
*SubCore_BaseAddr = 0;
|
||||
Status = XST_FAILURE;
|
||||
*SubCore_BaseAddr = 0;
|
||||
Status = XST_FAILURE;
|
||||
}
|
||||
|
||||
return(Status);
|
||||
|
@ -125,7 +125,7 @@ int XV_HdmiRxSs_SubcoreInitHdmiRx(XV_HdmiRxSs *HdmiRxSsPtr)
|
|||
|
||||
if(HdmiRxSsPtr->HdmiRxPtr)
|
||||
{
|
||||
/* Get core configuration */
|
||||
/* Get core configuration */
|
||||
xdbg_printf(XDBG_DEBUG_GENERAL," ->Initializing HDMI RX core.... \r\n");
|
||||
ConfigPtr = XV_HdmiRx_LookupConfig(HdmiRxSsPtr->Config.HdmiRx.DeviceId);
|
||||
if(ConfigPtr == NULL)
|
||||
|
@ -134,28 +134,28 @@ int XV_HdmiRxSs_SubcoreInitHdmiRx(XV_HdmiRxSs *HdmiRxSsPtr)
|
|||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
/* Compute absolute base address */
|
||||
/* Compute absolute base address */
|
||||
AbsAddr = 0;
|
||||
Status = XV_HdmiRxSs_ComputeSubcoreAbsAddr(HdmiRxSsPtr->Config.BaseAddress,
|
||||
HdmiRxSsPtr->Config.HighAddress,
|
||||
HdmiRxSsPtr->Config.HdmiRx.AddrOffset,
|
||||
&AbsAddr);
|
||||
HdmiRxSsPtr->Config.HighAddress,
|
||||
HdmiRxSsPtr->Config.HdmiRx.AddrOffset,
|
||||
&AbsAddr);
|
||||
|
||||
if(Status != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("HDMIRXSS ERR:: HDMI RX core base address (0x%x) \
|
||||
invalid %d\r\n", AbsAddr);
|
||||
invalid %d\r\n", AbsAddr);
|
||||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
/* Initialize core */
|
||||
/* Initialize core */
|
||||
Status = XV_HdmiRx_CfgInitialize(HdmiRxSsPtr->HdmiRxPtr,
|
||||
ConfigPtr,
|
||||
AbsAddr);
|
||||
|
||||
// Load EDID
|
||||
XV_HdmiRx_DdcLoadEdid(HdmiRxSsPtr->HdmiRxPtr, HdmiRxSsPtr->EdidPtr,
|
||||
HdmiRxSsPtr->EdidLength);
|
||||
HdmiRxSsPtr->EdidLength);
|
||||
|
||||
/* Reset the hardware and set the flag to indicate the
|
||||
subsystem is ready
|
||||
|
@ -190,9 +190,9 @@ int XV_HdmiRxSs_SubcoreInitHdcpTimer(XV_HdmiRxSs *HdmiRxSsPtr)
|
|||
|
||||
if(HdmiRxSsPtr->HdcpTimerPtr)
|
||||
{
|
||||
/* Get core configuration */
|
||||
/* Get core configuration */
|
||||
xdbg_printf(XDBG_DEBUG_GENERAL," \
|
||||
->Initializing AXI Timer core.... \r\n");
|
||||
->Initializing AXI Timer core.... \r\n");
|
||||
ConfigPtr = XTmrCtr_LookupConfig(HdmiRxSsPtr->Config.HdcpTimer.DeviceId);
|
||||
if(ConfigPtr == NULL)
|
||||
{
|
||||
|
@ -200,26 +200,26 @@ int XV_HdmiRxSs_SubcoreInitHdcpTimer(XV_HdmiRxSs *HdmiRxSsPtr)
|
|||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
/* Compute absolute base address */
|
||||
/* Compute absolute base address */
|
||||
AbsAddr = 0;
|
||||
Status = XV_HdmiRxSs_ComputeSubcoreAbsAddr(HdmiRxSsPtr->Config.BaseAddress,
|
||||
HdmiRxSsPtr->Config.HighAddress,
|
||||
HdmiRxSsPtr->Config.HdcpTimer.AddrOffset,
|
||||
&AbsAddr);
|
||||
HdmiRxSsPtr->Config.HighAddress,
|
||||
HdmiRxSsPtr->Config.HdcpTimer.AddrOffset,
|
||||
&AbsAddr);
|
||||
|
||||
if(Status != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("HDMIRXSS ERR:: AXI Timer core base address (0x%x) \
|
||||
invalid %d\r\n", AbsAddr);
|
||||
invalid %d\r\n", AbsAddr);
|
||||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
/* Setup the instance */
|
||||
memset(HdmiRxSsPtr->HdcpTimerPtr, 0, sizeof(XTmrCtr));
|
||||
/* Setup the instance */
|
||||
memset(HdmiRxSsPtr->HdcpTimerPtr, 0, sizeof(XTmrCtr));
|
||||
|
||||
/* Initialize core */
|
||||
XTmrCtr_CfgInitialize(HdmiRxSsPtr->HdcpTimerPtr, ConfigPtr, AbsAddr);
|
||||
Status = XTmrCtr_InitHw(HdmiRxSsPtr->HdcpTimerPtr);
|
||||
/* Initialize core */
|
||||
XTmrCtr_CfgInitialize(HdmiRxSsPtr->HdcpTimerPtr, ConfigPtr, AbsAddr);
|
||||
Status = XTmrCtr_InitHw(HdmiRxSsPtr->HdcpTimerPtr);
|
||||
|
||||
if(Status != XST_SUCCESS)
|
||||
{
|
||||
|
@ -247,7 +247,7 @@ int XV_HdmiRxSs_SubcoreInitHdcp(XV_HdmiRxSs *HdmiRxSsPtr)
|
|||
|
||||
if(HdmiRxSsPtr->HdcpPtr)
|
||||
{
|
||||
/* Get core configuration */
|
||||
/* Get core configuration */
|
||||
xdbg_printf(XDBG_DEBUG_GENERAL," ->Initializing HDCP core.... \r\n");
|
||||
ConfigPtr = XHdcp1x_LookupConfig(HdmiRxSsPtr->Config.Hdcp.DeviceId);
|
||||
if(ConfigPtr == NULL)
|
||||
|
@ -256,39 +256,39 @@ int XV_HdmiRxSs_SubcoreInitHdcp(XV_HdmiRxSs *HdmiRxSsPtr)
|
|||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
/* Compute absolute base address */
|
||||
/* Compute absolute base address */
|
||||
AbsAddr = 0;
|
||||
Status = XV_HdmiRxSs_ComputeSubcoreAbsAddr(HdmiRxSsPtr->Config.BaseAddress,
|
||||
HdmiRxSsPtr->Config.HighAddress,
|
||||
HdmiRxSsPtr->Config.Hdcp.AddrOffset,
|
||||
&AbsAddr);
|
||||
HdmiRxSsPtr->Config.HighAddress,
|
||||
HdmiRxSsPtr->Config.Hdcp.AddrOffset,
|
||||
&AbsAddr);
|
||||
|
||||
if(Status != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("HDMIRXSS ERR:: HDCP core base address (0x%x) invalid %d\r\n",
|
||||
AbsAddr);
|
||||
AbsAddr);
|
||||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
/* Initialize core */
|
||||
/* Initialize core */
|
||||
void *PhyIfPtr = HdmiRxSsPtr->HdmiRxPtr;
|
||||
Status = XHdcp1x_CfgInitialize(HdmiRxSsPtr->HdcpPtr,
|
||||
ConfigPtr,
|
||||
PhyIfPtr,
|
||||
AbsAddr);
|
||||
AbsAddr);
|
||||
|
||||
/* Self-test the hdcp interface */
|
||||
if (XHdcp1x_SelfTest(HdmiRxSsPtr->HdcpPtr) != XST_SUCCESS) {
|
||||
Status = XST_FAILURE;
|
||||
}
|
||||
/* Self-test the hdcp interface */
|
||||
if (XHdcp1x_SelfTest(HdmiRxSsPtr->HdcpPtr) != XST_SUCCESS) {
|
||||
Status = XST_FAILURE;
|
||||
}
|
||||
|
||||
if(Status != XST_SUCCESS)
|
||||
if(Status != XST_SUCCESS)
|
||||
{
|
||||
xil_printf("HDMIRXSS ERR:: HDCP Initialization failed\r\n");
|
||||
return(XST_FAILURE);
|
||||
}
|
||||
|
||||
XHdcp1x_SetKeySelect(HdmiRxSsPtr->HdcpPtr, XV_HDMIRXSS_HDCP_KEYSEL);
|
||||
XHdcp1x_SetKeySelect(HdmiRxSsPtr->HdcpPtr, XV_HDMIRXSS_HDCP_KEYSEL);
|
||||
}
|
||||
return(XST_SUCCESS);
|
||||
}
|
||||
|
|
0
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_coreinit.h
Executable file → Normal file
0
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_coreinit.h
Executable file → Normal file
54
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_g.c
Executable file → Normal file
54
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_g.c
Executable file → Normal file
|
@ -48,15 +48,15 @@
|
|||
*/
|
||||
|
||||
#ifndef XPAR_V_HDMI_RX_SS_0_AXI_TIMER_DEVICE_ID
|
||||
#define XPAR_V_HDMI_RX_SS_0_AXI_TIMER_PRESENT 0
|
||||
#define XPAR_V_HDMI_RX_SS_0_AXI_TIMER_PRESENT 0
|
||||
#define XPAR_V_HDMI_RX_SS_0_AXI_TIMER_DEVICE_ID 255
|
||||
#define XPAR_V_HDMI_RX_SS_0_AXI_TIMER_BASEADDR 0xFFFFFFFF
|
||||
#define XPAR_V_HDMI_RX_SS_0_AXI_TIMER_BASEADDR 0xFFFFFFFF
|
||||
#endif
|
||||
|
||||
#ifndef XPAR_V_HDMI_RX_SS_0_HDCP_1_4_DEVICE_ID
|
||||
#define XPAR_V_HDMI_RX_SS_0_HDCP_1_4_PRESENT 0
|
||||
#define XPAR_V_HDMI_RX_SS_0_HDCP_1_4_DEVICE_ID 255
|
||||
#define XPAR_V_HDMI_RX_SS_0_HDCP_1_4_BASEADDR 0xFFFFFFFF
|
||||
#define XPAR_V_HDMI_RX_SS_0_HDCP_1_4_PRESENT 0
|
||||
#define XPAR_V_HDMI_RX_SS_0_HDCP_1_4_DEVICE_ID 255
|
||||
#define XPAR_V_HDMI_RX_SS_0_HDCP_1_4_BASEADDR 0xFFFFFFFF
|
||||
#endif
|
||||
|
||||
#ifndef XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_DEVICE_ID
|
||||
|
@ -67,27 +67,27 @@
|
|||
|
||||
XV_HdmiRxSs_Config XV_HdmiRxSs_ConfigTable[] =
|
||||
{
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_BASEADDR,
|
||||
XPAR_V_HDMI_RX_SS_0_HIGHADDR,
|
||||
XPAR_V_HDMI_RX_SS_0_INPUT_PIXELS_PER_CLOCK,
|
||||
XPAR_V_HDMI_RX_SS_0_MAX_BITS_PER_COMPONENT,
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_BASEADDR,
|
||||
XPAR_V_HDMI_RX_SS_0_HIGHADDR,
|
||||
XPAR_V_HDMI_RX_SS_0_INPUT_PIXELS_PER_CLOCK,
|
||||
XPAR_V_HDMI_RX_SS_0_MAX_BITS_PER_COMPONENT,
|
||||
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_AXI_TIMER_PRESENT,
|
||||
XPAR_V_HDMI_RX_SS_0_AXI_TIMER_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_AXI_TIMER_BASEADDR
|
||||
},
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_HDCP_1_4_PRESENT,
|
||||
XPAR_V_HDMI_RX_SS_0_HDCP_1_4_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_HDCP_1_4_BASEADDR
|
||||
},
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_PRESENT,
|
||||
XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_BASEADDR
|
||||
},
|
||||
}
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_AXI_TIMER_PRESENT,
|
||||
XPAR_V_HDMI_RX_SS_0_AXI_TIMER_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_AXI_TIMER_BASEADDR
|
||||
},
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_HDCP_1_4_PRESENT,
|
||||
XPAR_V_HDMI_RX_SS_0_HDCP_1_4_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_HDCP_1_4_BASEADDR
|
||||
},
|
||||
{
|
||||
XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_PRESENT,
|
||||
XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_DEVICE_ID,
|
||||
XPAR_V_HDMI_RX_SS_0_V_HDMI_RX_BASEADDR
|
||||
},
|
||||
}
|
||||
};
|
||||
|
|
0
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_sinit.c
Executable file → Normal file
0
XilinxProcessorIPLib/drivers/v_hdmirxss/src/xv_hdmirxss_sinit.c
Executable file → Normal file
Loading…
Add table
Reference in a new issue