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dp: rx: Added MST sideband messaging registers.

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Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
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Andrei-Liviu Simion 2015-01-15 14:20:26 -08:00 • committed by Nava kishore Manne
parent 1cb3119c90
commit 8933949ee9
1 changed files with 14 additions and 0 deletions
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14
XilinxProcessorIPLib/drivers/dp/src/xdprx_hw.h
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@ -423,6 +423,20 @@
of stream 1. */
/* @} */
/** @name DPRX core registers: MST field for sideband message buffers and the
* virtual channel payload table.
* @{
*/
#define XDPRX_DOWN_REQ 0xA00 /**< Down request buffer address
space. */
#define XDPRX_DOWN_REP 0xB00 /**< Down reply buffer address
space. */
#define XDPRX_VC_PAYLOAD_TABLE 0x800 /**< Virtual channel payload
table (0xFF bytes). */
#define XDPRX_VC_PAYLOAD_TABLE_ID_SLOT(SlotNum) \
(XDPRX_VC_PAYLOAD_TABLE + SlotNum)
/* @} */
/******************* Macros (Inline Functions) Definitions ********************/
/** @name Register access macro definitions.