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sw_apps: zynqmp_fsbl: Modified bus width in dummy phase.

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This patch modifies the buswidth in dummy phase as
in data phase.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
This commit is contained in:
RamyaSree 2015-07-29 16:18:34 +05:30 • committed by Nava kishore Manne
parent 8e402be829
commit 8dc4f9e7fd
1 changed files with 26 additions and 8 deletions
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34
lib/sw_apps/zynqmp_fsbl/src/xfsbl_qspi.c
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@ -619,11 +619,20 @@ u32 XFsbl_Qspi24Copy(u32 SrcAddress, PTRSIZE DestAddress, u32 Length)
/* Update Dummy cycles as per flash specs for QUAD IO */
/*
* Silicon and REMUS do not care what the SPI mode is
* for dummies, but QEMU expects it to match the address
* phase. Make it so.
* It is recommended that Bus width value during dummy
* phase should be same as data phase
*/
FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
if (ReadCommand == FAST_READ_CMD_24BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
}
if (ReadCommand == DUAL_READ_CMD_24BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
}
if (ReadCommand == QUAD_READ_CMD_24BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
}
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = NULL;
@ -908,11 +917,20 @@ u32 XFsbl_Qspi32Copy(u32 SrcAddress, PTRSIZE DestAddress, u32 Length)
/* Update Dummy cycles as per flash specs for QUAD IO */
/*
* Silicon and REMUS do not care what the SPI mode is
* for dummies, but QEMU expects it to match the address
* phase. Make it so.
* It is recommended that Bus width value during dummy
* phase should be same as data phase
*/
FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
if (ReadCommand == FAST_READ_CMD_32BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
}
if (ReadCommand == DUAL_READ_CMD_32BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
}
if (ReadCommand == QUAD_READ_CMD_32BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
}
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = NULL;