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axis_switch: Added new driver Axi4-Stream Switch Control router

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Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
This commit is contained in:
Shadul Shaikh 2015-05-12 13:16:00 +05:30 • committed by Nava kishore Manne
parent 9383db5c21
commit a00dbcfed4
9 changed files with 1069 additions and 0 deletions
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40
XilinxProcessorIPLib/drivers/axis_switch/data/axis_switch.mdd Normal file
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##############################################################################
#
# Copyright (C) 2015 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"),to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
###############################################################################
OPTION psf_version = 2.1;
BEGIN driver axis_switch
OPTION supported_peripherals = (axis_switch);
OPTION driver_state = ACTIVE;
OPTION copyfiles = all;
OPTION VERSION = 1.0;
OPTION NAME = axis_switch;
END driver

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XilinxProcessorIPLib/drivers/axis_switch/data/axis_switch.tcl Normal file
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##############################################################################
#
# Copyright (C) 2015 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"),to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
###############################################################################
proc generate {drv_handle} {
::hsi::utils::define_include_file $drv_handle "xparameters.h" "XAxis_Switch" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "NUM_SI" "NUM_MI"
::hsi::utils::define_config_file $drv_handle "xaxis_switch_g.c" "XAxis_Switch" "DEVICE_ID" "C_BASEADDR" "NUM_SI" "NUM_MI"
::hsi::utils::define_canonical_xpars $drv_handle "xparameters.h" "Axis_Switch" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "NUM_SI" "NUM_MI"
}

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XilinxProcessorIPLib/drivers/axis_switch/src/Makefile Normal file
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COMPILER=
ARCHIVER=
CP=cp
COMPILER_FLAGS=
EXTRA_COMPILER_FLAGS=
LIB=libxil.a
CC_FLAGS = $(COMPILER_FLAGS)
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
RELEASEDIR=../../../lib
INCLUDEDIR=../../../include
INCLUDES=-I./. -I${INCLUDEDIR}
OUTS = *.o
LIBSOURCES:=*.c
INCLUDEFILES:=*.h
OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
libs: banner xaxis_switch_libs clean
%.o: %.c
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
banner:
echo "Compiling axis_switch"
xaxis_switch_libs: ${OBJECTS}
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
.PHONY: include
include: xaxis_switch_includes
xaxis_switch_includes:
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
clean:
rm -rf ${OBJECTS}

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XilinxProcessorIPLib/drivers/axis_switch/src/xaxis_switch.c Normal file
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/******************************************************************************
*
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xaxis_switch.c
*
* This is the main file for Xilinx AXI4-Stream Switch Control Router core.
* Please see xaxis_switch.h for more details of the driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- --- -------- --------------------------------------------------
* 1.00 sha 01/28/15 Initial release.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xaxis_switch.h"
#include "string.h"
/************************** Constant Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
/**************************** Type Definitions *******************************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/************************** Function Definitions *****************************/
/*****************************************************************************/
/**
*
* This function initializes the AXI4-Stream Switch core. This function must
* be called prior to using the core. Initialization of the core includes
* setting up the instance data and ensuring the hardware is in a quiescent
* state.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
* @param CfgPtr points to the configuration structure associated with
* the AXI4-Stream Switch core.
* @param EffectiveAddr is the base address of the device. If address
* translation is being used, then this parameter must reflect the
* virtual base address. Otherwise, the physical address should be
* used.
*
* @return
* - XST_SUCCESS if XAxisScr_CfgInitialize was successful.
*
* @note Axis_Switch core connects up to 16 masters to 16 slaves.
*
******************************************************************************/
s32 XAxisScr_CfgInitialize(XAxis_Switch *InstancePtr,
XAxis_Switch_Config *CfgPtr, u32 EffectiveAddr)
{
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(CfgPtr != NULL);
Xil_AssertNonvoid(EffectiveAddr != (u32)0x0);
/* Setup the instance */
(void)memset((void *)InstancePtr, 0, sizeof(XAxis_Switch));
(void)memcpy((void *)&(InstancePtr->Config), (const void *)CfgPtr,
sizeof(XAxis_Switch_Config));
InstancePtr->Config.BaseAddress = EffectiveAddr;
/* Make sure that all MI ports are disabled */
XAxisScr_MiPortDisableAll(InstancePtr);
/* Set the flag to indicate the driver is ready */
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function enables the MUX port specified by a MI index and links with
* desired SI, indicated by a SiIndex.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
* @param MiIndex specifies an index that will be used for enabling MUX
* which is within the range [0 to 15].
* @param SiIndex specifies an index that will be used as a source to
* MUX. The range is [0 to 15].
*
* @return None.
*
* @note MUX[MiIndex] is sourced from SI[SiIndex]. Axis_Switch core
* connects up to 16 masters to 16 slaves.
*
******************************************************************************/
void XAxisScr_MiPortEnable(XAxis_Switch *InstancePtr, u8 MiIndex, u8 SiIndex)
{
u32 MiPortAddr;
/* Verify arguments. */
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(MiIndex < InstancePtr->Config.MaxNumMI);
Xil_AssertVoid(SiIndex < InstancePtr->Config.MaxNumSI);
/* Calculate MI port address to be enabled */
MiPortAddr = XAXIS_SCR_MI_MUX_START_OFFSET + 4 * MiIndex;
/* MUX[MiIndex] is sourced from SI[SiIndex] */
XAxisScr_WriteReg(InstancePtr->Config.BaseAddress, MiPortAddr,
SiIndex);
}
/*****************************************************************************/
/**
*
* This function disables the MUX port specified by a MI index and un-link
* SI, set previously.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
* @param MiIndex specifies an index that will be used for disabling MUX
* which is within the range [0 to 15].
*
* @return None.
*
* @note MUX[MiIndex] is removed for SI[SiIndex]. Axis_Switch core
* connects up to 16 masters to 16 slaves.
*
******************************************************************************/
void XAxisScr_MiPortDisable(XAxis_Switch *InstancePtr, u8 MiIndex)
{
u32 MiPortAddr;
/* Verify arguments. */
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(MiIndex < InstancePtr->Config.MaxNumMI);
/* Calculate MI port address of which to be enabled */
MiPortAddr = XAXIS_SCR_MI_MUX_START_OFFSET + 4 * MiIndex;
XAxisScr_WriteReg(InstancePtr->Config.BaseAddress, MiPortAddr,
XAXIS_SCR_MI_X_DISABLE_MASK);
}
/*****************************************************************************/
/**
*
* This function returns the status of whether MUX is sourced from desired SI.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
* @param MiIndex specifies an index that will be used for addressing
* the MUX which is within the range [0 to 15].
* @param SiIndex specifies an index that will be used to identify,
* whether it is sourced. The range is [0 to 15].
*
* @return
* - TRUE, if MUX is sourced from SI.
* - FALSE, if MUX is not sourced from SI.
*
* @note Axis_Switch core connects up to 16 masters to 16 slaves.
*
******************************************************************************/
s32 XAxisScr_IsMiPortEnabled(XAxis_Switch *InstancePtr, u8 MiIndex,
u8 SiIndex)
{
u32 MiPortAddr;
u32 RegValue;
u8 Enable;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(MiIndex < InstancePtr->Config.MaxNumMI);
Xil_AssertNonvoid(SiIndex < InstancePtr->Config.MaxNumSI);
/* Calculate MI port address to be enabled */
MiPortAddr = XAXIS_SCR_MI_MUX_START_OFFSET + 4 * MiIndex;
/* Read MI port data */
RegValue = XAxisScr_ReadReg(InstancePtr->Config.BaseAddress,
MiPortAddr);
/* Fetch enable bit */
Enable = RegValue >> XAXIS_SCR_MI_X_DISABLE_SHIFT;
/* Fetch SI value */
RegValue &= XAXIS_SCR_MI_X_MUX_MASK;
/* When SiIndex is zero */
if ((RegValue == SiIndex) && (!Enable)) {
RegValue = TRUE;
}
else if((RegValue & SiIndex) && (!Enable)) {
RegValue = TRUE;
}
else {
RegValue = FALSE;
}
return RegValue;
}
/*****************************************************************************/
/**
*
* This function returns the status of whether MUX is disabled.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
* @param MiIndex specifies an index that will be used for addressing
* the MUX which is within the range [0 to 15].
*
* @return
* - TRUE, if MUX is disabled.
* - FALSE, if MUX is enabled.
*
* @note Axis_Switch core connects up to 16 masters to 16 slaves.
*
******************************************************************************/
s32 XAxisScr_IsMiPortDisabled(XAxis_Switch *InstancePtr, u8 MiIndex)
{
u32 MiPortAddr;
u8 Disable;
/* Verify arguments. */
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(MiIndex < InstancePtr->Config.MaxNumMI);
/* Calculate MI port address to be enabled */
MiPortAddr = XAXIS_SCR_MI_MUX_START_OFFSET + 4 * MiIndex;
/* Read MI port data */
Disable = XAxisScr_ReadReg(InstancePtr->Config.BaseAddress,
MiPortAddr) >> XAXIS_SCR_MI_X_DISABLE_SHIFT;
if (Disable) {
Disable = TRUE;
}
return Disable;
}
/*****************************************************************************/
/**
*
* This function disables all the MUX port, in turn removes association with
* desired SI.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
*
* @return None.
*
* @note Axis_Switch core connects up to 16 masters to 16 slaves.
*
******************************************************************************/
void XAxisScr_MiPortDisableAll(XAxis_Switch *InstancePtr)
{
u32 MiPortAddr;
u8 Index;
/* Verify argument. */
Xil_AssertVoid(InstancePtr != NULL);
for (Index = 0; Index < InstancePtr->Config.MaxNumMI; Index++) {
/* Calculate MI port address of which to be enabled */
MiPortAddr = XAXIS_SCR_MI_MUX_START_OFFSET + 4 * Index;
XAxisScr_WriteReg(InstancePtr->Config.BaseAddress, MiPortAddr,
XAXIS_SCR_MI_X_DISABLE_MASK);
}
}

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XilinxProcessorIPLib/drivers/axis_switch/src/xaxis_switch.h Normal file
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/******************************************************************************
*
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xaxis_switch.h
*
* This is the main header file for Xilinx AXI4-Stream Switch Control Router
* core. It is used for routing streams where masters in the system do not know
* final destination address.
*
* <b>Core Features </b>
*
* For a full description of AXI4-Stream Switch Control Router, please see the
* hardware specification.
*
* <b>Software Initialization & Configuration</b>
*
* The application needs to do following steps in order for preparing the
* AXI4-Stream Switch Control Router core to be ready.
*
* - Call XAxisScr_LookupConfig using a device ID to find the core
* configuration.
* - Call XAxisScr_CfgInitialize to initialize the device and the driver
* instance associated with it.
*
* <b>Interrupts </b>
*
* This driver does not have interrupt mechanism.
*
* <b> Virtual Memory </b>
*
* This driver supports Virtual Memory. The RTOS is responsible for calculating
* the correct device base address in Virtual Memory space.
*
* <b> Threads </b>
*
* This driver is not thread safe. Any needs for threads or thread mutual
* exclusion must be satisfied by the layer above this driver.
*
* <b> Asserts </b>
*
* Asserts are used within all Xilinx drivers to enforce constraints on argument
* values. Asserts can be turned off on a system-wide basis by defining at
* compile time, the NDEBUG identifier. By default, asserts are turned on and it
* is recommended that users leave asserts on during development.
*
* <b> Building the driver </b>
*
* The XAXI4-Stream Switch driver is composed of several source files. This
* allows the user to build and link only those parts of the driver that are
* necessary.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- --- -------- --------------------------------------------------
* 1.00 sha 01/28/15 Initial release.
* </pre>
*
******************************************************************************/
#ifndef XAXIS_SWITCH_H_
#define XAXIS_SWITCH_H_ /**< Prevent circular inclusions
* by using protection macros */
#ifdef __cplusplus
extern "C" {
#endif
/***************************** Include Files *********************************/
#include "xaxis_switch_hw.h"
#include "xil_assert.h"
#include "xstatus.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/**
* This typedef contains configuration information for the AXI4-Stream Switch
* core. Each AXI4-Stream Switch device should have a configuration structure
* associated.
*/
typedef struct {
u16 DeviceId; /**< DeviceId is the unique ID of the AXI4-
* Stream Switch core */
u32 BaseAddress; /**< BaseAddress is the physical base address
* of the core's registers */
u8 MaxNumSI; /**< Maximum number of Slave interfaces */
u8 MaxNumMI; /**< Maximum number of Master interfaces */
} XAxis_Switch_Config;
/**
* The AXI4-Stream Switch driver instance data. An instance must be allocated
* for each core in use.
*/
typedef struct {
XAxis_Switch_Config Config; /**< Hardware Configuration */
u32 IsReady; /**< Core and the driver instance are
* initialized */
} XAxis_Switch;
/***************** Macros (Inline Functions) Definitions *********************/
/*****************************************************************************/
/**
*
* This macro enables register updates.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
*
* @return None.
*
* @note C-style signature:
* void XAxisScr_RegUpdateEnable(XAxis_Switch *InstancePtr)
*
******************************************************************************/
#define XAxisScr_RegUpdateEnable(InstancePtr) \
XAxisScr_WriteReg((InstancePtr)->Config.BaseAddress, \
XAXIS_SCR_CTRL_OFFSET, \
XAxisScr_ReadReg((InstancePtr)->Config.BaseAddress, \
XAXIS_SCR_CTRL_OFFSET) | \
XAXIS_SCR_CTRL_REG_UPDATE_MASK)
/*****************************************************************************/
/**
*
* This macro disables register updates.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
*
* @return None.
*
* @note C-style signature:
* void XAxisScr_RegUpdateDisable(XAxis_Switch *InstancePtr)
*
******************************************************************************/
#define XAxisScr_RegUpdateDisable(InstancePtr) \
XAxisScr_WriteReg((InstancePtr)->Config.BaseAddress, \
XAXIS_SCR_CTRL_OFFSET, \
XAxisScr_ReadReg((InstancePtr)->Config.BaseAddress, \
XAXIS_SCR_CTRL_OFFSET) & \
(~XAXIS_SCR_CTRL_REG_UPDATE_MASK))
/************************** Function Prototypes ******************************/
/* Initialization function in xaxis_switch_sinit.c */
XAxis_Switch_Config *XAxisScr_LookupConfig(u16 DeviceId);
/* Initialization and control functions in xaxis_switch.c */
s32 XAxisScr_CfgInitialize(XAxis_Switch *InstancePtr,
XAxis_Switch_Config *CfgPtr, u32 EffectiveAddr);
void XAxisScr_MiPortEnable(XAxis_Switch *InstancePtr, u8 MiIndex,
u8 SiIndex);
void XAxisScr_MiPortDisable(XAxis_Switch *InstancePtr, u8 MiIndex);
s32 XAxisScr_IsMiPortEnabled(XAxis_Switch *InstancePtr, u8 MiIndex,
u8 SiIndex);
s32 XAxisScr_IsMiPortDisabled(XAxis_Switch *InstancePtr, u8 MiIndex);
void XAxisScr_MiPortDisableAll(XAxis_Switch *InstancePtr);
/* Self test function in xaxis_switch_selftest.c */
s32 XAxisScr_SelfTest(XAxis_Switch *InstancePtr);
/************************** Variable Declarations ****************************/
#ifdef __cplusplus
}
#endif
#endif /* End of protection macro */

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XilinxProcessorIPLib/drivers/axis_switch/src/xaxis_switch_g.c Normal file
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/*******************************************************************
*
* CAUTION: This file is automatically generated by HSI.
* Version:
* DO NOT EDIT.
*
* Copyright (C) 2010-2015 Xilinx, Inc. All Rights Reserved.*
*Permission is hereby granted, free of charge, to any person obtaining a copy
*of this software and associated documentation files (the Software), to deal
*in the Software without restriction, including without limitation the rights
*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
*copies of the Software, and to permit persons to whom the Software is
*furnished to do so, subject to the following conditions:
*
*The above copyright notice and this permission notice shall be included in
*all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
*(a) running on a Xilinx device, or
*(b) that interact with a Xilinx device through a bus or interconnect.
*
*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
*XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*Except as contained in this notice, the name of the Xilinx shall not be used
*in advertising or otherwise to promote the sale, use or other dealings in
*this Software without prior written authorization from Xilinx.
*
*
* Description: Driver configuration
*
*******************************************************************/
#include "xparameters.h"
#include "xaxis_switch.h"
/*
* The configuration table for devices
*/
XAxis_Switch_Config XAxis_Switch_ConfigTable[] =
{
{
XPAR_AXIS_SWITCH_0_DEVICE_ID,
XPAR_AXIS_SWITCH_0_BASEADDR,
XPAR_AXIS_SWITCH_0_NUM_SI,
XPAR_AXIS_SWITCH_0_NUM_MI
}
};

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/******************************************************************************
*
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xaxis_switch_hw.h
*
* This header file contains identifiers and register-level core functions (or
* macros) that can be used to access the Xilinx AXI4-Stream Switch Control
* Router core.
*
* For more information about the operation of this core see the hardware
* specification and documentation in the higher level driver
* xaxis_switch.h file.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- --- -------- --------------------------------------------------
* 1.00 sha 01/28/15 Initial release.
* </pre>
*
******************************************************************************/
#ifndef XAXIS_SWITCH_HW_H_
#define XAXIS_SWITCH_HW_H_ /**< Prevent circular inclusions
* by using protection macros */
#ifdef __cplusplus
extern "C" {
#endif
/***************************** Include Files *********************************/
#include "xil_io.h"
/************************** Constant Definitions *****************************/
/** @name MI MUX register offsets
*
* @{
*/
#define XAXIS_SCR_CTRL_OFFSET 0x000 /**< Control Register offset */
#define XAXIS_SCR_MI_MUX_START_OFFSET 0x040 /**< Start of MI MUX Register
* offset */
#define XAXIS_SCR_MI_MUX_END_OFFSET 0x07C /**< End of MI MUX Register
* offset */
/*@}*/
/** @name MI MUX Control register mask
* @{
*/
#define XAXIS_SCR_CTRL_REG_UPDATE_MASK 0x02 /**< Register Update
* mask */
/*@}*/
/** @name MI MUX register mask
*
* It is applicable for MI[0...15] registers.
* @{
*/
#define XAXIS_SCR_MI_X_MUX_MASK 0x0F /**< MI MUX mask */
#define XAXIS_SCR_MI_X_DISABLE_MASK 0x80000000 /**< MI Disable mask */
#define XAXIS_SCR_MI_X_DISABLE_SHIFT 31 /**< MI Disable shift */
/*@}*/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/** @name Register access macro definition
* @{
*/
#define XAxisScr_In32 Xil_In32 /**< Input Operations */
#define XAxisScr_Out32 Xil_Out32 /**< Output Operations */
/*****************************************************************************/
/**
*
* This macro reads a value from a AXI4-Stream Switch register. A 32 bit read
* is performed. If the component is implemented in a smaller width, only the
* least significant data is read from the register. The most significant data
* will be read as 0.
*
* @param BaseAddress is the base address of the XAxis_Switch core
* instance.
* @param RegOffset is the register offset of the register (defined at
* the top of this file).
*
* @return The 32-bit value of the register.
*
* @note C-style signature:
* u32 XAxisScr_ReadReg(u32 BaseAddress, u32 RegOffset)
*
******************************************************************************/
#define XAxisScr_ReadReg(BaseAddress, RegOffset) \
XAxisScr_In32((BaseAddress) + ((u32)RegOffset))
/*****************************************************************************/
/**
*
* This macro writes a value to a AXI4-Stream Switch register. A 32 bit write
* is performed. If the component is implemented in a smaller width, only the
* least significant data is written.
*
* @param BaseAddress is the base address of the XAxis_Switch core
* instance.
* @param RegOffset is the register offset of the register (defined at
* the top of this file) to be written.
* @param Data is the 32-bit value to write into the register.
*
* @return None.
*
* @note C-style signature:
* void XAxisScr_WriteReg(u32 BaseAddress, u32 RegOffset,
* u32 Data)
*
******************************************************************************/
#define XAxisScr_WriteReg(BaseAddress, RegOffset, Data) \
XAxisScr_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data))
/*@}*/
/************************** Function Prototypes ******************************/
/************************** Variable Declarations ****************************/
#ifdef __cplusplus
}
#endif
#endif /* end of protection macro */

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/******************************************************************************
*
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xaxis_switch_selftest.c
*
* This file contains self test function for the AXI4-Stream Source Control
* Router core.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- --- -------- --------------------------------------------------
* 1.00 sha 01/28/15 Initial release.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xaxis_switch.h"
/************************** Constant Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
/**************************** Type Definitions *******************************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/************************** Function Definitions *****************************/
/*****************************************************************************/
/**
*
* This function performs self test on AXI4-Stream Switch core registers.
*
* @param InstancePtr is a pointer to the XAxis_Switch core instance.
*
* @return
* - TRUE if self test passed.
* - FALSE if self test failed.
*
* @note None.
*
******************************************************************************/
s32 XAxisScr_SelfTest(XAxis_Switch *InstancePtr)
{
u8 MiIndex;
u8 SiIndex;
s32 Status;
/* Verify argument. */
Xil_AssertNonvoid(InstancePtr != NULL);
/* Disable all MI ports */
XAxisScr_MiPortDisableAll(InstancePtr);
/* Source SI[1] to MI[0] */
MiIndex = 0;
SiIndex = 1;
XAxisScr_MiPortEnable(InstancePtr, MiIndex, SiIndex);
/* Check for MI port enable */
Status = XAxisScr_IsMiPortEnabled(InstancePtr, MiIndex, SiIndex);
if (Status) {
xil_printf("MI[%d] is sourced from SI[%d].\r\n", MiIndex,
SiIndex);
}
return Status;
}

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/******************************************************************************
*
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xaxis_switch_sinit.c
*
* This file contains static initialization method for Xilinx AXI4-Stream
* Source Control Router core.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- --- -------- --------------------------------------------------
* 1.00 sha 01/28/15 Initial release.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xaxis_switch.h"
#include "xparameters.h"
/************************** Constant Definitions *****************************/
/***************** Macros (Inline Functions) Definitions *********************/
/**************************** Type Definitions *******************************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/************************** Function Definitions *****************************/
/*****************************************************************************/
/**
*
* This function returns a reference to an XAxis_Switch_Config structure based
* on the core id, <i>DeviceId</i>. The return value will refer to an entry in
* the device configuration table defined in the xaxis_switch_g.c file.
*
* @param DeviceId is the unique core ID of the XAxis_Switch core for
* the lookup operation.
*
* @return XAxisScr_LookupConfig returns a reference to a config record
* in the configuration table (in xaxis_switch_g.c)
* corresponding to <i>DeviceId</i>, or NULL if no match is found.
*
* @note None.
*
******************************************************************************/
XAxis_Switch_Config *XAxisScr_LookupConfig(u16 DeviceId)
{
extern XAxis_Switch_Config
XAxis_Switch_ConfigTable[XPAR_XAXIS_SWITCH_NUM_INSTANCES];
XAxis_Switch_Config *CfgPtr = NULL;
u32 Index;
/* Checking for device id for which instance it is matching */
for (Index = (u32)0x0; Index < (u32)XPAR_XAXIS_SWITCH_NUM_INSTANCES;
Index++) {
/* Assigning address of config table if both device ids
* are matched
*/
if (XAxis_Switch_ConfigTable[Index].DeviceId == DeviceId) {
CfgPtr = &XAxis_Switch_ConfigTable[Index];
break;
}
}
return (XAxis_Switch_Config *)CfgPtr;
}