drivers : created a new minor version for driver cpu_cortexa9
this patch creates a new minor version v2_1 for driver cpu_cortexa9 Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com> Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This commit is contained in:
Kinjal Pravinbhai Patel
Jagannadha Sutradharudu Teki
parent
0b2b088c58
commit
a404324e7d
4 changed files with 256 additions and 0 deletions
49
XilinxProcessorIPLib/drivers/cpu_cortexa9/data/cpu_cortexa9.mdd
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49
XilinxProcessorIPLib/drivers/cpu_cortexa9/data/cpu_cortexa9.mdd
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###############################################################################
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#
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# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# Use of the Software is limited solely to applications:
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# (a) running on a Xilinx device, or
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# (b) that interact with a Xilinx device through a bus or interconnect.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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# Except as contained in this notice, the name of the Xilinx shall not be used
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# in advertising or otherwise to promote the sale, use or other dealings in
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# this Software without prior written authorization from Xilinx.
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#
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###############################################################################
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OPTION psf_version = 2.1;
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BEGIN driver cpu_cortexa9
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OPTION copyfiles = all;
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OPTION driver_state = ACTIVE;
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OPTION supported_peripherals = (ps7_cortexa9);
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OPTION default_os = "standalone_v3_05_a";
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OPTION VERSION = 2.1;
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OPTION NAME = cpu_cortexa9;
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PARAM name = compiler, desc = "Compiler used to compile both BSP/Libraries and Applications.", type = string, default = arm-xilinx-eabi-gcc;
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PARAM name = archiver, desc = "Archiver used to archive libraries for both BSP generation as well as for applications", type = string, default = arm-xilinx-eabi-ar;
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PARAM name = compiler_flags, desc = "Compiler flags used in BSP and library generation. '-c' flag stands for 'compile and assemble, but do not link'. Without this flag, gcc tries to link the code, which will fail bacause there is no application involved during libgen. '-O2' can be overwritten by extra compiler flags", type = string, default = "-O2 -c", permit = none;
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PARAM name = extra_compiler_flags, desc = "Extra compiler flags used in BSP and library generation.", type = string, default = "-g";
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END driver
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145
XilinxProcessorIPLib/drivers/cpu_cortexa9/data/cpu_cortexa9.tcl
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XilinxProcessorIPLib/drivers/cpu_cortexa9/data/cpu_cortexa9.tcl
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###############################################################################
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#
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# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# Use of the Software is limited solely to applications:
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# (a) running on a Xilinx device, or
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# (b) that interact with a Xilinx device through a bus or interconnect.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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# Except as contained in this notice, the name of the Xilinx shall not be used
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# in advertising or otherwise to promote the sale, use or other dealings in
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# this Software without prior written authorization from Xilinx.
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#
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###############################################################################
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#
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# Modification History
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#
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# Ver Who Date Changes
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# ----- ---- -------- -----------------------------------------------
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# 1.00a sdm 05/16/10 Updated to support AXI version of the core
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# 2.0 adk 10/12/13 Updated as per the New Tcl API's
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#
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##############################################################################
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#uses "xillib.tcl"
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############################################################
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# "generate" procedure
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############################################################
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proc generate {drv_handle} {
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xdefine_cortexa9_params $drv_handle
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xdefine_include_file $drv_handle "xparameters.h" "XCPU_CORTEXA9" "C_CPU_CLK_FREQ_HZ"
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xdefine_canonical_xpars $drv_handle "xparameters.h" "CPU_CORTEXA9" "C_CPU_CLK_FREQ_HZ"
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xdefine_addr_params_for_ext_intf $drv_handle "xparameters.h"
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}
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proc xdefine_cortexa9_params {drvhandle} {
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set sw_proc_handle [get_sw_processor]
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set hw_proc_handle [get_cells [get_property HW_INSTANCE $sw_proc_handle ]]
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set periphs [::hsm::utils::get_common_driver_ips $drvhandle]
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set lprocs [get_cells -filter "IP_NAME==ps7_cortexa9"]
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set lprocs [lsort $lprocs]
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set config_inc [::hsm::utils::open_include_file "xparameters.h"]
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puts $config_inc "/* Definition for CPU ID */"
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foreach periph $periphs {
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set iname [get_property NAME $periph]
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#-----------
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# Set CPU ID
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#-----------
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set id 0
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foreach processor $lprocs {
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if {[string compare -nocase $processor $iname] == 0} {
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puts $config_inc "#define XPAR_CPU_ID $id"
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}
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incr id
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}
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}
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close $config_inc
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}
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proc xdefine_addr_params_for_ext_intf {drvhandle file_name} {
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set sw_proc_handle [get_sw_processor]
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set hw_proc_handle [get_cells [get_property HW_INSTANCE $sw_proc_handle ]]
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# Open include file
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set file_handle [::hsm::utils::open_include_file $file_name]
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set mem_ranges [get_mem_ranges -of_objects $hw_proc_handle]
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foreach mem_range $mem_ranges {
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set inst [get_property INSTANCE $mem_range]
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if {$inst != ""} {
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continue
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}
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set bparam_name [get_property BASE_NAME $mem_range]
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set bparam_value [get_property BASE_VALUE $mem_range]
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set hparam_name [get_property HIGH_NAME $mem_range]
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set hparam_value [get_property HIGH_VALUE $mem_range]
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# Print all parameters for all peripherals
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set name [string toupper [get_property NAME $mem_range]]
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puts $file_handle ""
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puts $file_handle "/* Definitions for interface [string toupper $name] */"
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set name [format "XPAR_%s_" $name]
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if {$bparam_value != ""} {
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set value [::hsm::utils::format_addr_string $bparam_value $bparam_name]
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set param [string toupper $bparam_name]
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if {[string match C_* $param]} {
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set name [format "%s%s" $name [string range $param 2 end]]
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} else {
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set name [format "%s%s" $name $param]
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}
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puts $file_handle "#define $name $value"
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}
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set name [string toupper [get_property NAME $mem_range]]
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set name [format "XPAR_%s_" $name]
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if {$hparam_value != ""} {
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set value [::hsm::utils::format_addr_string $hparam_value $hparam_name]
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set param [string toupper $hparam_name]
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if {[string match C_* $param]} {
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set name [format "%s%s" $name [string range $param 2 end]]
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} else {
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set name [format "%s%s" $name $param]
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}
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puts $file_handle "#define $name $value"
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}
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puts $file_handle ""
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}
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close $file_handle
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}
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23
XilinxProcessorIPLib/drivers/cpu_cortexa9/src/Makefile
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XilinxProcessorIPLib/drivers/cpu_cortexa9/src/Makefile
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COMPILER=
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ARCHIVER=
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CP=cp
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COMPILER_FLAGS=
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EXTRA_COMPILER_FLAGS=
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LIB=libxil.a
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RELEASEDIR=../../../lib
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INCLUDEDIR=../../../include
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INCLUDES=-I${INCLUDEDIR}
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OUTS = *.o
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LIBSOURCES=*.c
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INCLUDEFILES=*.h
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libs:
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echo "Compiling cpu_cortexa9"
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.PHONY: include
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include:
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${CP} $(INCLUDEFILES) $(INCLUDEDIR)
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39
XilinxProcessorIPLib/drivers/cpu_cortexa9/src/xcpu_cortexa9.h
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XilinxProcessorIPLib/drivers/cpu_cortexa9/src/xcpu_cortexa9.h
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/******************************************************************************
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*
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* Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xcpu_cortexa9.h
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*
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* dummy file
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*
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******************************************************************************/
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