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dp: tx: Qualify interrupt status with interrupt mask.

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The status and mask registers are independent - the interrupt status
is not affected by the software controlled interrupt mask register.

For the contents of the interrupt mask to take effect, qualification
of the interrupt status needs to happen in software.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Shadul Shaikh <shaduls@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-10-09 03:51:34 -07:00 • committed by Nava kishore Manne
parent 9a7cc7936e
commit a6beedde4c
1 changed files with 2 additions and 0 deletions
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2
XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c
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@ -989,6 +989,8 @@ static void XDp_TxInterruptHandler(XDp *InstancePtr)
* Note: XDP_TX_INTERRUPT_STATUS is an RC (read-clear) register. */
IntrStatus = XDp_ReadReg(InstancePtr->Config.BaseAddr,
XDP_TX_INTERRUPT_STATUS);
IntrStatus &= ~XDp_ReadReg(InstancePtr->Config.BaseAddr,
XDP_TX_INTERRUPT_MASK);
HpdEventDetected = IntrStatus & XDP_TX_INTERRUPT_STATUS_HPD_EVENT_MASK;
HpdPulseDetected = IntrStatus &