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rtcpsu : Enable battery switching bit in control register

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This patch enables rtc controller to switch to battery
when vcc_psaux is not available.

Signed-off-by: Venkata Naga Sai Krishna Kolapalli <venkatan@xilinx.com>
Reviewed-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
This commit is contained in:
Venkata Naga Sai Krishna Kolapalli 2015-09-25 15:57:21 +05:30 • committed by Nava kishore Manne
parent 120d4554bd
commit a7d10c5f22
4 changed files with 15 additions and 7 deletions
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2
XilinxProcessorIPLib/drivers/rtcpsu/data/rtcpsu.mdd
View file

@ -36,7 +36,7 @@ BEGIN driver rtcpsu
OPTION supported_peripherals = (psu_rtc);
OPTION driver_state = ACTIVE;
OPTION copyfiles = all;
OPTION VERSION = 1.0;
OPTION VERSION = 1.1;
OPTION NAME = rtcpsu;
END driver

8
XilinxProcessorIPLib/drivers/rtcpsu/src/xrtcpsu.c
View file

@ -48,6 +48,8 @@
* Ver Who Date Changes
* ----- ----- -------- -----------------------------------------------
* 1.00 kvn 04/21/15 First release
* 1.1 kvn 09/25/15 Modify control register to enable battery
* switching when vcc_psaux is not available.
* </pre>
*
******************************************************************************/
@ -95,6 +97,7 @@ s32 XRtcPsu_CfgInitialize(XRtcPsu *InstancePtr, XRtcPsu_Config *ConfigPtr,
u32 EffectiveAddr)
{
s32 Status;
u32 ControlRegister;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(ConfigPtr != NULL);
@ -120,9 +123,10 @@ s32 XRtcPsu_CfgInitialize(XRtcPsu *InstancePtr, XRtcPsu_Config *ConfigPtr,
XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CALIB_WR_OFFSET,
InstancePtr->CalibrationValue);
/* Set the Oscillator crystal enable in control register. */
/* Set the Oscillator crystal and Battery switch enable in control register. */
ControlRegister = XRtcPsu_ReadReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CTL_OFFSET);
XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_CTL_OFFSET,
XRTCPSU_CRYSTAL_OSC_EN);
(ControlRegister | (u32)XRTCPSU_CRYSTAL_OSC_EN | (u32)XRTC_CTL_BATTERY_EN_MASK));
/* Clear the Interrupt Status and Disable the interrupts. */
XRtcPsu_WriteReg(InstancePtr->RtcConfig.BaseAddr + XRTC_INT_STS_OFFSET,

2
XilinxProcessorIPLib/drivers/rtcpsu/src/xrtcpsu.h
View file

@ -98,6 +98,8 @@
* Ver Who Date Changes
* ----- ----- -------- -----------------------------------------------
* 1.00 kvn 04/21/15 First release
* 1.1 kvn 09/25/15 Modify control register to enable battery
* switching when vcc_psaux is not available.
* </pre>
*
******************************************************************************/

10
XilinxProcessorIPLib/drivers/rtcpsu/src/xrtcpsu_hw.h
View file

@ -46,6 +46,8 @@
* Ver Who Date Changes
* ----- ----- -------- -----------------------------------------------
* 1.00a kvn 04/21/15 First release
* 1.1 kvn 09/25/15 Modify control register to enable battery
* switching when vcc_psaux is not available.
*
* </pre>
*
@ -282,10 +284,10 @@ extern "C" {
#define XRTC_CTL_OFFSET 0x00000040U
#define XRTC_CTL_RSTVAL 0x01000000U
#define XRTC_CTL_BATTERY_DIS_SHIFT 31U
#define XRTC_CTL_BATTERY_DIS_WIDTH 1U
#define XRTC_CTL_BATTERY_DIS_MASK 0x80000000U
#define XRTC_CTL_BATTERY_DIS_DEFVAL 0x0U
#define XRTC_CTL_BATTERY_EN_SHIFT 31U
#define XRTC_CTL_BATTERY_EN_WIDTH 1U
#define XRTC_CTL_BATTERY_EN_MASK 0x80000000U
#define XRTC_CTL_BATTERY_EN_DEFVAL 0x0U
#define XRTC_CTL_OSC_SHIFT 24U
#define XRTC_CTL_OSC_WIDTH 4U